USRE40497EExpiredUtility

Communication system which dynamically switches sizes of sample buffer between first size for quick response time and second size for robustness to interrupt latency

44
Assignee: SILICON LAB INCPriority: Apr 16, 1996Filed: Jan 26, 2001Granted: Sep 9, 2008
Est. expiryApr 16, 2016(expired)· nominal 20-yr term from priority
H04L 7/005H04M 11/06
44
PatentIndex Score
0
Cited by
17
References
60
Claims

Abstract

An apparatus for and method of implementing a novel buffer ba full duplex communication system is disclosed. The disclosed invention is particularly useful in native sign processing systems wherein heavy contention of processor resources typically exist, such as in systems running multi-tasking operating systems. The communication system of the present invention includes a receiver, transmitter, echo canceler. CODEC and telephone hybrid. The major components of the system operate on a buffer of input samples consisting of a set of input bits. The communications system operates to generate a buffer of output samples consisting of a set of output bits. The invention utilizes a novel buffer switching mechanism to optimize the tradeoff between processing response time, on one hand, and robustness to interrupt latency and processor implementation on the other hand. The internal processing of the modem works on a buffer full of samples once every time slice thus reducing the probability of a buffer underrun/overrun error occurring. The reduction in probability of data underrun/overrun is achieved by increasing the buffer size, thus giving the operating system greater leeway in choosing the exact time the signal processing functions are run. Small buffers, however, provide the communication system with short and accurate response time. These contradicting motives lead to the novel switchable size buffer scheme of the present invention. This is achieved without a loss of signal coherency.

Claims

exact text as granted — not AI-modified
1. A method, in a communications system, of achieving a balance between processing response time, on one hand, and robustness to interrupt latency and processor implementation overhead, on the other hand, said method comprising of the steps of:
 utilizing sample buffers having a first buffer size when it is desired to optimize said communication system so as to have quick processing response times;    utilizing sample buffers having a second buffer size when it is desired to optimize said communication system so as to be robust to interrupt latency and to have low processor implementation overhead; and    providing switching means enabling said communication system to dynamically switch between using said buffers having a first buffer size and said buffers having a second buffer size.    
     
     
       2. The method according to  claim 1 , wherein the size of said sample buffers is coherently switched without any loss of data. 
     
     
       3. The method according to  claim 1 , wherein said second buffer size is greater than said first buffer size. 
     
     
       4. The method according to  claim 1 , wherein the size of said sample buffer is switched to said first buffer size when the modem connection is reinitialized or restarted. 
     
     
       5. The method according to  claim 1 , wherein the size of said sample buffer is switched to said first buffer size when a retrain sequence has been initialized, wherein said communication system implements an International Telecommunication Union standard chosen from the group of V.32, V.32 bis and V.34. 
     
     
       6. A system, in a communications system, for achieving a balance between processing response time, on one hand, and robustness to interrupt latency and processor implementation overhead, on the other hand, said system comprising:
 means for utilizing sample buffers having a first buffer size when it is desired to optimize said communication system so as to have quick processing response times;    means for utilizing sample buffers having a second buffer size when it is desired to optimize said communication system so as to be robust to interrupt latency and to have low processor implementation overhead; and    switching means enabling said communication system to dynamically switch between using said buffers having a first buffer size and said buffers having a second buffer size.    
     
     
       7. The system according to  claim 6 , wherein the size of said sample buffers is coherently switched without any loss of data. 
     
     
       8. The system according to  claim 1 , wherein said second buffer size is greater than said first buffer size. 
     
     
       9. The system according to  claim 6 , wherein the size of said sample buffer is switched to said first buffer size when the modem connection is reinitialized or restarted. 
     
     
       10. The system according to  claim 6 , wherein the size of said sample buffer is switched to said first buffer size when a retrain sequence has been initialized, wherein said communication system implements an International Telecommunication Union standard chosen from the group of V.32, V.32 bis and V.34. 
     
     
       11. A method, in a communications system, of achieving a balance between processing response time, on one hand, and robustness to interrupt latency and processor implementation overhead, on the other hand, said communication system including a receiver, transmitter and associated receive sample buffer and transmit sample buffer, wherein sample processing is divided into time slices within said communication system, said method comprising of the steps of:
 utilizing receive and transmit sample buffers having a first buffer size L 1  when it is desired to optimize said communication system so as to have quick processing response times;    utilizing receive and transmit sample buffers having a second buffer size L 2  when it is desired to optimize said communication system so as to be robust to interrupt latency and to have low processor implementation overhead;    providing switching means enabling said communication system to dynamically switch between using said transmit and receive sample buffers having a size L 1  and a size L 2 ;    making a determination to switch buffer sizes before the activation of said transmitter during time slice N;    processing a receive buffer to length L 1  and a transmit buffer of length L 1  during time slice N−1;    processing a receive buffer of length L 1  and a transmit buffer of length L 2  during time slice N+1; and    processing a receive buffer of length L 2  and a transmit buffer of length L 2  during time slice N+2 and during time slices thereafter until such decision to switch buffer sizes.    
     
     
       12. The method according to  claim 11 , wherein the size of said transmit and receive sample buffers is coherently switched without any loss of data. 
     
     
       13. A method of achieving a balance between response time and system latency in a communication system, said communication system including a receiver and a transmitter, wherein sample processing is divided into time slices within said communication system, said method comprising the steps of:
   employing a receive sample buffer and a transmit sample buffer, each having a first buffer size L 1  capable of quick response times;        employing a receive sample buffer and a transmit sample buffer, each having a second buffer size L 2  capable of accommodating system latency;        employing a switching device enabling said communication system to dynamically switch between said transmit sample buffers and between said receive sample buffers;        making a determination to switch between said first buffer size L 1  and said second buffer size L 2  before the activation of said transmitter during a time slice N;        processing said receive sample buffer having said first buffer size L 1  and said transmit sample buffer having said first buffer size L 1  during a time slice N− 1 ;        processing said receive sample buffer having said first buffer size L 1  and said transmit sample buffer having said second buffer size L 2  during said time slice N;        processing said receive sample buffer having said first buffer size L 1  and said transmit sample buffer having said second buffer size L 2  during a time slice N+ 1 ; and        processing said receive sample buffer having said second buffer size L 2  and said transmit sample buffer having said second buffer size L 2  during a time slice N+ 2  and during time slices thereafter until deciding to switch between said first buffer size L 1  and said second buffer size L 2 .     
     
     
       14. The method of  claim 13 , wherein the size of said transmit and receive sample buffers is coherently switched without any loss of data. 
     
     
       15. A system for achieving a balance between response time and system latency in a communication system, said system comprising:
   sample buffers having a first buffer size capable of quick response times;        sample buffers having a second buffer size capable of accommodating system latency; and        a switching device capable of dynamically switching between the use of said sample buffers having said first buffer size and said sample buffers having said second buffet size.     
     
     
       16. The system of  claim 15 , wherein said second buffer size is robust so as to accommodate system latency. 
     
     
       17. The system of  claim 15 , wherein said sample buffers are maintained in a memory. 
     
     
       18. The system of  claim 15 , wherein said sample buffers are maintained in physical buffers. 
     
     
       19. The system of  claim 15 , wherein said dynamic switching is performed in response to communication system operating requirements. 
     
     
       20. The system of  claim 15 , wherein said system latency comprises interrupt latency. 
     
     
       21. The system of  claim 15 , wherein said system latency comprises bus latency. 
     
     
       22. The system of  claim 15 , wherein said system latency comprises both interrupt latency and bus latency. 
     
     
       23. The system of  claim 15 , wherein the size of said sample buffers is coherently switched without any loss of data. 
     
     
       24. The system of  claim 15 , wherein said second buffer size is greater than said first buffer size. 
     
     
       25. The system of  claim 15 , wherein the size of said sample buffers is switched to said first buffer size when a modem connection is reinitialized or restarted. 
     
     
       26. The system of  claim 15 , wherein the size of said sample buffers is switched to said first buffer size when a retrain sequence has been initialized, wherein said communication system implements an International Telecommunication Union standard chosen from the group of V. 32 , V. 32 bis and V. 34 . 
     
     
       27. A system for achieving a balance between response time and system latency in a communication system, said system comprising:
   sample buffers having a first buffer size capable of quick response times;        sample buffers having a second buffer size that is robust so as to accommodate system latency; and        a switching device capable of dynamically switching between the use of said sample buffers having said first buffer size and said sample buffers having said second buffer size.     
     
     
       28. A system for achieving a balance between response time and system latency in a communication system, said system comprising:
   a sample buffer that is variable in size, wherein the sample buffer has a first buffer size capable of quick response times and a second buffer size capable of accommodating system latency; and        a switching device capable of dynamically switching between said first buffer size and said second buffer size of the sample buffer.     
     
     
       29. A machine readable storage medium containing executable instructions which, when executed by a machine, cause the machine to perform the steps of a method for achieving a balance between response time and system latency in a communication system, the method comprising:
   employing sample buffers having a first buffer size capable of quick response times;        employing sample buffers having a second buffer size capable of accommodating system latency; and        dynamically switching between the use of said sample buffers having said first buffer size and said sample buffers having said second buffer size.     
     
     
       30. The medium of  claim 29 , wherein said second buffer size is robust so as to accommodate system latency. 
     
     
       31. The medium of  claim 29 , wherein said dynamic switching is performed in response to communication system operating requirements. 
     
     
       32. The medium of  claim 29 , wherein said system latency comprises interrupt latency. 
     
     
       33. The medium of  claim 29 , wherein said system latency comprises bus latency. 
     
     
       34. The medium of  claim 29 , wherein said system latency comprises both interrupt latency and bus latency. 
     
     
       35. The medium of  claim 29 , wherein the size of said sample buffers is coherently switched without any loss of data. 
     
     
       36. The medium of  claim 29 , wherein said second buffer size is greater than said first buffer size. 
     
     
       37. The medium of  claim 29 , wherein the size of said sample buffers is switched to said first buffer size when a modem connection is reinitialized or restarted. 
     
     
       38. The medium of  claim 29 , wherein the size of said sample buffers is switched to said first buffer size when a retrain sequence has been initialized, wherein said communication system implements an International Telecommunication Union standard chosen from the group of V. 32 , V. 32 bis and V. 34 . 
     
     
       39. A machine readable storage medium containing executable instructions which, when executed by a machine, causes the machine to perform the steps of a method for achieving a balance between response time and system latency in a communication system, the method comprising:
   employing sample buffers having a first buffer size capable of quick response times;        employing sample buffers having a second buffer size that is robust so as to accommodate system latency in said communication system; and        employing a switching device capable of dynamically switching between the use of said sample buffers having said first buffer size and said sample buffers having said second buffer size.     
     
     
       40. A machine readable storage medium containing executable instructions which, when executed by a machine, causes the machine to perform the steps of a method for achieving a balance between response time and system latency in a communication system, the method comprising:
   employing a sample buffet that is variable in size, wherein said sample buffer has a first buffer size capable of quick response times and a second buffer size capable of accommodating system latency; and        employing a switching device capable of dynamically switching between said first buffer size and said second buffer size of said sample buffer.     
     
     
       41. A method of achieving a balance between response time and system latency in a communication system, said method comprising:
   employing sample buffers having a first buffer size capable of quick response times;        employing sample buffers having a second buffer size capable of accommodating system latency; and        employing a switching device capable of dynamically switching between said sample buffers having said first buffer size and said sample buffers having said second buffer size.     
     
     
       42. The method of  claim 41 , wherein said second buffer size is robust so as to accommodate system latency. 
     
     
       43. The method of  claim 41 , wherein said dynamic switching is performed in response to communication system operating requirements. 
     
     
       44. The method of  claim 41 , wherein said system latency comprises interrupt latency. 
     
     
       45. The method of  claim 41 , wherein said system latency comprises bus latency. 
     
     
       46. The method of  claim 41 , wherein said system latency comprises both interrupt latency and bus latency. 
     
     
       47. The method of  claim 41 , wherein the size of said sample buffers is coherently switched without any loss of data. 
     
     
       48. The method of  claim 41 , wherein said second buffer size is greater than said first buffer size. 
     
     
       49. The method of  claim 41 , wherein the size of said sample buffers is switched to said first buffer size when a modem connection is reinitialized or restarted. 
     
     
       50. The method of  claim 41 , wherein the size of said sample buffers is switched to said first buffer size when a retrain sequence has been initialized, wherein said communication system implements an International Telecommunication Union standard chosen from the group of V. 32 , V. 32 bis and V. 34 . 
     
     
       51. A method of achieving a balance between response time and system latency in a communications system, said method comprising:
   employing sample buffers having a first buffer size capable of quick response times;        employing sample buffers having a second buffer that is robust so as to accommodate system latency in said communication system; and        employing a switching device capable of dynamically switching between said sample buffers having said first buffer size and said sample buffers having said second buffer size.     
     
     
       52. A method of achieving a balance between response time and system latency in a communication system, said method comprising:
   employing a sample buffer that is variable in size, wherein said sample buffer has a first buffer size capable of quick response times and a second buffer size capable of accommodating system latency; and        employing a switching device capable of dynamically switching between said first buffer size and said second buffer size of said sample buffer.     
     
     
       53. A modem capable of performing a start- up procedure with a remote device before entering a data phase for exchanging data with said remote device, said start - up procedure having a first start - up sequence and a second start - up sequence, said modem comprising:      a sample buffer having a first buffer size for use during said first start - up sequence;        a sample buffer having a second buffer size for use during said first start - up sequence, wherein said second buffer size is greater than said first buffer size; and        a switching device capable of switching from said sample buffer having said first buffer size to said sample buffers having said second buffer size based on a transition in said start - up procedure from said first start - up sequence to said second start - up sequence.     
     
     
       54. The modem of  claim 53 , wherein said modem achieves a balance between response time and system latency in a communication system by switching from said sample buffer having said first buffer size to said sample buffers having said second buffer size. 
     
     
       55. The modem of  claim 53 , wherein said first start- up sequence is an initial start - up sequence of said start - up procedure.   
     
     
       56. The modem of  claim 55 , wherein said start- up procedure is performed according to the International Telecommunication Union V. 32 bis standard, and said initial start - up sequence includes the ranging phase of said V. 32 bis standard.   
     
     
       57. A method for use by a modem to perform a start- up procedure with a remote device before entering a data phase for exchanging data with said remote device, said start - up procedure having a first start - up sequence and a second start - up sequence, said method comprising:      employing a sample buffer having a first buffer size for use during said first start - up sequence;        employing a sample buffer having a second buffer size for use during said first start - up sequence, wherein said second buffer size is greater than said first buffer size; and        switching from said sample buffer having said first buffer size to said sample buffers having said second buffer size based on a transition in said start - up procedure from said first start - up sequence to said second start - up sequence.     
     
     
       58. The method of  claim 57 , wherein said switching achieves a balance between response time and system latency in a communication system. 
     
     
       59. The method of  claim 57 , wherein said first start- up sequence is an initial start - up sequence of said start - up procedure.   
     
     
       60. The method of  claim 59 , wherein said start- up procedure is performed according to the International Telecommunication Union V. 32 bis standard, and said initial start - up sequence includes the ranging phase of said V. 32 bis standard.

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