Method and device for improved class BD amplification having single-terminal alternating-rail dual-sampling topology
Abstract
An improved Class BD amplifier provides an amplified output signal by pulse width modulation techniques by sampling a carrier wave, usually a triangular or saw tooth waveform, according to an input signal to be amplified, as in a conventional class D amplifier. The resulting sampling waveform controls the connectivity of the potential supplies 34, 36 to the power rails 14, 18 via the first switch 12 so that a first potential and a second potential are alternately supplied to the first power rail 14 and so that a third potential and fourth potential are alternately supplied to the second power rail 18. As shown in FIG. 8, the first potential is positive, the second and third potentials are at ground, and the fourth potential is negative. In addition, a constant potential difference is maintained between the first and second power rails 14, 18. The power rails are alternately connected to a Class AD output stage 26 by another switch 30, the connectivity of which is controlled by a second sampling waveform, PWM 2 . This second sampling waveform PWM 2 may also be derived by sampling a triangular or saw tooth carrier wave by the input signal.
Claims
exact text as granted — not AI-modified1. An improved class BD power amplifier having a three-level output signal, comprising:
at least two power rails;
a first switch alternately connecting each respective power rail from a first respective potential to a second respective potential such that the instantaneous potential difference between the two power rails is constant;
an output amplifier stage having a single output terminal; and
a second switch alternately connecting said output amplifier stage from one of said power rails to another of said power rails.
2. The amplifier according to claim 1 , wherein said output amplifier stage is a class AD amplifier stage.
3. The amplifier according to claim 1 , wherein said first and second switches are transistor switches.
4. The amplifier according to claim 1 , further comprising a fixed power supply which provides said first respective potential.
5. The amplifier according to claim 1 , wherein said second respective potential is ground.
6. The amplifier according to claim 1 , wherein an instantaneous potential difference between said at least two power rails is constant.
7. The amplifier according to claim 1 , further comprising a floating power supply which provides said first respective potential.
8. A method of pulse width modulation amplifying an input signal, comprising:
alternately supplying a first supply potential and a second supply potential to a first power rail;
alternately supplying a third supply potential and a fourth supply potential to a second power rail;
maintaining a constant potential difference between said first power rail and said second power rail;
alternately connecting one of said first power rail and said second power rail to an amplifier output stage.
9. The method of pulse width modulation amplifying an input signal as claimed in claim 8 , wherein said alternately supplying said supply potentials to said first and said second power rails is in accordance with dual sampling input drive waves.
10. The method of pulse width modulation amplifying an input signal as claimed in claim 8 , wherein said amplifier output stage is a class AD power amplifier stage.
11. An improved class BD power amplifier, comprising:
first and second potential supply nodes that at least one ground node;
first and second power rails;
a first switch, said first switch connecting said first power rail alternately to said first potential supply node and to said ground node and connecting said second power rail alternately to said ground node and to said second potential supply node, in accordance with a first input drive wave, such that the instantaneous potential difference between said first power rail and said second power rail is constant;
an output stage; and
a second switch alternately connecting said output stage to said first power rail and to said second power rail in accordance with a second input drive wave.
12. The power amplifier according to claim 11 ,
wherein said first input drive wave is a pulse train which results from sampling a triangular carrier wave in accordance with an input signal.
13. The power amplifier according to claim 12 ,
wherein a duty cycle of said pulse train is greater than 50% when said input signal is positive, less than 50% when said input signal is negative and 50% when said input signal is zero.
14. The power amplifier according to claim 11 ,
wherein said second input drive wave is a pulse train which results from sampling a triangular carrier wave in accordance with an input signal.
15. The power amplifier according to claim 11 ,
wherein said first input drive wave and said second input drive wave are substantially identical.
16. The power amplifier according to claim 11 ,
wherein said output stage is a class AD amplifier stage having a single output terminal.
17. The power amplifier according to claim 11 ,
wherein said first and second switches are switching transistors.
18. A method of amplifying an input signal, comprising the steps of:
alternately connecting a first power rail to one of a first potential and ground in accordance with a first input drive wave;
alternately connecting a second power rail to one of ground and a second potential in accordance with said first input drive wave, such that the instantaneous potential difference between said first power rail and said second power rail is constant; and
alternately connecting an output amplifier stage to one of a first and a second power rails in accordance the a second input drive wave.
19. The method of claim 18 , wherein:
a first switch alternately connects said amplifier stage to said respective power rails; and
a second switch alternately connects said respective first and second power rails to said respective first and second potentials and ground.
20. The method of claim 19 , further comprising the step of:
actuating said first and second switches in accordance with an input drive wave.
21. The method of claim 18 , wherein said first input drive wave is a pulse train having a duty cycle greater than 50% when the input signal is positive, less than 50% when the input signal is negative, and 50% when the input signal is zero.
22. The method of claim 18 , wherein said first and said second input drive waves are substantially identical.
23. The method of claim 21 , wherein said first and said second input drive waves are substantially identical.
24. A method of amplifying an input signal comprising the steps of:
sampling a triangular carrier waveform according to the input signal to produce first and second pulse-wave-modulated input drive waves;
alternately switching an output stage to one of a first power rail and a second power rail according to said first pulse-wave-modulated input drive wave;
alternately switching said first power rail to one of a first potential and ground according to said second pulse-wave-modulated input drive wave; and
alternately connecting said second power rail to one of a second potential and ground according to said second pulse-wave-modulated input drive wave, such that the instantaneous potential difference between said first power rail and said second power rail is constant.
25. The method of amplifying an input signal according to claim 24 , wherein said first and said second pulse wave modulated input drive waves are substantially identical.
26. A method of amplifying an input signal, comprising the steps of:
providing a first potential on a first power rail;
providing a second potential on a second power rail;
deriving a first input drive wave from the input signal;
deriving a second input drive wave from the input signal;
alternately connecting one of said first and said second power rails to an output stage in accordance with said first input drive wave; and
alternately connecting one of said first and said second power rails to ground in accordance with said second input drive wave, such that the instantaneous potential difference between said first power rail and said second power rail is constant.
27. The method of claim 26 , wherein said first input drive wave is a pulse train having a duty cycle greater than 50% when the input signal is positive, less than 50% when the input signal is negative, and 50% when the input signal is zero.
28. A switching output stage comprising;
a floating power supply providing a positive potential +R at a first rail and a negative potential −R at a second rail; a first single pole, double throw switch connected across the first rail and the second rail; a second single pole, double throw switch connected across the first rail and the second rail; a low pass filter connected to the output of the second switch; means for connecting the output of the low pass filter to a positive load terminal; and means for connecting ground to a negative load terminal; wherein the first switch has a common to ground and switches between a first position to the first rail and a second position to the second rail, and the second switch has a common to the low pass filter and switches between a second position to the first rail and a first position to the second rail; such that the voltage across the load is positive when the switches are in the second positions, negative when the switches are in the first positions, 0 when the first and second switches are in the first and second positions, respectively, wherein both terminals are at potential +R, and 0 when the first and second switches are in the second and first positions, respectively, wherein both terminals are at potential −R.
29. The output stage of claim 28 , wherein:
the potential +R input to the filter is achieved by switching the first switch to −R and the second switch to +R; and the input potential −R to the filter is achieved by switching the first switch to +R and the second switch to −R.
30. The output stage of claim 29 , wherein the input 0 to the filter is achieved by switching the first switch and the second switch to +R, or by switching the first switch and the second switch to −R.
31. The output stage of claim 28 , wherein the order of switch transition includes a 0 output followed by a positive or negative output followed by a 0 output followed by a positive or negative output followed by a 0 output.
32. The output stage of claim 31 , wherein the order of switch transition includes ( 1 ) switching the first switch and the second switch to +R followed by switching the first switch and the second switch to −R and ( 2 ) switching the first switch and the second switch to −R followed by switching the first switch and the second switch to +R.
33. The output stage of claim 32 , wherein switching the first switch and the second switch to +R and switching the first switch and the second switch to −R are selected alternately, one each in every other cycle.Join the waitlist — get patent alerts
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