Semiconductor device having a ferroelectric TFT and a dummy element

Abstract

The present invention provides a semiconductor device including a semiconductor element and a dummy semiconductor element adjacent to the semiconductor element. When the semiconductor element is a capacitor element including a bottom electrode, a top electrode and a dielectric layer between the electrodes, a dummy capacitor element also has dummy electrodes and a dummy dielectric layer between the dummy electrodes. The dummy electrode is located so that a space between the top electrode of the capacitor element ad the dummy top electrode is in a predetermined range (e.g. 0.3 μm to 14 μm). The dummy capacitor element prevents the capacitor dielectric layer from degrading since the collisions of the etching ions with the capacitor dielectric layer in a dry etching process is suppressed.

1. A semiconductor device comprising:
 a substrate,    a semiconductor element on the substrate, the semiconductor element including a first dielectric layer and an electrode on the first dielectric layer, and    a dummy semiconductor element on the substrate, the dummy semiconductor element including a second dielectric layer and a dummy electrode on the second dielectric layer,    wherein the dummy semiconductor element is located so that a space between the electrode and the dummy electrode is in a predetermined range, and the semiconductor device is a transistor in which the electrode works as a gate electrode of the transistor; and said first dielectric layer is composed of the material selected from a dielectric material having a dielectric constant of 100 or more and a ferroelectric material.    
     
     
       2. A semiconductor device according to  claim 1 , wherein the predetermined range of the space is between 0.3 μm and 14 μm. 
     
     
       3. A semiconductor device according to  claim 1 , wherein the electrode and the dummy electrode are composed of the same electrically conductive material. 
     
     
       4. A semiconductor device according to  claim 1 , wherein the first dielectric layer and the second dielectric layer are composed of the same dielectric material. 
     
     
       5. A semiconductor device according to  claim 1 , wherein the electrode is surrounded by the dummy electrode. 
     
     
       6. A semiconductor device comprising:
   a substrate,        a multilayer formed on the substrate, the multilayer comprising a plurality of semiconductor elements and a plurality of dummy semiconductor elements, and        a semiconductor element area on the substrate, which includes the plurality of semiconductor elements, the semiconductor element area being surrounded by the plurality of dummy semiconductor elements,        wherein each of the plurality of semiconductor elements includes a capacitor which is comprised of a bottom electrode, a first dielectric layer on the bottom electrode and a top electrode on the first dielectric layer, and the first dielectric layer is composed of a material selected from a dielectric material having a dielectric constant of  100  or more and a ferroelectric material,        wherein each of the plurality of dummy semiconductor elements includes a dummy capacitor which is comprised of a dummy bottom electrode, a second dielectric layer on the dummy bottom electrode and a dummy top electrode on the second dielectric layer, and the second dielectric layer is composed of a material selected from a dielectric material having a dielectric constant of  100  or more and a ferroelectric material,        wherein each of the plurality of dummy semiconductor elements is located so that a space between the electrode and the dummy electrode is in a predetermined range, and        wherein the multilayer is produced by a method comprising:      forming a dielectric film for the first dielectric layer and the second dielectric layer;        forming an electrically conductive film on the dielectric film;        etching the electrically conductive film so as to form the electrode and the dummy electrode, and        wherein each of the plurality of semiconductor elements and each of the plurality of dummy semiconductor elements have the same dimensions.       
     
     
       7. A semiconductor device according to  claim 6 , wherein the predetermined range of the space is between  0 . 3  μm and  14  μm. 
     
     
       8. A semiconductor device according to  claim 6 , wherein remnant polarization in the capacitor is in the range of  13  to  15  μC/cm 2 . 
     
     
       9. A semiconductor device according to  claim 6 , wherein the first dielectric layer and the second dielectric layer are composed of a material selected from SrBi x   Ta   x   O   y   , Ba   x   Sr   1-x   TiO   x   , Pb ( Zr   1-x   Ti   x ) O   3   , SrBi   2 ( Ta   1-x   Nb   x ) 2   O   9    or Bi   4   Ti   3   O   12   , where  0 ≦x≦ 1 .