Shift register and electronic apparatus

Abstract

Each of stages RS( 1 ), RS( 2 ), . . . of a shift register is constituted by six TFTs. A ratio of a channel width and a channel length (W/L) of each of these TFTs 1 to 6 is set in accordance with a transistor characteristic of each TFT in such a manner that the shift register normally operates for a long time even at a high temperature.

1. A shift register comprising a plurality of stages electrically connected to each other, each of said stages comprising:
 a first transistor having a first control terminal, which is turned on by a signal on a predetermined level supplied from one stage to said first control terminal, and outputs said signal on a predetermined level from one end of a first electric current path to the other end of said first electric current path;  
 a second transistor having a second control terminal, which is turned on in accordance with a voltage applied to a wiring between said second control terminal and the other end of said first electric current path of said first transistor, and outputs a first or second signal supplied from outside to one end of a second electric current path as an output signal from the other end of said second electric current path;  
 a load for outputting a power supply voltage supplied from outside;  
 a third transistor having a third control terminal, which is turned on in accordance with a voltage applied to a wiring between said third control terminal and the other end of said first electric current path of said first transistor, and outputs said power supply voltage, which is fed from outside through said load, from one end of a third electric current path to the other end of said third electric current path so that said power supply voltage outputted from said load is displaced to a voltage on a predetermined level; and  
 a fourth transistor having a fourth control terminal, which is turned on in accordance with a voltage applied to a wiring between said fourth control terminal and said load, has one end of a fourth electric current path, connected to the other end of said second electric current path of said second transistor, and outputs a reference voltage from the other end of said fourth electric current path to one end of said fourth electric current path,  
 a first value indicative of a channel-width/a channel-length of said fourth transistor being equal to or larger than a second value indicative of a channel-width/a channel-length of said second transistor.  
 
     
     
       2. The shift register according to  claim 1 , further comprising a fifth transistor having a fifth control terminal which resets a voltage applied to said wiring between said second control terminal of said second transistor and the other end of said first electric current path of said first transistor by turning on said fifth control terminal by an output signal of the other stage. 
     
     
       3. A shift register comprising a plurality of stages electrically connected to each other, each of said stages comprising:
 a first transistor having a first control terminal, which is turned on by a signal on a predetermined level supplied from one stage to said first control terminal, and outputs said signal on a predetermined level from one end of a first electric current path to the other end of said first electric current path;  
 a second transistor having a second control terminal, which is turned on in accordance with a voltage applied to a wiring between said second control terminal and the other end of said first electric current path of said first transistor, and outputs a first or second signal supplied from outside to one end of a second electric current path as an output signal from the other end of said second electric current path;  
 a third transistor having a third control terminal, which outputs a power supply voltage from one end of a third electric current path to the other end of said third electric current path;  
 a fourth transistor having a fourth control terminal, which is turned on in accordance with a voltage applied to a wiring between said fourth control terminal and the other end of said first electric current path of said first transistor, and outputs from one end of a fourth electric current path to the other end of said fourth electric current path said power supply voltage supplied from said third transistor so that said power supply voltage outputted from said third transistor is displaced to a voltage on a predetermined level; and  
 a fifth transistor having a fifth control terminal, which is turned on in accordance with a voltage applied to a wiring between said fifth control terminal and said third transistor, has one end of a fifth electric current path being connected to the other end of said second electric current path of said second transistor, and outputs a reference voltage from the other end of said fifth electric current path to one end of said fifth electric current path,  
 a first value indicative of a channel-width/a channel-length of said third transistor being larger than 1/20 of a second value indicative of a channel-width/a channel-length of said second transistor.  
 
     
     
       4. The shift register according to  claim 3 , further comprising a sixth transistor having a sixth control terminal, which resets a voltage applied to said wiring between said second control terminal of said second transistor and the other end of said first electric current path of said first transistor by turning on said sixth control terminal by an output signal of the other stage. 
     
     
       5. A shift register comprising a plurality of stages electrically connected to each other, each of said stages comprising:
 a first transistor having a first control terminal, which is turned on by a signal on a predetermined level supplied from one stage to said first control terminal, and outputs said signal on a predetermined level from one end of a first electric current path to the other end of said first electric current path;  
 a second transistor having a second control terminal, which is turned on in accordance with a voltage applied to a wiring between said second control terminal and the other end of said first electric current path of said first transistor, and outputs a first or second signal supplied from outside to one end of a second electric current path as an output signal from the other end of said second electric current path;  
 a third transistor having a third control terminal, which outputs a power supply voltage from one end of a third electric current path to the other end of said third electric current path;  
 a fourth transistor having a fourth control terminal, which is turned on in accordance with a voltage applied to a wiring between said fourth control terminal and the other end of said first electric current path of said first transistor, and outputs from one end of a fourth electric current path to the other end of said fourth electric current path said power supply voltage supplied from said third transistor so that said power supply voltage outputted from said third transistor is displaced to a voltage on a predetermined level;  
 a fifth transistor having a fifth control terminal, which is turned on in accordance with a voltage applied to a wiring between said fifth control terminal and said third transistor, has one end of a fifth electric current path being connected to the other end of said second electric current path of said second transistor, and outputs a reference voltage from the other end of said fifth electric current path to one end of said fifth electric current path; and  
 a sixth transistor having a sixth control terminal, which resets a voltage applied to said wiring between said second control terminal of said second transistor and the other end of said first electric current path of said first transistor by turning on said sixth control terminal by an output signal of the other stage,  
 a first value indicative of a channel-width/a channel-length of said fifth transistor being larger than a second value indicative of a channel-width/a channel-length of said first transistor.  
 
     
     
       6. The shift register according to  claim 5 , wherein a third value indicative of a channel-width/a channel-length of said second transistor is larger than said second value. 
     
     
       7. The shift register according to  claim 5 , wherein said first value is larger than a fourth value indicative of a channel-width/a channel-length of said sixth transistor. 
     
     
       8. The shift register according to  claim 5 , wherein a third value indicative of a channel-width/a channel-length of said second transistor is larger than a fourth value indicative of a channel-width/a channel-length of said sixth transistor. 
     
     
       9. The shift register according to  claim 5 , wherein said second value is larger than a fifth value indicative of a channel-width/a channel-length of said third transistor. 
     
     
       10. The shift register according to  claim 5 , wherein a fourth value indicative of a channel-width/a channel-length of said sixth transistor is larger than a fifth value indicative of a channel-width/a channel-length of said third transistor. 
     
     
       11. The shift register according to  claim 5 , wherein said second value is larger than a sixth value indicative of a channel-width/a channel-length of said fourth transistor. 
     
     
       12. The shift register according to  claim 5 , wherein a fourth value indicative of a channel-width/a channel-length of said sixth transistor is larger than a sixth value indicative of a channel-width/a channel-length of said fourth transistor. 
     
     
       13. A shift register comprising a plurality of stages electrically connected to each other, each stage of said shift register comprising:
 a first transistor having a first control terminal to which an output signal of a stage on one side is supplied and one end of an electric current path to which a first voltage signal is supplied;  
 a second transistor having a second control terminal to which an output signal of a stage on the other side is supplied and one end of an electric current path to which a second voltage signal is supplied; and  
 a third transistor having a third control terminal being connected to the other end of each electric current path of said first and second transistors, which is turned on or off by said first or second voltage signal supplied to a wiring between said third control terminal and said first or second transistor through said first or second transistor, and outputs as an output signal of the corresponding stage from the other end of an electric current path a first or second clock signal supplied to one end of said electric current path when turned on,  
 at least one of said first and second transistors discharging electric charge accumulated in said wiring by an output signal of a stage on one side or the other side supplied to said first or second control terminal.  
 
     
     
       14. The shift register according to  claim 13 , wherein one of said first and second transistors of a stage on one end in a plurality of said stages is turned on when a first control signal is supplied from outside to said control terminal, and electric charge is thereby accumulated in said wiring; and
 the other one of said first and second transistors of a stage on the other end in a plurality of said stages is turned on when a second control signal is supplied from outside to said control terminal, and electric charge accumulated in said wiring is thereby discharged.  
 
     
     
       15. The shift register according to  claim 13 , wherein by switching levels of said first and second voltage signals, electric charge is accumulated in said wiring through one of said first and second transistors, and electric charge accumulated in said wiring can be discharged through the other one of said first and second transistors. 
     
     
       16. The shift register according to  claim 15 , wherein levels of said first and second voltage signals are switched in such a manner than one of said first and second voltage signals is maintained on a low level. 
     
     
       17. The shift register according to  claim 13 , wherein a phase of said first clock signal and that of said second clock signal are different from each other by 180°. 
     
     
       18. The shift register according to  claim 13 , wherein respective transistors constituting each stage of a plurality of said stages are field effect transistors which are of the same channel type. 
     
     
       19. The shift register according to  claim 13 , further comprising:
 a fourth transistor having a fourth control terminal connected to the other end of each electric current path of said first and second transistors, which has on and off timings synchronized with said third transistor, and discharges from the other end of an electric current path a signal supplied from a voltage source to one end of said electric current path through a load when turned on; and  
 a fifth transistor having a fifth control terminal connected to said voltage source through said load, which is turned on by a signal connected from said voltage source when said fourth transistor is turned off, and has one end of an electric current path connected to the other end of an electric current path of said third transistor.  
 
     
     
       20. An electronic apparatus comprising:
 (A) a shift register comprising in each stage:  
 a first transistor having a first control terminal, which is turned on by a signal on a predetermined level supplied from one stage to said first control terminal, and outputs said signal on a predetermined level from one end of a first electric current path to the other end of said first electric current path;  
 a second transistor having a second control terminal, which is turned on in accordance with a voltage applied to a wiring between said second control terminal and the other end of said first electric current path of said first transistor, and outputs a first or second signal supplied from outside to one end of a second electric current path as an output signal from the other end of said second electric current path;  
 a third transistor having a third control terminal, which outputs a power supply voltage from one end of a third electric current path to the other end of said third electric current path;  
 a fourth transistor having a fourth control terminal, which is turned on in accordance with a voltage applied to a wiring between said fourth control terminal and the other end of said first electric current path of said first transistor, and outputs from one end of a fourth electric current path to the other end of said fourth electric current path said power supply voltage supplied from said third transistor so that said power supply voltage outputted from said third transistor is displaced to a voltage on a predetermined level;  
 a fifth transistor having a fifth control terminal, which is turned on in accordance with a voltage applied to a wiring between said fifth control terminal and said third transistor, has one end of a fifth electric current path being connected to the other end of said second electric current path of said second transistor, and outputs a reference voltage from the other end of said fifth electric current path to one end of said fifth electric current path; and  
 a sixth transistor having a sixth control terminal, which resets a voltage applied to said wiring between said second control terminal of said second transistor and the other end of said first electric current path of said first transistor by turning on said sixth control terminal by an output signal of the other stage; and  
 (B) a drive device driven in accordance with said output signals from said second transistors of said shift register,  
 a first value indicative of a channel-width/a channel-length of said fifth transistor being larger than a second value indicative of a channel-width/a channel-length of said first transistor.  
 
     
     
       21. The electronic apparatus according to  claim 20 , wherein a third value indicative of a channel-width/a channel-length of said second transistor is larger than said second value. 
     
     
       22. The electronic apparatus according to  claim 20 , wherein said first value is larger than a fourth value indicative of a channel-width/a channel-length of said sixth transistor. 
     
     
       23. The electronic apparatus according to  claim 20 , wherein a third value indicative of a channel-width/a channel-length of said second transistor is larger than a fourth value of a channel-width/a channel-length of said sixth transistor. 
     
     
       24. The electronic apparatus according to  claim 20 , wherein said second value is larger than a fifth value indicative of a channel-width/a channel-length of said third transistor. 
     
     
       25. The electronic apparatus according to  claim 20 , wherein a fourth value indicative of a channel-width/a channel-length of said sixth transistor is larger than a fifth value indicative of a channel-width/a channel-length of said third transistor. 
     
     
       26. The electronic apparatus according to  claim 20 , wherein said second value is larger than a sixth value indicative of a channel-width/a channel-length of said fourth transistor. 
     
     
       27. The electronic apparatus according to  claim 20 , wherein a fourth value indicative of a channel-width/a channel-length of said sixth transistor is larger than a sixth value indicative of a channel-width/a channel-length of said fourth transistor. 
     
     
       28. The electronic apparatus according to  claim 20 , wherein said drive device includes a liquid crystal display device. 
     
     
       29. The electronic apparatus according to  claim 20 , wherein said drive device has a photosensor. 
     
     
       30. A shift register comprising a plurality of stages electrically connected to each other, at least one of said stages comprising:
   a first transistor having a first control terminal, which is turned on by a signal on a predetermined level supplied from one stage to said first control terminal, and outputs a signal on a predetermined level from one end of a first electric current path to the other end of said first electric current path;        a second transistor having a second control terminal, which is turned on in accordance with a voltage applied to a wiring between said second control terminal and the other end of said first electric current path of said first transistor, and outputs a signal supplied from outside to one end of a second electric current path as an output signal from the other end of said second electric current path;        a load for outputting a power supply voltage supplied from outside;        a third transistor having a third control terminal, which is turned on in accordance with a voltage applied to a wiring between said third control terminal and the other end of said first electric current path of said first transistor, and outputs said power supply voltage, which is fed from outside through said load, from one end of a third electric current path to the other end of said third electric current path so that said power supply voltage outputted from said load is displaced to a voltage on a predetermined level; and        a fourth transistor having a fourth control terminal, which is turned on in accordance with a voltage applied to a wiring between said fourth control terminal and said load, has one end of a fourth electric current path, connected to the other end of said second electric current path of said second transistor, and outputs a reference voltage from the other end of said fourth electric current path to one end of said fourth electric current path;        wherein a first value indicative of a channel - width/a channel - length of said fourth transistor is equal to or larger than a second value indicative of a channel - width/a channel - length of said second transistor.     
     
     
       31. An electronic apparatus comprising:
 ( A )  a shift register comprising a plurality of stages electrically connected to each other, at least one of said stages including:        a first transistor having a first control terminal, which is turned on by a signal on a predetermined level supplied from one stage to said first control terminal, and outputs a signal on a predetermined level from one end of a first electric current path to the other end of said first electric current path;        a second transistor having a second control terminal, which is turned on in accordance with a voltage applied to a wiring between said second control terminal and the other end of said first electric current path of said first transistor, and outputs a signal supplied from outside to one end of a second electric current path as an output signal from the other end of said second electric current path;        a load for outputting a power supply voltage supplied from outside;        a third transistor having a third control terminal, which is turned on in accordance with a voltage applied to a wiring between said third control terminal and the other end of said first electric current path of said first transistor, and outputs said power supply voltage, which is fed from outside through said load, from one end of a third electric current path to the other end of said third electric current path so that said power supply voltage outputted from said load is displaced to a voltage on a predetermined level; and        a fourth transistor having a fourth control terminal, which is turned on in accordance with a voltage applied to a wiring between said fourth control terminal and said load, has one end of a fourth electric current path, connected to the other end of said second electric current path of said second transistor, and outputs a reference voltage from the other end of said fourth electric current path to one end of said fourth electric current path; and      ( B )  a drive device driven in accordance with said output signal from said at least one second transistor of said shift register;        wherein a first value indicative of a channel - width/a channel - length of said fourth transistor is equal to or larger than a second value indicative of a channel - width/a channel - length of said second transistor.     
     
     
       32. A shift register comprising a plurality of stages electrically connected to each other, at least one of said stages comprising:
   a first transistor having a first control terminal, which is turned on by a signal on a predetermined level supplied from one stage to said first control terminal, and outputs a signal on a predetermined level from one end of a first electric current path to the other end of said first electric current path;        a second transistor having a second control terminal, which is turned on in accordance with a voltage applied to a wiring between said second control terminal and the other end of said first electric current path of said first transistor, and outputs a signal supplied from outside to one end of a second electric current path as an output signal from the other end of said second electric current path;        a third transistor having a third control terminal, which outputs a power supply voltage from one end of a third electric current path to the other end of said third electric current path;        a fourth transistor having a fourth control terminal, which is turned on in accordance with a voltage applied to a wiring between said fourth control terminal and the other end of said first electric current path of said first transistor, and outputs from one end of a fourth electric current path to the other end of said fourth electric current path said power supply voltage supplied from said third transistor so that said power supply voltage outputted from said third transistor is displaced to a voltage on a predetermined level; and        a fifth transistor having a fifth control terminal, which is turned on in accordance with a voltage applied to a wiring between said fifth control terminal and said third transistor, has one end of a fifth electric current path being connected to the other end of said second electric current path of said second transistor, and outputs a reference voltage from the other end of said fifth electric current path to one end of said fifth electric current path;        wherein a first value indicative of a channel - width/a channel - length of said third transistor is larger than  1 / 20  of a second value indicative of a channel - width/a channel - length of said second transistor.     
     
     
       33. An electronic apparatus comprising:
 ( A )  a shift register comprising a plurality of stages electrically connected to each other, at least one of said stages including:        a first transistor having a first control terminal, which is turned on by a signal on a predetermined level supplied from one stage to said first control terminal, and outputs a signal on a predetermined level from one end of a first electric current path to the other end of said first electric current path;        a second transistor having a third control terminal, which is turned on in accordance with a voltage applied to a wiring between said second control terminal and the other end of said first electric current path of said first transistor, and outputs a signal supplied from outside to one end of a second electric current path as an output signal from the other end of said second electric current path;        a third transistor having a third control terminal, which outputs a power supply voltage from one end of a third electric current path to the other end of said third electric current path;        a fourth transistor having a fourth control terminal, which is turned on in accordance with a voltage applied to a wiring between said fourth control terminal and the other end of said first electric current path of said first transistor, and outputs from one end of a fourth electric current path to the other end of said fourth electric current path said power supply voltage supplied from said third transistor so that said power supply voltage outputted from said third transistor is displaced to a voltage on a predetermined level; and        a fifth transistor having a fifth control terminal, which is turned on in accordance with a voltage applied to a wiring between said fifth control terminal and said third transistor, has one end of a fifth electric current path being connected to the other end of said second electric current path of said second transistor, and outputs a reference voltage from the other end of said fifth electric current path to one end of said fifth electric current path; and      ( B )  a drive device driven in accordance with said output signal from said at least one second transistor of said shift register;        wherein a first value indicative of a channel - width/a channel - length of said third transistor is larger then  1 / 20  of a second value indicative of a channel - width/a channel - length of said second transistor.     
     
     
       34. A shift register comprising a plurality of stages electrically connected to each other, at least one of said stages comprising:
   a first transistor having a first control terminal, which is turned on by a signal on a predetermined level supplied from one stage to said first control terminal, and outputs a signal on a predetermined level from one end of a first electric current path to the other end of said first electric current path;        a second transistor having a second control terminal, which is turned on in accordance with a voltage applied to a wiring between said second control terminal and the other end of said first electric current path of said first transistor, and outputs a signal supplied from outside to one end of a second electric current path as an output signal from the other end of said second electric current path;        a third transistor having a third control terminal, which outputs a power supply voltage from one end of a third electric current path to the other end of said third electric current path;        a fourth transistor having a fourth control terminal, which is turned on in accordance with a voltage applied to a wiring between said fourth control terminal and the other end of said first electric current path of said first transistor, and outputs from one end of a fourth electric current path to the other end of said fourth electric current path said power supply voltage supplied from said third transistor so that said power supply voltage outputted from said third transistor is displaced to a voltage on a predetermined level;        a fifth transistor having a fifth control terminal, which is turned on in accordance with a voltage applied to a wiring between said fifth control terminal and said third transistor, has one end of a fifth electric current path being connected to the other end of said second electric current path of said second transistor, and outputs a reference voltage from the other end of said fifth electric current path to one end of said fifth electric current path; and        a sixth transistor having a sixth control terminal, which resets a voltage applied to said wiring between said second control terminal of said second transistor and the other end of said first electric current path of said first transistor by turning on said sixth control terminal by an output signal of the other stage;        wherein a first value indicative of a channel - width/a channel - length of said fifth transistor is larger than a second value indicative of a channel - width/a channel - length of said first transistor.     
     
     
       35. An electronic apparatus comprising:
 ( A )  a shift register comprising a plurality of stages electrically connected to each other, at least one of said stages including:        a first transistor having a first control terminal, which is turned on by a signal on a predetermined level supplied from one stage to said first control terminal, and outputs a signal on a predetermined level from one end of a first electric current path to the other end of said first electric current path;        a second transistor having a second control terminal, which is turned on in accordance with a voltage applied to a wiring between said second control terminal and the other end of said first electric current path of said first transistor, and outputs a signal supplied from outside to one end of a second electric current path as an output signal from the other end of said second electric current path;        a third transistor having a third control terminal, which outputs a power supply voltage from one end of a third electric current path to the other end of said third electric current path;        a fourth transistor having a fourth control terminal, which is turned on in accordance with a voltage applied to a wiring between said fourth control terminal and the other end of said first electric current path of said first transistor, and outputs from one end of a fourth electric current path to the other end of said fourth electric current path said power supply voltage supplied from said third transistor so that said power supply voltage outputted from said third transistor is displaced to a voltage on a predetermined level;        a fifth transistor having a fifth control terminal, which is turned on in accordance with a voltage applied to a wiring between said fifth control terminal and said third transistor, has one end of a fifth electric current path being connected to the other end of said second electric current path of said second transistor, and outputs a reference voltage from the other end of said fifth electric current path to one end of said fifth electric current path; and        a sixth transistor having a sixth control terminal, which resets a voltage applied to said wiring between said second control terminal of said second transistor and the other end of said first electric current path of said first transistor by turning on said sixth control terminal by an output signal of the other stage; and      ( B )  a drive device driven in accordance with said output signal from said at least one second transistor of said shift register;        wherein a first value indicative of a channel - width/a channel - length of said fifth transistor is larger than a second value indicative of a channel - width/a channel - length of said first transistor.     
     
     
       36. A shift register comprising a plurality of stages electrically connected to each other, at least one of said stages comprising:
   a first transistor having a first control terminal to which a signal of a stage on one side is supplied and one end of an electric current path to which a first voltage signal differing from said signal is supplied;        a second transistor having a second control terminal to which a signal of a stage on the other side is supplied and one end of an electric current path to which a second voltage signal is supplied; and        a third transistor having a third control terminal being connected to the other end of each electric current path of said first and second transistors, which is turned on or off by said first or second voltage signal supplied to a wiring between said third control terminal and said first or second transistor through said first or second transistor, and outputs as an output signal of the corresponding stage from the other end of an electric current path a clock signal supplied to one end of said electric current path when turned on;        wherein at least one of said first and second transistors discharges electric charges accumulated in said wiring by a signal of a stage on one side or the other side supplied to said first or second control terminal.     
     
     
       37. An electronic apparatus comprising:
 ( A )  a shift register comprising a plurality of stages electrically connected to each other, at least one of said stages including:        a first transistor having a first control terminal to which a signal of a stage on one side is supplied and one end of an electric current path to which a first voltage signal differing from said signal is supplied;        a second transistor having a second control terminal to which a signal of a stage on the other side is supplied and one end of an electric current path to which a second voltage signal is supplied; and        a third transistor having a third control terminal being connected to the other end of each electric current path of said first and second transistors, which is turned on or off by said first or second voltage signal supplied to a wiring between said third control terminal and said first or second transistor through said first or second transistor, and outputs as an output signal of the corresponding stage from the other end of an electric current path a clock signal supplied to one end of said electric current path when turned on;        wherein at least one of said first and second transistors discharges electric charges accumulated in said wiring by a signal of a stage on one side or the other side supplied to said first or second control terminal; and      ( B )  a drive device driven in accordance with said output signal from said at least one third transistor of said shift register.     
     
     
       38. A shift register comprising a plurality of stages electrically connected to each other, at least one of said stages comprising:
   a first transistor having a first control terminal to which a signal of a preceding stage is supplied and one end of a first electric current path to which a first voltage signal differing from said signal is supplied;        a second transistor having a second control terminal to which a signal of a next stage is supplied and one end of a second electric current path to which a second voltage signal is supplied; and        a third transistor having a third control terminal being connected to the other end of each of the first and second electric current paths of said first and second transistors, which is turned on or off by said first or second voltage signal supplied to a wiring between said third control terminal and said first or second transistor through said first or second transistor, and outputs as an output signal of the corresponding stage from the other end of a third electric current path a clock signal supplied to one end of said electric current path when turned on;        wherein at least one of said first and second transistors discharges electric charges accumulated in said wiring by a signal of said preceding stage or said next stage supplied to said first or second control terminal.     
     
     
       39. An electronic apparatus comprising:
 ( A )  a shift register comprising a plurality of stages electrically connected to each other, at least one of said stages including:        a first transistor having a first control terminal to which a signal of a preceding stage is supplied and one end of a first electric current path to which a first voltage signal differing from said signal is supplied;        a second transistor having a second control terminal to which a signal of a next stage is supplied and one end of a second electric current path to which a second voltage signal is supplied; and        a third transistor having a third control terminal being connected to the other end of each of the first and second electric current paths of said first and second transistors, which is turned on or off by said first or second voltage signal supplied to a wiring between said third control terminal and said first or second transistor through said first or second transistor, and outputs as an output signal of the corresponding stage from the other end of a third electric current path a clock signal supplied to one end of said electric current path when turned on;        wherein at least one of said first and second transistors discharges electric charges accumulated in said wiring by a signal of said preceding stage or said next stage supplied to said first or second control terminal; and      ( B )  a drive device driven in accordance with said output signal from said at least one third transistor of said shift register.     
     
     
       40. A shift register comprising a plurality of stages electrically connected to each other, at least one of said stages comprising:
   a first transistor having a first control terminal to which a signal of a preceding stage is supplied and one end of a first electric current path to which a first voltage signal differing from said signal is supplied;        a second transistor having a second control terminal to which a signal of a next stage is supplied an one end of a second electric current path to which a second voltage signal is supplied;        a third transistor having a third control terminal being connected to the other end of each of the first and second electric current paths of said first and second transistors, which is turned on or off by said first or second voltage signal supplied to a wiring between said third control terminal and said first or second transistor through said first or second transistor, and outputs as an output signal of the corresponding stage from the other end of a third electric current path a clock signal supplied to one end of said third electric current path when turned on;        a fourth transistor having a fourth control terminal, which outputs a power supply voltage from one end of a fourth electric current path to the other end of said fourth electric current path;        a fifth transistor having a fifth control terminal, which is turned on in accordance with a voltage applied to a wiring between said fifth control terminal and the other end of said first electric current path of said first transistor, and outputs from one end of a fifth electric current path to the other end of said fifth electric current path said power supply voltage supplied from said fourth transistor so that said power supply voltage outputted from said fourth transistor is displaced to a voltage on a predetermined level; and        a sixth transistor having a sixth control terminal, which is turned on in accordance with a voltage applied to a wiring between said sixth control terminal and said fourth transistor, has one end of a sixth electric current path being connected to the other end of said third electric current path of said third transistor, and outputs a reference voltage from the other end of said sixth electric current path to one end of said sixth electric current path;        wherein at least one of said first and second transistors discharges electric charges accumulated in said wiring by a signal of said preceding stage or said next stage supplied to said first or second control terminal.     
     
     
       41. An electronic apparatus comprising:
 ( A )  a shift register comprising a plurality of stages electrically connected to each other, at least one of said stages including:        a first transistor having a first control terminal to which a signal of a preceding stage is supplied and one end of a first electric current path to which a first voltage signal differing from said signal is supplied;        a second transistor having a second control terminal to which a signal of a next stage is supplied and one end of a second electric current path to which a second voltage signal is supplied;        a third transistor having a third control terminal being connected to the other end of each of the first and second electric current paths of said first and second transistors, which is turned on or off by said first or second voltage signal supplied to a wiring between said third control terminal and said first or second transistor through said first or second transistor, and outputs as an output signal of the corresponding stage from the other end of a third electric current path a clock signal supplied to one end of said third electric current path when turned on;        a fourth transistor having a fourth control terminal, which outputs a power supply voltage from one end of a fourth electric current path to the other end of said fourth electric current path;        a fifth transistor having a fifth control terminal, which is turned on in accordance with a voltage applied to a wiring between said fifth control terminal and the other end of said first electric current path of said first transistor, and outputs from one end of a fifth electric current path to the other end of said fifth electric current path said power supply voltage supplied from said fourth transistor so that said power supply voltage outputted from said fourth transistor is displaced to a voltage on a predetermined level; and        a sixth transistor having a sixth control terminal, which is turned on in accordance with a voltage applied to a wiring between said sixth control terminal and said fourth transistor, has one end of a sixth electric current path being connected to the other end of said third electric current path of said third transistor, and outputs a reference voltage from the other end of said sixth electric current path to one end of said sixth electric current path;        wherein at least one of said first and second transistors discharges electric charges accumulated in said wiring by a signal of said preceding stage or said next stage supplied to said first or second control terminal; and      ( B )  a drive device driven in accordance with said output signal from said at least one third transistor of said shift register.