Two-port ethernet line extender

Abstract

An apparatus for deployment in an outdoor environment for extending the electrical communication distance of digital data signals includes electrical isolation means for various electromagnetic effects and a high speed pulse reshaper and repeater. The isolation means includes low capacitance electric pulse suppression means so that maximum signal distance can be achieved without loss of usable pulse shape and isolation transformers on differential signal pairs that retain magnetization at elevated temperatures so that signals are not blocked. As a further feature, extended logic is included whereby the type of signals can be distinguished, thus allowing the apparatus to be daisy-chained with like apparatus or used between a termination and a line.

1. An apparatus for extending propagation distance of digital data signals over distance-limited wire media comprising:
 a first multiple-pin connector configured to carry first input signals in a first differential pair, to carry first output signals in a second differential pair, and to carry power;  
 a second multiple-pin connector configured to carry second input signals in a third differential pair, to carry second output signals in a fourth differential pair, and to carry power;  
 a power line between the first connector and the second connector;  
 a ground line between the first connector and the second connector;  
 electromagnetic chokes adjacent ingress locations in the power line;  
 electromagnetic chokes adjacent ingress locations in the ground line;  
 transient voltage protection means between the power line and the ground line operative to filter both common mode transient voltage and differential transient voltage in order to isolate said apparatus from unwanted transients;  
 a low-capacitance electric pulse suppression means operative to suppress both voltages and current anomalies in order to achieve maximum distance of signal in usable pulse shape, between each element of said first, second, third and fourth differential pairs and ground adjacent each said first and second connector;  
 a first pulse shaping and repeating circuit for shaping and repeating pulses of said input signals received and for transmitting said output signals;  
 a second pulse shaping and repeating circuit for shaping and repeating pulses of said input signals received and for transmitting said output signals;  
 first isolation transformers coupled between said first connector and said first pulse shaping circuit for common mode transient and voltage isolation and for electromagnetic interference filtering of said first differential pair and said second differential pair from said first pulse shaping circuit, said first isolation transformers being capable of maintaining magnetizing inductance at elevated temperatures;  
 second isolation transformers coupled between said second connector and said second pulse shaping circuit for common mode transient and voltage isolation and for electromagnetic interference filtering of said third differential pair and said fourth differential pair from said second pulse shaping circuit, said second isolation transformers being capable of maintaining magnetizing inductance at elevated temperatures;  
 a programmed logic device coupled to said first and second pulse shaping circuits for coupling input signals originating from the first connector directed to the second connector and for coupling input signals originating from the second connector directed to the first connector; and  
 a microcontroller coupled to said pulse shaping and repeating circuit for distinguishing and controlling between types of input signals and output signals, and for managing control signals for compatibility.  
 
     
     
       2. The apparatus according to  claim 1  wherein said microcontroller comprises means operative to distinguish between full duplex and half duplex as well as to sense speed. 
     
     
       3. The apparatus according to  claim 1  wherein said pulse shaping and repeating circuits are coupled to said programmed logic element  device through a reduced media independent interface bus. 
     
     
       4. The apparatus according to  claim 1  wherein said pulse shaping and repeating circuits are each a low-power physical layer transceiver and protocol control device. 
     
     
       5. An apparatus for bidirectional distribution of packet-switched digital data signals over distance-limited wire media in an outdoor environment comprising:
 a first multiple-pin connector configured to carry first input signals in a first differential pair and in a fifth differential pair, to carry first output signals in a second differential pair and in a sixth differential pair, and to carry power;  
 a second multiple-pin connector configured to carry second input signals in a third differential pair and in a seventh differential pair, to carry second output signals in a fourth differential pair and in an eighth differential pair, and to carry power;  
 a power line;  
 a ground line;  
 electromagnetic chokes adjacent ingress locations in the power line;  
 electromagnetic chokes adjacent ingress locations in the ground line;  
 transient voltage protection means between the power line and the ground line operative to filter both common mode transient voltage and differential transient voltage in order to isolate said apparatus from unwanted transients;  
 a low-capacitance electric pulse suppression means operative to suppress both voltages and current anomalies in order to achieve maximum distance of signal in usable pulse shape, between each element of said first, second, third and fourth differential pairs and ground adjacent each said first and second connector;  
 a first pulse shaping and repeating circuit for shaping and repeating pulses of said input signals received and for transmitting said output signals;  
 a second pulse shaping and repeating circuit for shaping and repeating pulses of said input signals received and for transmitting said output signals;  
 first isolation transformers coupled between said first connector and said first pulse shaping circuit for common mode transient and voltage isolation and for electromagnetic interference filtering of said differential pairs of the first connector from said first pulse shaping circuit, said isolation transformers being capable of maintaining magnetizing inductance at elevated temperatures;  
 second isolation transformers coupled between said second connector and said second pulse shaping circuit for common mode transient and voltage isolation and for electromagnetic interference filtering of said differential pairs of the second connector from said second pulse shaping circuit, said isolation transformers being capable of maintaining magnetizing inductance at elevated temperatures;  
 a programmed logic device coupled to said first and second pulse shaping circuits for coupling input signals originating from the first connector directed to the second connector and for coupling input signals originating from the second connector directed to the first connector; and  
 a microcontroller coupled to said pulse shaping and repeating circuit  circuits for distinguishing and controlling between types of input signals and output signals, and for managing control signals for compatibility.  
 
     
     
       6. A line extender configured to be coupled to a first device and a second device, wherein said line extender is configured to receive first input data on a first pair of lines from said first device and repeat said received first input data onto a second pair of lines for transmission to the second device, and wherein said line extender is configured to receive second input data on a third pair of lines from said second device and repeat said received second input data onto a fourth pair of lines for transmission to the first device, said line extender comprising:
   a plurality of low - capacitance overvoltage suppression circuits coupled between the lines of the first, second, third and fourth pairs of lines and a ground;        a power supply configured to generate a supply voltage for said line extender based upon a potential difference between said first pair of lines and said fourth pair of lines;        wherein the line extender is configured to convey power from the first and fourth pairs to the second and third pairs.      
     
     
       7. The line extender of  claim 6 , wherein the second device is network interface device.  
     
     
       8. The line extruder of  claim 6 , wherein the second device is a second line extender.  
     
     
       9. The line extender of  claim 6 , wherein the first device is an Ethernet switch.  
     
     
       10. The line extender of  claim 6  further comprising:
   a first electromagnetic choke coupled between the first pair of lines and a first input of the power supply;        a second electromagnetic choke coupled between the second pair of lines and a second input of the power supply.      
     
     
       11. The line extender of  claim 6  further comprising:
   a first line coupling the first pair of lines to the power supply;        a second line coupling the fourth pair of lines to the power supply;        a transient voltage protection suppressor coupled between the first and second lines.      
     
     
       12. The line extender of  claim 6  further comprising:
   first circuitry configured to:      receive the first input data on the first pair of lines from said first device,        repeat said received first input data onto the second pair of lines for transmission to the second device,        receive the second input data on the third pair of lines from said second device,        repeat said received second input data onto the fourth pair of lines for transmission to the first device.        
     
     
       13. The line extender of  claim 12 , wherein the first circuitry includes:
   a first pulse shaping and repeating circuit coupled to the first and fourth pairs;        a second pulse shaping and repeating circuit coupled to the second and third pairs;        a programmable logic device coupling between the first and second pulse shaping and repeating circuits, wherein the programmable logic device is configured to forward the first input data from the first pulse shaping and repeating circuit to the second pulse shaping and repeating circuit and to forward the second input data from the second pulse shaping and repeating circuit to the first pulse shaping and repeating circuit.      
     
     
       14. The line extender of  claim 13 , wherein the first circuitry also includes:
   a first set of isolation transformers coupled to the first and fourth pairs and to the first pulse shaping and repeating circuit, said first set of isolation transformers being configured to maintain magnetizing inductance at elevated temperatures;        a second set of isolation transformers coupled to the second and third pairs and to the second pule shaping and repeating circuit, said second set of isolation transformers being configured to maintain magnetizing inductance at elevated temperatures.      
     
     
       15. The line extender of  claim 12  further comprising:
   a microcontroller coupled to first circuitry for controlling rate and mode negotiation between the line extender and the first device and the between the line extender and the second device.      
     
     
       16. The line extender of  claim 6  further comprising:
   a first line coupling between the first pair of lines and the second pair of lines;        a second line coupling between the third pair of lines and the fourth pair of lines; and        wherein said power is conveyed through the first line and second line.      
     
     
       17. The line extender of  claim 16 , wherein the first line couples to the first pair of lines so as to receive a first common mode voltage of the first pair of lines, wherein the second line couples to the fourth pair of lines so as to receive a second common mode voltage of the fourth pair of lines, wherein the first potential difference is a difference between the first common mode voltage and the second common mode voltage.  
     
     
       18. The line extender of  claim 16  further comprising:
   a bidirectional transient voltage suppressor coupled between the first line and said ground.      
     
     
       19. The line extender of  claim 6  wherein the potential difference between said first pair of lines and said fourth pair of lines is a difference between a first common mode voltage of the first pair of lines and a second common mode voltage of the fourth pair of lines, wherein the first, second, third and fourth pairs of lines are differential pairs.  
     
     
       20. An apparatus, comprising:
   a first connector configured to carry first input data on a first differential pair of lines and to carry first output data on a second differential pair of lines;        a second connector configured to carry second input data on a third differential pair of lines and to carry second output data on a fourth differential pair of lines;        a plurality of low - capacitance electric pulse suppression devices coupled between ground and the lines of the first, second, third and fourth differential pairs;        a first pulse shaping and repeating circuit;        a second pulse shaping and repeating circuit;        a first set of isolation transformers coupled between said first pulse shaping and repeating circuit and said first and second differential pairs, wherein said first set of isolation transformers is configured to maintain magnetizing inductance at elevated temperatures;        a second set of isolation transformers coupled between said second pulse shaping and repeating circuit and said third and fourth differential pairs, wherein said second set of isolation transformers is configured to maintain magnetizing inductance at elevated temperatures;        a programmable logic device coupling between the first pulse shaping and repeating circuit and the second pulse shaping and repeating circuit, wherein the programmable logic device is configured to  ( a )  receive the first input data from the first pulse shaping and repeating circuit and to forward the first input data as the second output data to the second pulse shaping and repeating circuit and  ( b )  receive the second input data from the second pulse shaping and repeating circuit and forward the second input data as the first output data to the first pulse shaping and repeating circuit;        first circuitry configured to convey power from the first and second differential pairs to the third and fourth differential pairs, wherein the first circuitry includes:      a first circuit path coupled between the first differential pair and the fourth differential pair;        a second circuit path coupled between the second differential pair and the third differential pair;        a plurality of electromagnetic chokes in the first circuit path and the second circuit path; and        a transient voltage protection device coupled between the first circuit path and the second circuit path;          a power supply configured to generate a supply voltage for said apparatus based upon a potential difference between said first circuit path and said second circuit path.      
     
     
       21. The apparatus of  claim 20 , further comprising a microcontroller coupled to first pulse shaping and repeating circuit and the second pulse shaping and repeating circuit, wherein the microcontroller is configured for controlling rate and mode negotiation.  
     
     
       22. The apparatus of  claim 20  further comprising a bidirectional transient voltage suppressor coupled between the second circuit path and said ground.  
     
     
       23. The apparatus of  claim 20 , wherein the first circuit path is coupled to a common mode voltage of the first differential pair and a common mode voltage of the fourth differential pair, wherein the second circuit path is coupled to a common mode voltage of the second differential pair and a common mode voltage of the third differential pair.  
     
     
       24. The apparatus of  claim 20 ,
   wherein the first connector is further configured to carry third input data on a fifth differential pair of lines and to carry third output data on a sixth differential pair of lines;        wherein the second connector is further configured to carry fourth input data on a seventh differential pair of lines and to carry fourth output data on an eighth differential pair of lines;        wherein the first set of isolation transformers is also coupled to said fifth and sixth differential pairs;        wherein the second set of isolation transformers is also coupled to said seventh and eighth differential pairs; and        wherein the programmable logic device is further configured to  ( c )  receive the third input data from the first pulse shaping and repeating circuit and to forward the third input data as the fourth output data to the second pulse shaping and repeating circuit and  ( d )  receive the fourth input data from the second pulse shaping and repeating circuit and forward the fourth input data as the third output data to the first pulse shaping and repeating circuit.      
     
     
       25. An apparatus, comprising:
   a first connector configured to carry first input data on a first differential pair of lines and to carry first output data on a second differential pair of lines;        a second connector configured to carry second input data on a third differential pair of lines and to carry second output data on a fourth differential pair of lines;        a plurality of low - capacitance electric pulse suppression devices coupled between ground and the lines of the first, second, third and fourth differential pairs;        a first means for performing pulse shaping and repeating;        a second means for achieving electrical isolation between said first means and said first and second differential pairs;        a third means for achieving electrical isolation between said first means and said third and fourth differential pairs;        a fourth means for  ( a )  receiving the first input data from the first means and forwarding the first input data as the second output data to the first means and  ( b )  receiving the second input data from the first means and forwarding the second input data as the first output data to the first means;        a fifth means, coupled to the first means, for controlling rate and mode negotiation;        first circuitry configured to convey power from the first and second differential pairs to the third and fourth differential pairs, wherein the first circuitry includes:      a first circuit path coupled between the first differential pair and the fourth differential pair;        a second circuit path coupled between the second differential pair and the third differential pair;        a plurality of electromagnetic chokes in the first circuit path and the second circuit path; and        a transient voltage protection device coupled between the first circuit path and the second circuit path; and          a power supply configured to generate a supply voltage for said apparatus based upon a potential difference between said first circuit path and said second circuit path.      
     
     
       26. The apparatus of  claim 25  further comprising a bidirectional transient voltage suppressor coupled between the second circuit path and said ground.  
     
     
       27. The apparatus of  claim 25 , wherein the first circuit path couples to the first differential pair so as to receive a first common mode voltage of the first differential pair, wherein the second circuit path couples to the second differential pair so as to receive a second common mode voltage of the second differential pair, wherein the first potential difference is a difference between the first common mode voltage and the second common mode voltage.  
     
     
       28. A neighborhood area network, comprising:
   a line extender including:        a first connector configured to carry first data on a first differential pair of lines and to carry second data on a second differential pair of lines;        a second connector configured to carry third data on a third differential pair of lines and to carry fourth data on a fourth differential pair of lines;        a plurality of low - capacitance electric pulse suppression devices coupled between ground and the lines of the first, second, third and fourth differential pairs;        a first pulse shaping and repeating circuit;        a second pulse shaping and repeating circuit;        a first set of isolation transformers coupled between said first pulse shaping and repeating circuit and said first and second differential pairs, wherein said first set of isolation transformers is configured to maintain magnetizing inductance at elevated temperatures;        a second set of isolation transformers coupled between said second pulse shaping and repeating circuit and said third and fourth differential pairs, wherein said second set of isolation transformers is configured to maintain magnetizing inductance at elevated temperatures;        a programmable logic device coupling between the first pulse shaping and repeating circuit and the second pulse shaping and repeating circuit, wherein the programmable logic device is configured to  ( a )  receive the first data from the first pulse shaping and repeating circuit and to forward the first data as the fourth data to the second pulse shaping and repeating circuit and  ( b )  receive the third data from the second pulse shaping and repeating circuit and forward the third data as the second data to the first pulse shaping and repeating circuit;        a microcontroller coupled to the first pulse shaping and repeating circuit and the second pulse shaping and repeating circuit, wherein the microcontroller is configured for controlling rate and mode negotiation;        first circuitry configured to convey power from the first and second differential pairs to the third and fourth differential pairs, wherein the first circuitry includes:      a first circuit path coupled between the first differential pair and the fourth differential pair;        a second circuit path coupled between the second differential pair and the third differential pair;        a plurality of electromagnetic chokes in the first circuit path and the second circuit path; and        a transient voltage protection device coupled between the first circuit path and the second circuit path; and          a power supply configured to generate a supply voltage for said line extender based upon a potential difference between said first circuit path and said second circuit path;        a first device coupled to the line extender via the first connector and configured to transmit the first data and receive the second data; and        a second device coupled to the line extender via the second connector and configured to transmit the third data and receive the fourth data.      
     
     
       29. The neighborhood area network of  claim 28 , wherein the second device is network interface device.  
     
     
       30. The neighborhood area network of  claim 28 , wherein the second device is a second line extender.  
     
     
       31. The neighborhood area network of  claim 28 , wherein the first device is an Ethernet switch.  
     
     
       32. A method for extending propagation distance of digital data signals over distance- limited wire media, the method comprising:      receiving first signals on a first differential pair of lines and receiving second signals on a second differential pair of lines;        operating on the first signals to generate first intermediate signals, wherein said operating provides electrical isolation, including at elevated temperatures;        operating on the second signals to generate second intermediate signals, wherein said operating provides electrical isolation, including at elevated temperatures;        performing pulse shaping and repeating on the first intermediate signals in order to generate third signals;        performing pulse shaping and repeating on the second intermediate signals in order to generate fourth signals;        transmitting the third signals on a third differential pair of lines;        transmitting the fourth signals on a fourth differential pair of lines;        performing rate and mode negotiation with respect to a first external device and a second external device;        conveying power from the first and fourth differential pairs to the second and third differential pairs using a first circuit path and a second circuit path, wherein said conveying power includes:      performing filtering using electromagnetic chokes along the first circuit path and second circuit path; and        providing transient voltage protection between the first circuit path and second circuit path;          generating a supply voltage based upon a potential difference between the first differential pair and the fourth differential pair;        providing low - capacitance electric pulse suppression for the lines of the first, second, third and fourth differential pairs.      
     
     
       33. The method of  claim 32 , wherein said conveying power also includes providing bidirectional transient voltage suppression for the second circuit path relative to ground.  
     
     
       34. The method of  claim 32  further comprising: stopping said conveying of power using a resettable fuse.  
     
     
       35. An apparatus, comprising:
   a first connector including first, second, third and fourth differential pairs of lines, wherein the first connector is configured to carry first input data on the first differential pair of lines and to carry first output data on the second differential pair of lines;        a second connector including fifth, sixth, seventh and eighth differential pairs of lines, wherein the second connector is configured to carry second input data on the fifth differential pair of lines and to carry second output data on the sixth differential pair of lines;        a plurality of low - capacitance electric pulse suppression devices coupled between ground and the lines of the first, second, third, fourth, fifth, sixth, seventh and eighth differential pairs;        a first pulse shaping and repeating circuit;        a second pulse shaping and repeating circuit;        a first set of isolation transformers coupled between said first pulse shaping and repeating circuit and said first and second differential pairs, wherein said first set of isolation transformers is configured to maintain magnetizing inductance at elevated temperatures;        a second set of isolation transformers coupled between said second pulse shaping and repeating circuit and said fifth and sixth differential pairs, wherein said second set of isolation transformers is configured to maintain magnetizing inductance at elevated temperatures;        a programmable logic device coupling between the first pulse shaping and repeating circuit and the second pulse shaping and repeating circuit, wherein the programmable logic device is configured to  ( a )  receive the first input data from the first pulse shaping and repeating circuit and to forward the first input data as the second output data to the second pulse shaping and repeating circuit and  ( b )  receive the second input data from the second pulse shaping and repeating circuit and forward the second input data as the first output data to the first pulse shaping and repeating circuit;        first circuitry configured to convey power from the third and fourth differential pairs to the seventh and eighth differential pairs, wherein the first circuitry includes:      a first circuit path coupled between the third differential pair and the eighth differential pair;        a second circuit path coupled between the fourth differential pair and the seventh differential pair;        a plurality of electromagnetic chokes in the first circuit path and the second circuit path; and        a transient voltage protection device coupled between the first circuit path and the second circuit path;          a power supply configured to generate a supply voltage for said apparatus based upon a potential difference between said first circuit path and said second circuit path.      
     
     
       36. The apparatus of  claim 35 , wherein the third, fourth, seventh and eighth differential pairs are not used for transfer data.  
     
     
       37. The apparatus of  claim 35 ,
   wherein the first connector is further configured to carry third input data on said third differential pair of lines and to carry third output data on said fourth differential pair of lines;        wherein the second connector is further configured to carry fourth input data on said seventh differential pair of lines and to carry fourth output data on said eighth differential pair of lines;        wherein the first set of isolation transformers is also coupled to said third and fourth differential pairs;        wherein the second set of isolation transformers is also coupled to said seventh and eighth differential pairs; and        wherein the programmable logic device is further configured to  ( c )  receive the third input data from the first pulse shaping and repeating circuit and to forward the third input data as the fourth output data to the second pulse shaping and repeating circuit and  ( d )  receive the fourth input data from the second pulse shaping and repeating circuit and forward the fourth input data as the third output data to the first pulse shaping and repeating circuit.      
     
     
       38. The apparatus of  claim 35 , further comprising a microcontroller coupled to first pulse shaping and repeating circuit and the second pulse shaping and repeating circuit, wherein the microcontroller is configured for controlling rate and mode negotiation.  
     
     
       39. The apparatus of  claim 35  further comprising a bidirectional transient voltage suppressor coupled between the second circuit path and said ground.  
     
     
       40. The apparatus of  claim 35 , wherein the first circuit path is coupled to a common mode voltage of the third differential pair and a common mode voltage of the eighth differential pair, wherein the second circuit path is coupled to a common mode voltage of the fourth differential pair and a common mode voltage of the seventh differential pair.