Impedance blocking filter circuit

Abstract

An impedance blocking filter circuit is provided for use in telecommunication systems for interconnecting between incoming telephone lines and customer's terminal equipment so as to unconditionally block impedances above 20 KHz a desired frequency range due to the customer's terminal equipment from an ADSL a DSL network unit and/or home networking interface unit. The filter circuit includes first, second, and third inductors connected in series between a first input terminal and a first common point. A first resistor has its one end connected also to the first common point and its other end connected to a first output terminal. Fourth, fifth and sixth inductors are connected in series between a second input terminal and a second common point. A second resistor has its one end also connected to the second common point and its other end connected to a second output terminal. A capacitor has its ends connected across the first and second common points. In other aspects, the filter circuit also includes switching means for eliminating shunt additive capacitance, correction circuit means reducing significantly return loss, and switch suppression circuit means for eliminating transients. In one exemplary embodiment, the filter circuit is adapted to block impedances above 20 KHz and comprises a series of inductors disposed electrically between respective ones of first and second input terminals and output terminals. First and second switches responsive to loop current are disposed in series with respective capacitors between the series of inductors.

1. An impedance blocking filter circuit used in telecommunication systems for interconnecting between incoming telephone lines and customer's terminal equipment so as to unconditionally block impedances from above 20 KHz due to the customer's terminal equipment from an ADSL network unit and/or home networking interface unit, said filter circuit comprising:
 first and second third inductors connected in series between a first input terminal and a first common point;    said first inductor having its one end connected to said first input terminal and its other end connected to one end of said second inductor, said second inductor having its other end connected to said first common point;    third and fourth inductors connected in series between a second input terminal and a second common point;    said third inductor having its one end connected to said second input terminal and its other end connected to one end of said fourth inductor, said fourth inductor having its other end connected to said second common point;    first switching means having a first end and a second end and being responsive to DC loop current for electrically connecting said first end to said second end;    a first capacitor having a first end connected to said first common point and a second end connected to said first end of said switching means, said second end of said switching means being connected to said second common point;    a fifth inductor having a first end connected to said first common point and a second end connected to a first output terminal, and a sixth inductor having a first end connected to said second common point and a second end connected to a second output terminal;    second switching means having a first end and a second end and being responsive to said DC loop current for electrically connecting said first end to said second end;    a second capacitor having a first end connected to said sixth inductor at a first node and a second end connected to said first end of said second switching means, said second end of said second switching means being connected to said fifth inductor at a second node;    switch suppression circuit means interconnected between said first and second common points for preventing transients caused by actuation of said first and second switching means from being fed back into the incoming telephone lines; and    correction circuit means interconnected between said first and second nodes and said output terminals for significantly reducing return loss caused by inductive impedance when the customer's terminal equipment goes off-hook.    
     
     
       2. An impedance blocking filter circuit as claimed in  claim 1 , wherein said correction circuit means is comprised of a first tank circuit and a second tank circuit, said first tank circuit being formed of a first winding inductor, a first tank capacitor, and a first tank resistor all connected in parallel and between said first node and said first output terminal, second tank circuit being formed of a second winding inductor, a second tank capacitor, and a second tank resistor all connected in parallel and between said second node and said second output terminal. 
     
     
       3. An impedance blocking filter circuit as claimed in  claim 2 , further comprising a seventh inductor having a first end connected to said fifth inductor at said first node and a second end connected to said first tank circuit, and an eighth inductor having a first end connected to said sixth inductor at said second node and a second end connected to said second tank circuit. 
     
     
       4. An impedance blocking filter circuit as claimed in  claim 3 , wherein said first switching means includes a first reed switch and said second switching means includes a second reed switch. 
     
     
       5. An impedance blocking filter circuit as claimed in  claim 4 , wherein said first winding of said first tank circuit, said second winding of said second tank circuit, said first reed switch, and said second reed switch are arranged in a dual winding inductor structure. 
     
     
       6. An impedance blocking filter circuit as claimed in  claim 5 , wherein said first winding of said first tank circuit and said first reed switch is arranged in a first current sensor unit, said second winding of said second tank circuit and said second reed switch is arranged in a second current sensor unit. 
     
     
       7. An impedance blocking filter circuit as claimed in  claim 1 , further comprising a first metal-oxide or silicon varistor connected in series with said first capacitor and in parallel with said first switching means, and a second metal-oxide or silicon varistor connected in series with said second capacitor and in parallel with said second switching means. 
     
     
       8. An impedance blocking filter circuit as claimed in  claim 7 , wherein said switch suppression circuit means includes a ninth inductor, a tenth inductor, and a third capacitor. 
     
     
       9. An impedance blocking filter circuit as claimed in  claim 8 , wherein said ninth inductor has a first end connected to said second inductor and a second end connected to said fifth inductor, said tenth inductor has a first end connected to said fourth inductor and a second end connected to said sixth inductor, and said third capacitor has a first end connected to the junction of said second and fifth inductors and a second end connected to the junction of said third and sixth inductors. 
     
     
       10. An impedance blocking filter circuit used in telecommunication systems for interconnecting between incoming telephone lines and customer's terminal equipment so as to unconditionally block impedances from above 20 KHz due to the customer's terminal equipment from an ADSL network unit and/or home networking interface unit, said filter circuit comprising:
 first and second third inductors connected in series between a first input terminal and a first common point;    said first inductor having its one end connected to said first input terminal and its other end connected to one end of said second inductor, said second inductor having its other end connected to said first common point;    third and fourth inductors connected in series between a second input terminal and a second common point;    said third inductor having its one end connected to said second input terminal and its other end connected to one end of said fourth inductor, said fourth inductor having its other end connected to said second common point;    transistor switching means interconnected between said first and second common points and being responsive to DC loop current for eliminating shunt capacitance caused by other filter circuits connected to on-hook telephone sets;    a fifth inductor having a first end connected to said first common point and a second end connected to a first output terminal, and a sixth inductor having a first end connected to said second common point and a second end connected to a second output terminal; and    correction circuit means interconnected between said fifth and sixth inductors and said output terminals for significantly reducing return loss caused by inductive impedance when the customer's terminal equipment goes off-hook.    
     
     
       11. An impedance blocking filter circuit as claimed in  claim 10 , wherein said transistor switching means is comprised of a pair of transistors, a resistor, first and second capacitors, and first and second varistors. 
     
     
       12. An impedance blocking filter circuit as claimed in  claim 10 , wherein said correction circuit means is comprised of a first tank circuit and a second tank circuit, said first tank circuit being formed of a first winding inductor, a first tank capacitor, and a first tank resistor all connected in parallel and between said fifth inductor and said first output terminal, second tank circuit being formed of a second winding inductor, a second tank capacitor, and a second tank resistor all connected in parallel and between said sixth inductor and said second output terminal. 
     
     
       13. An impedance blocking filter circuit used in telecommunication systems for interconnecting between incoming telephone lines and customer's terminal equipment so as to unconditionally block impedances from above 20 KHz due to the customer's terminal equipment from an ADSL network unit and/or home networking interface unit, said filter circuit comprising:
 first and second inductors connected in series between a first input terminal and a first common point;    said first inductor having its one end connected to said first input terminal and its other end connected to one end of said second inductor, said second inductor having its other end connected to said first common point;    third and fourth inductors connected in series between a second input terminal and a second common point;    said third inductor having its one end connected to said second input terminal and its other end connected to one end of said fourth inductor, said fourth inductor having its other end connected to said second common point;    first switching means having a first end and a second end and being responsive to DC loop current for electrically connecting said first end to said second end;    a first capacitor having a first end connected to said first common point and a second end connected to said first end of said switching means, said second end of said switching means being connected to said second common point; and    switch suppression circuit means interconnected between said first and second common points for preventing transients caused by actuation of said first switching means from being fed back into the incoming telephone lines.    
     
     
       14. An impedance blocking filter circuit as claimed in  claim 13 , further comprising a fifth inductor having a first end connected to said first common point and a second end connected to a first output terminal, and an sixth inductor having a first end connected to said second common point and a second end connected to a second output terminal. 
     
     
       15. An impedance blocking filter circuit as claimed in  claim 14 , wherein said first switching means includes a reed switch. 
     
     
       16. An impedance blocking filter circuit as claimed in  claim 15 , wherein said first through fourth inductors and said reed switch are arranged in a dual winding ferrite core inductor device. 
     
     
       17. An impedance blocking filter circuit as claimed in  claim 13 , further comprising a metal-oxide varistor connected in series with said first capacitor and in parallel with said first switching means. 
     
     
       18. A filter circuit used in telecommunication systems, comprising:
   at least one first inductor disposed electrically between a first input terminal and a first common point;        at least one second inductor disposed electrically between a second input terminal and a second common point;        at least one first switch responsive to loop current;        at least one first capacitor, said at least one first capacitor and said at least one first switch being disposed in electrical series between said first and second common points;        at least one third inductor disposed electrically between said first common point and a first output terminal;        at least one fourth inductor disposed electrically between said second common point and a second output terminal;        at least one second switch responsive to loop current; and        at least one second capacitor, said at least one second capacitor and said at least one second switch being disposed in electrical series between first and second nodes disposed electrically between said at least one third inductor and said first output terminal, and said at least one fourth inductor and said second output terminal, respectively.     
     
     
       19. The filter circuit of  claim 18 , further comprising a suppression circuit disposed electrically between said first and second common points, said suppression circuit preventing transients caused by actuation of said at least one first and second switches from being fed back into incoming telephone lines. 
     
     
       20. The filter circuit of  claim 18 , further comprising at least one correction circuit disposed electrically between said first and second nodes and said first and second output terminals. 
     
     
       21. The filter circuit of  claim 20 , wherein said at least one correction circuit comprises first and second tank circuits adapted to reduce return loss caused by inductive impedance when customer terminal equipment goes off- hook.   
     
     
       22. The filter circuit of  claim 19 , further comprising at least one tank correction circuit disposed electrically between said first and second nodes and said first and second output terminals. 
     
     
       23. The filter circuit of  claim 22 , wherein said at least one tank correction circuit comprises first and second tank circuits, said first tank circuit being formed of a first winding inductor, a first tank capacitor, and a first tank resistor all connected in parallel and between said first node and said first output terminal, second tank circuit being formed of a second winding inductor, a second tank capacitor, and a second tank resistor all connected in parallel and between said second node and said second output terminal. 
     
     
       24. The filter circuit of  claim 23 , further comprising at least one fifth inductor disposed electrically between said first node and said first tank circuit, and at least one sixth inductor disposed electrically between said second node and said second tank circuit. 
     
     
       25. The filter circuit of  claim 18 , wherein said at least one first switch includes a first reed switch, and said at least one second switch includes a second reed switch. 
     
     
       26. The filter circuit of  claim 23 , wherein said at least one first switch includes a first reed switch, and said at least one second switch includes a second reed switch. 
     
     
       27. The filter circuit of  claim 26 , wherein said first winding of said first tank circuit, said second winding of said second tank circuit, said first reed switch, and said second reed switch are arranged in a dual winding inductor structure. 
     
     
       28. The filter circuit of  claim 27 , wherein said first winding of said first tank circuit and said first reed switch is arranged in a first current sensor unit, said second winding of said second tank circuit and said second reed switch is arranged in a second current sensor unit. 
     
     
       29. The filter circuit of  claim 18 , further comprising a first metal- oxide or silicon varistor connected in series with said at least one first capacitor and in parallel with said at least one first switch, and a second metal - oxide or silicon varistor connected in series with said at least one second capacitor and in parallel with said at least one second switch.   
     
     
       30. The filter circuit of  claim 18 , wherein said filter circuit is used to interconnect between incoming telephone lines and customer's terminal equipment so as to block impedances from about  20  KHz due to the customer's terminal equipment from an ADSL network unit and/or home networking interface unit. 
     
     
       31. An impedance blocking filter circuit used in telecommunication systems, comprising:
   at least one first inductor disposed electrically between a first input terminal and a first common point;        at least one second inductor disposed electrically between a second input terminal and a second common point;        at least one transistor switch responsive to loop current and electrically interconnected between said first and second common points;        at least one third inductor disposed electrically between said first common point and a first output terminal;        at least one fourth inductor disposed electrically between said second common point and a second output terminal; and        at least first and second correction circuits disposed electrically in series with said third and fourth inductors, respectively.     
     
     
       32. The filter circuit of  claim 31 , wherein said at least first and second correction circuit comprises first and second tank circuits, said first tank circuit being formed of a first winding inductor, a first tank capacitor, and a first tank resistor all connected in parallel, said second tank circuit being formed of a second winding inductor, a second tank capacitor, and a second tank resistor all connected in parallel. 
     
     
       33. The filter circuit of  claim 31 , wherein said at least one transistor switch is adapted to eliminate shunt capacitance caused by other filter circuits connected to on- hook telephone sets in signal communication with said filter circuit.   
     
     
       34. The filter circuit of  claim 31 , wherein said at least one transistor switch comprises of at least one transistor, resistor, capacitor, and varistor. 
     
     
       35. An impedance blocking filter circuit used in telecommunication systems for interconnecting between incoming telephone lines and customer's terminal equipment so as to unconditionally block impedances from above  20  KHz due to the customer's terminal equipment from an ADSL network unit and/or home networking interface unit, said filter circuit comprising:
   first and second inductors connected in series between a first input terminal and a first common point;        said first inductor having its one end connected to said first input terminal and its other end connected to one end of said second inductor, said second inductor having its other end connected to said first common point;        third and fourth inductors connected in series between a second input terminal and a second common point;        said third inductor having its one end connected to said second input terminal and its other end connected to one end of said fourth inductor, said fourth inductor having its other end connected to said second common point;        first switching means having a first end and a second end and being responsive to DC loop current for electrically connecting said first end to said second end;        a first capacitor having a first end connected to said first common pint and a second end connected to said first end of said switching means, said second end of said switching means being connected to said second common point;        a fifth inductor having a first end connected to said first common point and a second end connected to a first output terminal, and a sixth inductor having a first end connected to said second common point and a second end connected to a second output terminal;        second switching means having a first end and a second end and being responsive to said DC loop current for electrically connecting said first end to said second end;        a second capacitor having a first end connected to said sixth inductor at a first node and a second end connected to said first end of said second switching means, said second end of said second switching means being connected to said fifth inductor at a second node;        switch suppression circuit means interconnected between said first and second common points for preventing transients caused by actuation of said first and second switching means from being fed back into the incoming telephone lines; and        correction circuit means interconnected between said first and second nodes and said output terminals for significantly reducing return loss caused by inductive impedance when the customer's terminal equipment goes off - hook.     
     
     
       36. An impedance blocking filter circuit as claimed in  claim 35 , wherein said correction circuit means is comprised of a first tank circuit and a second tank circuit, said first tank circuit being formed of a first winding inductor, a first tank capacitor, and a first tank resistor all connected in parallel and between said first node and said first output terminal, second tank circuit being formed of a second winding inductor, a second tank capacitor, and a second tank resistor all connected in parallel and between said second node and said second output terminal. 
     
     
       37. An impedance blocking filter circuit as claimed in  claim 36 , further comprising a seventh inductor having a first end connected to said fifth inductor at said first node and a second end connected to said first tank circuit, and an eighth inductor having a first end connected to said sixth inductor at said second node and a second end connected to said second tank circuit. 
     
     
       38. An impedance blocking filter circuit as claimed in  claim 37 , wherein said first switching means includes a first reed switch and said second switching means includes a second reed switch. 
     
     
       39. An impedance blocking filter circuit as claimed in  claim 38 , wherein said first winding of said first tank circuit, said second winding of said second tank circuit, said first reed switch, and said second reed switch are arranged in a dual winding inductor structure. 
     
     
       40. An impedance blocking filter circuit as claimed in  claim 39 , wherein said first winding of said first tank circuit and said first reed switch is arranged in a first current sensor unit, said second winding of said second tank circuit and said second reed switch is arranged in a second current sensor unit. 
     
     
       41. An impedance blocking filter circuit as claimed in  claim 35 , further comprising a first metal- oxide or silicon varistor connected in series with said first capacitor and in parallel with said first switching means, and a second metal - oxide or silicon varistor connected in series with said second capacitor and in parallel with said second switching means.   
     
     
       42. An impedance blocking filter circuit as claimed in  claim 41 , wherein said switch suppression circuit means includes a ninth inductor, a tenth inductor, and a third capacitor. 
     
     
       43. An impedance blocking filter circuit as claimed in  claim 42 , wherein said ninth inductor has a first end connected to said second inductor and a second end connected to said fifth inductor, said tenth inductor has a first end connected to said fourth inductor and a second end connected to said sixth inductor, and said third capacitor has a first end connected to the junction of said second and fifth inductors and a second end connected to the junction of said third and sixth inductors. 
     
     
       44. An impedance blocking filter circuit used in telecommunication systems for interconnecting between incoming telephone lines and customer's terminal equipment so as to unconditionally block impedances from above  20  KHz due to the customer's terminal equipment from an ADSL network unit and/or home networking interface unit, said filter circuit comprising:
   first and second inductors connected in series between a first input terminal and a first common point;        said first inductor having its one end connected to said first input terminal and its other end connected to one end of said second inductor, said second inductor having its other end connected to said first common point;        third and fourth inductors connected in series between a second input terminal and a second common point;        said third inductor having its one end connected to said second input terminal and its other end connected to one end of said fourth inductor, said fourth inductor having its other end connected to said second common point;        transistor switching means interconnected between said first and second common points and being responsive to DC loop current for eliminating shunt capacitance caused by other filter circuits connected to on - hook telephone sets;        a fifth inductor having a first end connected to said first common point and a second end connected to a first output terminal, and a sixth inductor having a first end connected to said second common point and a second end connected to a second output terminal; and        correction circuit means interconnected between said fifth and sixth inductors and said output terminals for significantly reducing return loss caused by inductive impedance when the customer's terminal equipment goes off - hook.     
     
     
       45. An impedance blocking filter circuit as claimed in  claim 44 , wherein said transistor switching means is comprised of a pair of transistors, a resistor, first and second capacitors, and first and second varistors. 
     
     
       46. An impedance blocking filter circuit as claimed in  claim 44 , wherein said correction circuit means is comprised of a first tank circuit and a second tank circuit, said first tank circuit being formed of a first winding inductor, a first tank capacitor, and a first tank resistor all connected in parallel and between said fifth inductor and said first output terminal, second tank circuit being formed of a second winding inductor, a second tank capacitor, and a second tank resistor all connected in parallel and between said sixth inductor and said second output terminal. 
     
     
       47. An impedance blocking filter circuit used in telecommunication systems for interconnecting between incoming telephone lines and customer's terminal equipment so as to unconditionally block impedances from about  20  KHz due to the customer's terminal equipment from an ADSL network unit and/or home networking interface unit, said filter circuit comprising:
   first and second inductors connected in series between a first input terminal and a first common point;        said first inductor having its one end connected to said first input terminal and its other end connected to one end of said second inductor, said second inductor having its other end connected to said first common point;        third and fourth inductors connected in series between a second input terminal and a second common point;        said third inductor having its one end connected to said second input terminal and its other end connected to one end of said fourth inductor, said fourth inductor having its other end connected to said second common point;        first switching means having a first end and a second end and being responsive to DC loop current for electrically connecting said first end to said second end;        a first capacitor having a first end connected to said first common point and a second end connected to said first end of said switching means, said second end of said switching means being connected to said second common point; and        switch suppression circuit means interconnected between said first and second common points for preventing transients caused by actuation of said first switching means from being fed back into the incoming telephone lines.     
     
     
       48. An impedance blocking filter circuit as claimed in  claim 47 , further comprising a fifth inductor having a first end connected to said first common point and a second end connected to a first output terminal, and an sixth inductor having a first end connected to said second common point and a second end connected to a second output terminal. 
     
     
       49. An impedance blocking filter circuit as claimed in  claim 48 , wherein said first switching means includes a reed switch. 
     
     
       50. An impedance blocking filter circuit as claimed in  claim 49 , wherein said first through fourth inductors and said reed switch are arranged in a dual winding ferrite core inductor device. 
     
     
       51. An impedance blocking filter circuit as claimed in  claim 47 , further comprising a metal- oxide varistor connected in series with said first capacitor and in parallel with said first switching means.   
     
     
       52. A filter circuit used in telecommunication systems, comprising:
   first inductor means disposed electrically between a first input terminal and a first common point;        second inductor means disposed electrically between a second input terminal and a second common point;        first means for switching in response to loop current;        first energy storage means, said first energy storage means and said first means for switching being disposed in electrical series between said first and second common points;        third inductor means disposed electrically between said first common point and a first output terminal;        fourth inductor means disposed electrically between said second common point and a second output terminal;        second means for switching in response to loop current; and        second energy storage means, said second energy storage means and said second means for switching being disposed in electrical series between first and second nodes disposed electrically between said third inductor means and said first output terminal, and said fourth inductor means and said second output terminal, respectively.     
     
     
       53. An impedance blocking filter circuit used in telecommunication systems, comprising:
   first inductor means disposed electrically between a first input terminal and a first common point;        second inductor means disposed electrically between a second input terminal and a second common point;        transistorized means for switching responsive to loop current and electrically interconnected between said first and second common points;        third inductor means disposed electrically between said first common point and a first output terminal;        fourth inductor means disposed electrically between said second common point and a second output terminal; and        first and second correction circuit means disposed electrically in series with said third and fourth inductor means, respectively.     
     
     
       54. A filter circuit used in telecommunication systems, comprising:
   first and second inductors disposed electrically between respective ones of first and second input terminals and common points;        a first switch responsive to loop current in series with a first capacitor, said first switch and capacitor being disposed between said first and second common points;        third and fourth inductors disposed electrically between respective ones of said first and second common points and first and second output terminals;        a second switch responsive to loop current in series with a second capacitor, said second switch and capacitor being disposed between first and second nodes, said first and second nodes being disposed electrically between respective ones of said third and fourth inductors and said first and second output terminals.