Semiconductor integrated circuit with selectable power supply according to different operation modes

Abstract

For an internal circuit having a first operation mode consuming a first operational current and a second operation mode consuming a second operational current, which is smaller than the first operational current, a first power source regulator for stepping down a predefined output power supply voltage from an input power supply voltage and having a current supply ability corresponding to the first operational current of the internal circuit and a second power source gulator having a current supply ability corresponding to the second operational current are combined in order to, under the control of a power supply control unit, operate the first step-down type regulator in response to a first control signal instructing the first operation mode in the internal circuit and to operate the second step-down type regulator in response to a second control signal instructing the second operation mode. In this case, the internal circuit and power supply control unit are provided in one semiconductor integrated circuit device so that reduced power consumption and power supply switching in accordance with the operation mode can be achieved.

1. A semiconductor integrated circuit formed on a single chip and comprising:
 a central processing unit;  
 an input/output circuit; and  
 an internal supply voltage generating circuit,  
 wherein said central processing unit has a first operational mode consuming a first operational current,  and a second operational mode consuming second operational current ,  
 wherein said internal supply voltage generating circuit includes a plurality of regulators  a first regulator and a second regulator, and a control circuit controlling said first and second regulators,  
 wherein said control circuit receives a first mode information signal from said central processing unit, and receives a second mode information signal from outside said semiconductor integrated circuit via said input/output circuit, and  
 wherein said control circuit controls  is operable to control said regulators of said internal supply voltage generating circuit  first regulator according to said first mode information signals  signal.  
 
     
     
       2. A semiconductor integrated circuit according to  claim 1 ,
 wherein said first operational mode consumes a first operational current,  
   wherein said second operational mode consumes a second operational current,    
 wherein said plurality of regulators include a  said first regulator providing  provides said first operational current, and  
 awherein said second regulator providingprovides said second operational current, and  
 wherein said second operational current beingis smaller than said first operational current.  
 
     
     
       3. A semiconductor integrated circuit according to  claim 1 ,
 wherein said semiconductor integrated circuit receives a power supply voltage from outside,  
 wherein said power supply voltage is provided to said input/output circuit and said internal supply voltage generating circuit,  
 wherein said internal supply voltage generating circuit is constructed to generate a plurality of internal supply voltages using said power supply voltage, and  
 wherein said central processing unit is selectively supplied with said plurality of internal supply voltage  voltages.  
 
     
     
       4. A semiconductor integrated circuit,
 a central processing unit having a plurality of operation modes,  
 an input/output circuit constructed to receive a plurality of signals from outside;  
 a voltage terminal which is provided with an external supply voltage; and  
 a voltage generating circuit constructed to generate operation voltages according to said operation modes,  
 wherein said voltage terminal is coupled with said input/output circuit and said voltage generating circuit to provide said external supply voltage from  via a first voltage line,  
 wherein said input/output circuit receives a mode signal from outside, and provides an operation mode control signal selectively indicating said plurality of operation modes to said voltage generating circuit,  
 wherein said voltage generating circuit includes a control circuit receiving said operation mode control signal, and controlling the voltage generating circuit according to the operation mode indicated by said operation mode control signal, said voltage generating circuit being coupled to said central processing unit via a second voltage line, and  
 wherein said plurality of operation modes include a first operation mode for which said voltage generating circuit provides a first operation voltage to said central processing unit via said second voltage line, and a second operation mode for which said voltage generating circuit provides a second operation voltage to said central processing unit via said second voltage line.  
 
     
     
       5. A semiconductor integrated circuit according to  claim 4 ,
 wherein said central processing unit consumes a first operation current in said first operation mode and a second operation current smaller than said first operation current in said second operation mode.  
 
     
     
       6. A semiconductor integrated circuit according to  claim 5 ,
 wherein said voltage supply  generating circuit includes a first generating circuit providing said first operation current, and a second generating circuit providing said second operation current, and  
 wherein said control circuit controls operation of said first and second generating circuits.  
 
     
     
       7. A semiconductor integrated circuit according to  claim 5 , further comprising:
 an internal volatile memory,  
 wherein said plurality of operation modes include a third operation mode, and  
 wherein said voltage generating circuit is coupled to said internal volatile memory via a third voltage line to provide an operation voltage to said internal volatile memory in said third operation made.  
 
     
     
       8. A semiconductor integrated circuit according to  claim 4 ,
 wherein said voltage generating circuit includes a first regulator which generates said first operation voltage and a second regulator which generates said second operation voltage.  
 
     
     
       9. A semiconductor integrated circuit device, comprising:
 a central processing unit having a plurality of operation modes; and  
 an input/output circuit coupled to said central processing unit; and 
 a supply voltage generating circuit having a plurality of operation voltage outputs,  
 wherein said supply voltage generating circuit includes a control circuit which controls said supply voltage generating circuit to couple said operation voltage outputs to said central processing unit, selectively, depending upon the operating made  mode of the central processing unit.  
 
     
     
       10. A semiconductor integrated circuit according to  claim 9 ,
 wherein said control circuit receives an operation mode control signal and controls said supply voltage generating circuit according to the operation mode indicated by said operation mode control signal, and  
   wherein each of said operation voltage outputs is controlled to a predetermined voltage according to said operation mode control signal .  
 
     
     
       11. A semiconductor integrated circuit according to  claim 10 , wherein said control circuit receives said operation mode control signal from said input/output circuit  outside said semiconductor integrated circuit. 
     
     
       12. A semiconductor integrated circuit according to  claim 11 , further comprising:
   an input/output circuit, and    
 wherein said operation mode control signal is externally supplied to said input/output circuit.  
 
     
     
       13. A semiconductor integrated circuit according to  claim 9 , further comprising:
   an input/output circuit,    
 wherein said control circuit receives first and second operation mode control signals from said input/output circuit and said central processing unit, respectively, and  
 controlswherein said control circuit controls an output of said voltage generating circuit to a predetermined voltage level according to respective operation modes indicated by said first and second operation mode control signals.  
 
     
     
       14. A semiconductor integrated circuit according to  claim 9 , wherein said plurality of operation modes include a first operation mode in which a first of said operation voltage outputs is coupled to said central processing unit to provide a first operating current, and a second operation mode in which a second of said operation voltage outputs is coupled to said central processing unit to provide a second operating current smaller than said first operating current and said first of said operation voltage outputs is controlled to a predetermined voltage level. 
     
     
       15. A semiconductor integrated circuit according to  claim 14 , wherein said first and second operation voltage outputs are outputs of first and second regulators, respectively. 
     
     
       16. A semiconductor integrated circuit according to  claim 14 , further comprising:
 an internal volatile memory; and  
 wherein said first and second operation voltage output terminals  outputs are coupled to said internal volatile memory via a dedicated voltage supply line for said internal volatile memory in said first and second operation modes, respectively.  
 
     
     
       17. A semiconductor integrated circuit according to  claim 16 ,
 wherein said plurality of operation modes include a third operation mode, and  
 wherein said supply voltage generating circuit has an additional operation voltage output which is coupled to said internal volatile memory via said additional  dedicated voltage supply line in said third operating mode, and said first and second operation voltage outputs are controlled to high impedance state in said third operation mode.  
 
     
     
       18. A semiconductor integrated circuit according to  claim 17 , wherein said additional operation voltage output is an output of a third regulator. 
     
     
       19. A semiconductor integrated circuit according to  claim 1 ,
   wherein said second regulator includes a voltage compare unit and a MOSFET,        wherein a gate of said MOSFET is coupled to an output of said voltage compare unit; and        wherein said output of said voltage compare unit is controlled to set an output voltage of said second regulator to a predetermined voltage level by said control circuit according to said first mode information signal.      
     
     
       20. A semiconductor integrated circuit according to  claim 2 ,
   wherein said second regulator includes a switch unit which is coupled to between a voltage compare unit and a MOSFET, and        wherein said switch unit is controlled to set an output voltage of said second regulator to a predetermined voltage level according to said first mode information signal.      
     
     
       21. A semiconductor integrated circuit according to  claim 8 , further comprising:
   an internal memory, and        wherein said second regulator provides said second operation voltage to said internal memory according to said operation mode control signal.      
     
     
       22. A semiconductor device comprising:
   a plurality of power regulators including a first regulator;        a power control circuit;        a plurality of circuits including a central processing unit;        a terminal being capable of connecting to a capacitance device; and        an internal power line connecting to said terminal and said plurality of circuits,        wherein said central processing unit is capable of issuing a control signal to said power control circuit in accordance with consumption modes of the semiconductor device, which includes a high consumption mode and a first low consumption mode, and        wherein said power control circuit stops said first power regulator in accordance with said control signal indicating said first low consumption mode, and operates said first power regulator in accordance with said control signal indicating said high consumption mode.      
     
     
       23. A semiconductor device according to  claim 22 ,
   wherein each of said power regulators is coupled to said internal power line for supplying an operation voltage to said plurality of circuits.      
     
     
       24. A semiconductor device according to  claim 23 ,
   wherein said plurality of circuits include a random access memory,        wherein said consumption modes include a second low consumption mode, and        wherein said power control circuit controls said plurality of power regulators so as to stop supplying said operation voltage to said central processing unit and continue supplying said operation voltage to said random access memory in accordance with said control signal indicating said second low consumption mode.      
     
     
       25. A semiconductor device according to  claim 24 ,
   wherein said plurality of power regulators include a second register, and        wherein said power control circuit stops said second regulator in accordance with said control signal indicating said second low consumption mode.      
     
     
       26. A semiconductor device according to  claim 22 ,
   wherein when said central processing unit issues said control signal indicating said high consumption mode after issuing said control signal indicating said first low consumption mode, said power control circuit restarts said first power regulator.