Two stage analog-to-digital conversion with second stage offset correction

Abstract

An analog to digital converter comprises a first stage for developing a set of most significant bits from an analog input signal and for producing analog residue signals (RA, RB) corresponding to respective differences between the analog input signal and threshold values directly above and below, respectively, the analog input signal, and a second stage (AMPA, AMPB, ADC 2 ) for developing a set of lesser significant bits from the analog residue signals (RA, RB). According to the invention, the analog residue signals (RA, RB) are reversed (CA, CB). An offset detection unit (COD, DOD) coupled to the second stage (AMPA, AMPB, ADC 2 ) retrieves offset data representative of offset errors, and an offset correction unit (AD 1 , AD 2 , OCA, OCB) corrects the offset errors on the basis of the offset data.

1. An analog to digital converter, comprising:
 a first stage for developing a set of most significant bits from an analog input signal and for producing analog residue signals (RA, RB)  corresponding to respective differences between the analog input signal and threshold values directly above and below, respectively, the analog input signal; and  
 a second stage (AMPA, AMPB, ADC 2 )  for developing a set of lesser significant bits from the analog residue signals (RA, RB) , wherein the analog to digital converter further comprises: 
 means (CA, CB)  for reversing the analog residue signals (RA, RB) ;  
 offset detection means (COD, DOD)  coupled to the second stage (AMPA, AMPB, ADC 2 )  for retrieving offset data (Offset COM , Offset DIFF )  representative of offset errors; and  
 offset correction means (AD 1 , AD 2 , OCA, OCB)  coupled to receive the offset data (Offset COM , Offset DIFF )  for correcting the offset errors.  
 
 
     
     
       2. An  The analog to digital converter of  claim 1 , wherein the reversing means (CA, CB)  operate at half a sample frequency of a digital output signal of the analog to digital converter. 
     
     
       3. An analog to digital converter circuit, comprising:
   a stage for developing a set of bits from received analog signals, the stage including two residue amplifiers for amplifying the received analog signals corresponding to respective differences between an analog input signal and threshold values directly above and below, respectively, the analog input signal; and        wherein the analog to digital converter circuit further comprises:      means for reversing the received analog signals,        offset detection means coupled to the stage for retrieving offset data representative of offset errors and detecting the offset data from the residue amplifiers, and        offset correction means coupled to receive the offset data for correcting the offset errors corresponding to the detected offset data from the residue amplifiers.       
     
     
       4. The circuit of  claim 3 , wherein
   the stage develops a set of least significant bits from the analog signals,        the offset detection means detects offset data from the least significant bits, and        the offset correction means corrects offset errors corresponding to the detected offset data.     
     
     
       5. The circuit of  claim 3 , wherein the means for reversing the analog signals includes a chopper circuit to chop incoming analog signals and to provide the chopped signals to the two residue amplifiers. 
     
     
       6. For use with an analog to digital converter that converts an analog input signal to a digital output signal, a circuit arrangement comprising:
   a chopper circuit to chop received residue signals corresponding to respective differences between the analog input signal and threshold values directly above and below, respectively, the analog input signal;        amplifiers to amplify the respective chopped residue signals;        ana analog to digital converter circuit to convert the analog output of the amplifiers into a digital signal; and        a residue processing circuit to retrieve offset data representative of offset errors in the amplified residue signals and to provide a feedback control signal to the amplifiers to correct for the offset errors.     
     
     
       7. The circuit arrangement of  claim 6 , wherein the residue processing circuit includes a common offset detector and a differential offset detector, and provides,
   to a first one of the amplifiers that amplifies the analog input signal and a first threshold value above the analog input signal, a feedback control signal that includes an added output from the common and differential offset detectors, and        to a second one of the amplifiers that amplifies the analog input signal and a second threshold value below the analog signal, a feedback control signal that includes an output from the common offset detector added to an inverted output from the differential offset detector.