Rotation control apparatus operating with a sync signal having variable intervals
Abstract
A rotation control apparatus which can maintain an accurate rotating state even in a high density optical disk (DVD) having a structure such that parts of the sync signal are recorded at an interval different from that of the other sync signal parts. The apparatus has: a unit period signal generator for generating a period signal of a unit period; a pre-pit detector for detecting a pre-pit from the DVD; a phase difference detector for detecting a phase difference between the detection timing of the pre-pit and the unit period signal; and a holding circuit for holding the phase difference detected. The rotation of the DVD is controlled on the basis of the phase difference held at the holding circuit.
Claims
exact text as granted — not AI-modified1. An information data recording apparatus for recording information data on an information recording medium having pre-pits which are formed at periodic intervals having a period that is m, m being an integer, times as large as a unit period in accordance with pre-information recorded at an interval which deviates from said periodic intervals by an interval that is k, k being an integer, where k<m, times said unit period in accordance with recording positions, said apparatus comprising:
a unit period signal generator which generates a periodic signal of said unit period; a memory for temporarily storing said information data in synchronism with said periodic signal from said unit period signal generator and supplying said information data in synchronism with a clock signal; a pre-pit signal reproducing circuit for detecting said pre-pits from said recording medium and generating a pre-pit signal; a phase-locked loop circuit for generating said clock signal which is phase-locked with a jitter component contained in said pre-pit signal; and a recording means for recording said information data supplied from said memory on said recording medium.
2. An information data recording apparatus as claimed in claim 1 , wherein said phase-locked loop circuit comprises:
a voltage controlled oscillator for generating said clock signal in accordance with a control voltage; a phase comparator circuit for comparing said pre-pit signal generated by said pre-pit signal reproducing circuit with said clock signal generated by said voltage controlled oscillator and producing a phase comparison output signal; and an amplitude and phase equalizing circuit for adjusting amplitude and phase of said phase comparison output signal of said phase comparator to produce said control voltage supplied to said voltage controlled oscillator.
3. An information data recording apparatus as claimed in claim 1 , further comprising a feed-forward circuit for eliminating a phase error in said information data supplied from said memory, said phase error corresponding to a residual phase error component of said clock signal generated by said phase-locked loop circuit.
4. An information data recording apparatus as claimed in claim 3 , wherein said feed-forward circuit comprises:
a second memory for storing said information data supplied from said memory in synchronism with said clock signal and supplying said information data to said recording means in synchronism with a second clock signal; and a voltage controlled oscillator for generating said second clock signal in accordance with said phase comparison output signal of said phase comparator circuit.
5. An information data recording apparatus for recording information data on a recording medium having a recording track on which the information data is to be recorded and prerecorded data which are preformed on a portion different from the information recording track at first periodic interval, said apparatus comprising:
a memory which temporarily stores the information data to be recorded on the recording medium and supplies the information data in synchronism with a clock signal; a prerecorded data signal reproducing circuit which detects the prerecorded data from the recording medium and generates a prerecorded data signal; a clock signal generating circuit which generates the clock signal based on the prerecorded data signal; a recording device which records the information data supplied from the memory on the recording track of the recording medium; and a phase comparator which generates a phase difference signal relative to the prerecorded data signal by a phase comparison with a reference signal that has an interval shorter than an interval of a synchronization signal included in the prerecorded data signal, wherein said clock signal generating circuit generates said clock signal using the phase difference signal generated by said phase comparator.
6. The information data recording apparatus as claimed in claim 5 , further comprising a reference signal generator which generates the reference signal,
wherein the memory stores the information data in synchronism with the reference signal.
7. The information data recording apparatus as claimed in claim 5 , wherein the clock signal is phase- locked with a jitter component contained in the prerecorded data signal.
8. The information data recording apparatus as claimed in claim 7 , wherein the clock signal generating circuit is a phase- locked loop circuit comprising: a voltage controlled oscillator which generates the clock signal in accordance with a control voltage; a phase comparator which compares the prerecorded data signal with the clock signal and produces a phase comparison output signal; and an equalizing circuit which adjusts the phase comparison output signal of the phase comparator to produce the control voltage supplied to the voltage controlled oscillator.
9. The information data recording apparatus as claimed in claim 5 , further comprising a feed- forward circuit which eliminates a phase error in the information data supplied from the memory, the phase error corresponding to a residual phase error component of the clock signal generated by the clock signal generating circuit.
10. The information data recording apparatus as claimed in claim 9 , wherein the feed- forward circuit comprises: a voltage controlled oscillator which generates a second clock signal in accordance with a phase comparison output signal of said phase comparator, and a second memory for storing said information data supplied from said memory in accordance with said clock signal and supplying said information data to said recording device in accordance with said second clock signal.
11. The information data recording apparatus as claimed in claim 6 , wherein the reference signal is a periodic signal of a unit length which corresponds to a bit interval that is specified by a recording format used for recording the information data.
12. The information data recording apparatus as claimed in claim 5 , wherein the first periodic interval corresponds to m, m being an integer, times of a unit period that is specified by a recording format used for recording the information data.
13. The information data recording apparatus as claimed in claim 12 , wherein the recording medium has other prerecorded data which are preformed at second interval which corresponds to k, k being an integer smaller than m, times of the unit period.
14. The information data recording apparatus as claimed in claim 12 , wherein the unit period corresponds to a plurality of a unit length which corresponds to a bit interval that is specified by a recording format used for recording the information data.
15. An information data recording apparatus for recording information data on a recording medium having a recording track on which the information data is to be recorded and prerecorded data which are preformed on a portion different from the information recording track, the prerecorded data including first prerecorded data preformed at a first periodic interval which corresponds to m, m being an integer, times of a unit period that is specified by a recording format used for recording the information data, and second prerecorded data preformed at a second interval which corresponds to k, k being an integer smaller than m, times of the unit period, said apparatus comprising:
a memory which temporarily stores the information data to be recorded on the recording medium and supplies the information data in synchronism with a clock signal; a prerecorded data signal reproducing circuit which detects the prerecorded data from the recording medium and generates a prerecorded data signal; a clock signal generating circuit which generates the clock signal based on the prerecorded data signal; a recording device which records the information data supplied from the memory on the recording track of the recording medium; and a phase comparator which generates a phase difference signal relative to the prerecorded data signal by a phase comparison with a reference signal that has an interval shorter than an interval of a synchronization signal included in the prerecorded data signal, wherein said clock signal generating circuit generates said clock signal using the phase difference signal generated by said phase comparator.
16. The information data recording apparatus as claimed in claim 15 , further comprising a reference signal generator which generates the reference signal,
wherein the memory stores the information data in synchronism with the reference signal.
17. The information data recording apparatus as claimed in claim 15 , wherein the clock signal is phase- locked with a jitter component contained in the prerecorded data signal.
18. The information data recording apparatus as claimed in claim 17 , wherein the clock signal generating circuit is a phase- locked loop circuit comprising: a voltage controlled oscillator which generates the clock signal in accordance with a control voltage; a phase comparator which compares the prerecorded data signal with the clock signal and produces a phase comparison output signal; and an equalizing circuit which adjusts the phase comparison output signal of the phase comparator to produce the control voltage supplied to the voltage controlled oscillator.
19. The information data recording apparatus as claimed in claim 15 , further comprising a feed- forward circuit which eliminates a phase error in the information data supplied from the memory, the phase error corresponding to a residual phase error component of the clock signal generated by the clock signal generating circuit.
20. The information data recording apparatus as claimed in claim 19 , wherein the feed- forward circuit comprises: a voltage controlled oscillator which generates a second clock signal in accordance with a phase comparison output signal of said phase comparator, and a second memory for storing said information data supplied from said memory in accordance with said clock signal and supplying said information data to said recording device in accordance with said second clock signal.
21. The information data recording apparatus as claimed in claim 15 , wherein the reference signal is a periodic signal of a unit length which corresponds to a bit interval that is specified by a recording format used for recording the information data.
22. The information data recording apparatus as claimed in claim 21 , wherein the unit period corresponds to a plurality of the unit length.
23. A method for recording information data on a recording medium having a recording track on which the information data is to be recorded and prerecorded data which are preformed on a portion different from the information recording track at first periodic interval, said method comprising the steps of:
temporarily storing the information data to be recorded on the recording medium and supplying the information data in synchronism with a clock signal; detecting the prerecorded data from the recording medium and generating a prerecorded data signal; generating the clock signal based on the prerecorded data signal; recording the information data on the recording track of the recording medium; and generating a phase difference signal relative to the prerecorded data signal by a phase comparison with a reference signal that has an interval shorter than an interval of a synchronization signal included in the prerecorded data signal, wherein said clock signal is generated using said phase difference signal.
24. The method as claimed in claim 23 , further comprising a step of generating the reference signal,
wherein at the storing step the information data is stored in synchronism with the reference signal.
25. The method as claimed in claim 23 , wherein the clock signal is phase- locked with a jitter component contained in the prerecorded data signal.
26. The method as claimed in claim 25 , wherein the clock signal generating step comprises:
generating the clock signal in accordance with a control voltage; comparing the prerecorded data signal with the clock signal and producing a phase comparison output signal; and adjusting the phase comparison output signal to produce the control voltage.
27. The method as claimed in claim 23 , further comprising a step of eliminating a phase error in the information data, the phase error corresponding to a residual phase error component of the clock signal generated at the clock signal generating step.
28. The method as claimed in claim 27 , wherein the eliminating step comprises:
generating a second clock signal in accordance with the phase comparison output signal, and secondly storing said information data in accordance with said clock signal and supplying said information data in accordance with said second clock signal.
29. The method as claimed in claim 24 , wherein the reference signal is a periodic signal of a unit length which corresponds to a bit interval that is specified by a recording format used for recording the information data.
30. The method as claimed in claim 23 , wherein the first periodic interval corresponds to m, m being an integer, times of a unit period that is specified by a recording format used for recording the information data.
31. The method as claimed in claim 30 , wherein the recording medium has other prerecorded data which are preformed at second interval which corresponds to k, k being an integer smaller than m, times of the unit period.
32. The method as claimed in claim 30 , wherein the unit period corresponds to a plurality of a unit length which corresponds to a bit interval that is specified by a recording format used for recording the information data.
33. A method for recording information data on a recording medium having a recording track on which the information data is to be recorded and prerecorded data which are preformed on a portion different from the information recording track, the prerecorded data including first prerecorded data preformed at a first periodic interval which corresponds to m, m being an integer, times of a unit period that is specified by a recording format used for recording the information data, and second prerecorded data preformed at a second interval which corresponds to k, k being an integer smaller than m, times of the unit period, said method comprising the steps of:
temporarily storing the information data to be recorded on the recording medium and supplying the information data in synchronism with a clock signal; detecting the prerecorded data from the recording medium and generating a prerecorded data signal; generating the clock signal based on the prerecorded data signal; recording the information data supplied from the memory on the recording track of the recording medium; and generating a phase difference signal relative to the prerecorded data signal by a phase comparison with a reference signal that has an interval shorter than an interval of a synchronization signal included in the prerecorded data signal, wherein said clock signal is generated using said phase difference signal.
34. The method as claimed in claim 33 , further comprising a step of generating the reference signal,
wherein at the storing step the information data is stored in synchronism with the reference signal.
35. The method as claimed in claim 34 , wherein the clock signal is phase- locked with a jitter component contained in the prerecorded data signal.
36. The method as claimed in claim 35 , wherein the clock signal generating step comprises:
generating the clock signal in accordance with a control voltage; comparing the prerecorded data signal with the clock signal and producing a phase comparison output signal; and adjusting the phase comparison output signal to produce the control voltage.
37. The method as claimed in claim 23 , further comprising a step of eliminating a phase error in the information data, the phase error corresponding to a residual phase error component of the clock signal generated at the clock signal generating step.
38. The method as claimed in claim 37 , wherein the eliminating step comprises:
generating a second clock signal in accordance with a phase comparison output signal, and secondly storing said information data in accordance with said clock signal and supplying said information data in accordance with said second clock signal.
39. The method as claimed in claim 34 , wherein the reference signal is a periodic signal of a unit length which corresponds to a bit interval that is specified by a recording format used for recording the information data.
40. The method as claimed in claim 39 , wherein the unit period corresponds to a plurality of the unit length.Cited by (0)
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