Semiconductor device with compensated threshold voltage and method for making same
Abstract
A semiconductor device may include a channel region formed between a source and a drain region. One or more first pockets may be formed in the channel region adjacent to junctions. The first pockets may be doped with a dopant of the first conductivity type. At least one second pocket may be formed adjacent to each of the junctions and stacked against each of the first pockets. The second pocket may be doped with a dopant of a second conductivity type such that the dopant concentration in the second pocket is less than the dopant concentration in the first pockets. The second pocket may reduce a local substrate concentration without changing the conductivity type of the channel region.
Claims
exact text as granted — not AI-modified1. A semiconductor device, comprising:
a semiconductor substrate having a predetermined concentration, Ns, of a dopant of a first conductivity type;
a source region and a drain region doped with a dopant of a second conductivity type;
junctions, wherein the junctions delimit a channel region of a predetermined length, L N , in the substrate, wherein the junctions are defined by the source region and the drain region;
first pockets located adjacent to each of the junctions, wherein the pockets have a predetermined length, Lp, wherein the first pockets are doped with a dopant of the first conductivity type with a dopant concentration, Np, which locally increases a net concentration in the substrate above Ns;
second pockets located adjacent to each of the junctions and stacked against each of the first pockets, wherein the second pockets have a length, Ln, such that Ln is greater than Lp, and wherein the second pockets are doped with a dopant of the second conductivity type with a dopant concentration, Nn, such that Nn is less than Np, which locally decreases a net concentration without changing a conductivity type, and wherein Nn is less than Ns; and
wherein an overall length of the first pockets and the second pockets is less than the length, L N , of the channel region.
2. The semiconductor device of claim 1 , wherein the second pockets comprise a plurality of elementary pockets stacked against each other.
3. The semiconductor device of claim 1 , wherein the second pockets comprise a plurality of elementary pockets stacked against each other, wherein each elementary pocket comprises a rank, i, and a predetermined length, Ln i , wherein a predetermined concentration, Nn i , of a dopant of the second conductivity type satisfies the relationships:
Ln 1 >Lp;
Ln i−1 <Ln i <Ln i+1 ;
Nn i−1 >Nn i >Nn i+1 ; and
wherein the sum, ΣNn i , of the concentrations of the dopant in the elementary pockets satisfies the relationship, ΣNn i <Ns.
4. The semiconductor device of claim 1 , wherein the second pockets comprise a plurality of elementary pockets stacked against each other, and wherein the plurality of elementary pockets comprises three elementary pockets.
5. The semiconductor device of claim 1 , wherein the semiconductor device comprises an MOS transistor.
6. The semiconductor device of claim 1 , wherein the first conductivity type comprises p-type conductivity.
7. The semiconductor device of claim 1 , wherein the second conductivity type comprises n-type conductivity.
8. A method for fabricating a semiconductor device, comprising:
forming a semiconductor substrate with a predetermined concentration, Ns, of a dopant of a first conductivity type;
forming a source region and a drain region by doping the source and drain regions with a dopant of a second conductivity type, wherein the second conductivity type is opposite the first conductivity type, wherein the source and drain regions form junctions that delimit a channel region between them, and wherein the channel region comprises a predetermined length, L N ;
forming first pockets adjacent to each of the junctions in the channel region, wherein the first pockets are formed by doping each of the first pockets with a predetermined concentration, Np, of a dopant of the first conductivity type, which locally increases a net concentration in the substrate above Ns, and wherein each of the first pockets comprises a predetermined length, Lp; and
implanting in the channel region a dopant of the second conductivity type under a set of conditions such that second pockets are formed in the channel region, wherein the second pockets are stacked against each of the first pockets, wherein the second pockets have a length, Ln, such that Ln is greater than Lp, wherein the second pockets have a concentration, Nn, of the dopant of the second conductivity type such that Nn is less than Np, which locally decreases a net concentration without changing a conductivity type, wherein Nn is less than Ns, and wherein the overall length of the first pockets and the second pockets is less than the nominal length, L N , of the channel region.
9. The method of claim 8 , wherein implanting in the channel region comprises a series of successive implanting steps such that the second pockets comprise a plurality of elementary pockets.
10. The method of claim 8 , wherein implanting in the channel region comprises a series of successive implantion implantation steps such that the second pockets comprise comprises a plurality of elementary pockets, wherein each elementary pocket comprises a rank, i, and a predetermined length, Ln i , and wherein a predetermined concentration, Nn i , of a dopant of the second conductivity type satisfies the relationships:
Ln 1 >Lp;
Ln i−1 <Ln i <Ln i+1 ;
Nn i−1 >Nn i >Nn i+1 ; and
wherein the sum, ΣNn i of the concentrations of the dopant in the elementary pockets satisfies the relationship, ΣNn i <Ns.
11. The method of claim 10 , further comprising increasing an implantation angle of incidence with respect to the normal angle to the substrate with each successive implantion implantation step and decreasing an implantation dose with each successive implantion implantation step.
12. The method of claim 10 , wherein the successive implanting steps comprise implanting the dopant of the second conductivity type using a same angle of incidence with respect to the normal angle to the substrate, a same implantation dose, and a same implantation energy in each successive implantion implantation step, the method further comprising annealing the device in an annealing step after each successive implantion implantation step, wherein each annealing step is different.
13. The method of claim 8 , wherein the set of conditions comprises an implantation angle of incidence with respect to the normal angle to the substrate, an implantation dose, and an implantation energy.
14. The method of claim 8 , wherein the set of conditions comprises an implantation angle of incidence with respect to the normal angle to the substrate.
15. The method of claim 8 , wherein the set of conditions comprises an implantation dose.
16. The method of claim 8 , wherein the set of conditions comprises an implantation energy.
17. The method of claim 8 , further comprising forming an MOS transistor with the semiconductor device.
18. The method of claim 8 , wherein the first conductivity type comprises p-type conductivity.
19. The method of claim 8 , wherein the second conductivity type comprises n-type conductivity.
20. A semiconductor device, comprising:
a semiconductor substrate having a concentration, Ns, of a dopant of a first conductivity type;
a source region and a drain region doped with a dopant of a second conductivity type;
junctions that define a channel region of a length, L N , in the substrate, wherein the junctions are defined by the source region and the drain region;
first pockets located adjacent to each of the junctions, wherein the first pockets have a length, Lp, and wherein the first pockets are doped with a dopant of the first conductivity type with a dopant concentration, Np;
second pockets stacked against each of the first pockets, wherein the second pockets have a length, Ln, such that Ln is greater than Lp, wherein the second pockets are doped with a dopant of the second conductivity type with a dopant concentration, Nn, such that Nn is less than Np; and
wherein an overall length of the first pockets and the second pockets is less than the length, L N , of the channel region.
21. A semiconductor device, comprising:
a semiconductor substrate having a concentration, Ns, of a dopant of a first conductivity type; a source region and a drain region doped with a dopant of a second conductivity type; junctions that define a channel region of a length, L N , in the substrate, wherein the junctions are defined by the source region and the drain region; first pockets including a pocket located adjacent to each of the junctions, wherein each of the first pockets is doped with a dopant of the first conductivity type with a dopant concentration, Np; second pockets including one pocket stacked against each of the first pockets, wherein each of the second pockets is doped with a dopant of the second conductivity type with a dopant concentration, Nn; and wherein an overall length of the first pockets and the second pockets is less than the length, L N , of the channel region.
22. The semiconductor device of claim 21 , wherein the first pockets each have a length, Lp, and the second pockets each have a length, Ln, and wherein Ln is greater than Lp.
23. The semiconductor device of claim 21 , wherein Nn is less than Np.
24. The semiconductor device of claim 21 , wherein each of the second pockets comprise a plurality of elementary pockets stacked against each other.
25. The semiconductor device of claim 21 , wherein each of the second pockets comprises a plurality of elementary pockets stacked against each other, wherein each elementary pocket in one of the second pockets has a rank, i, a length, Ln i , and a concentration, Nn i , of a dopant of the second conductivity type satisfying the relationships: Ln 1 >Lp; Ln i−1 <Ln i <Ln i+1 ; Nn i−1 >Nn i >Nn i+1 ; and wherein the sum, ΣNn i , of the concentrations of the dopant in the elementary pockets in one of the second pockets satisfies the relationship, ΣNn i <Ns.
26. The semiconductor device of claim 21 , wherein each of the second pockets comprises a plurality of elementary pockets stacked against each other, and wherein the plurality of elementary pockets comprises three elementary pockets.
27. The semiconductor device of claim 21 , wherein the semiconductor device comprises an MOS transistor.
28. The semiconductor device of claim 21 , wherein the first conductivity type is p- type conductivity.
29. The semiconductor device of claim 21 , wherein the second conductivity type is n- type conductivity.
30. A method for fabricating a semiconductor device, comprising:
forming a semiconductor substrate with a concentration, Ns, of a dopant of a first conductivity type; forming a source region and a drain region by doping the source and drain regions with a dopant of a second conductivity type, wherein the second conductivity type is opposite the first conductivity type, wherein the source and drain regions form junctions that delimit a channel region between them, and wherein the channel region comprises a length, L N ; forming first pockets including a pocket adjacent to each of the junctions in the channel region, wherein each of the first pockets is formed by doping each of the first pockets with a concentration, Np, of a dopant of the first conductivity type; and implanting in the channel region a dopant of the second conductivity type under a set of conditions such that second pockets are formed in the channel region, wherein the second pockets include a pocket stacked against each of the first pockets, wherein the second pockets have a concentration, Nn, of the dopant of the second conductivity type, and wherein the overall length of the first pockets and the second pockets is less than the length, L N , of the channel region.
31. The method of claim 30 , wherein forming the first pockets with the concentration, Np, locally increases a net concentration in the substrate above Ns.
32. The method of claim 30 , wherein each of the first pockets has a length, Lp, and each of the second pockets have a length, Ln, and wherein Ln is greater than Lp.
33. The method of claim 30 , wherein Nn is less than Np which locally decreases a net concentration without changing a conductivity type.
34. The method of claim 30 , wherein Nn is less than Ns.
35. The method of claim 30 , wherein implanting in the channel region comprises a series of successive implanting steps such that each of the second pockets comprises a plurality of elementary pockets.
36. The method of claim 30 , wherein implanting in the channel region comprises a series of successive implantation steps such that each of the second pockets comprises a plurality of elementary pockets, wherein each elementary pocket has a rank, i, a length, Ln i , and a concentration, Nn i , of a dopant of the second conductivity type satisfying the relationships: Ln 1 >Lp; Ln i−1 <Ln i <Ln i+1 ; Nn i−1 >Nn i >Nn i+1 ; and wherein the sum, ΣNn i , of the concentrations of the dopant in the elementary pockets in each of the second pockets satisfies the relationship, ΣNn i <Ns.
37. The method of claim 36 , further comprising increasing an implantation angle of incidence with respect to the normal angle to the substrate with each successive implantation step and decreasing an implantation dose with each successive implantation step.
38. The method of claim 36 , wherein the successive implanting steps comprise implanting the dopant of the second conductivity type using a same angle of incidence with respect to the normal angle to the substrate, a same implantation dose, and a same implantation energy in each successive implantation step, the method further comprising annealing the device in an annealing step after each successive implantation step, wherein each annealing step is different.
39. The method of claim 30 , wherein the set of conditions comprises an implantation angle of incidence with respect to the normal angle to the substrate.
40. The method of claim 30 , wherein the set of conditions relates to an implantation dose.
41. The method of claim 30 , wherein the set of conditions relates to an implantation energy.
42. The method of claim 30 , further comprising forming a MOS transistor with the semiconductor device.
43. The method of claim 30 , wherein the first conductivity type is p- type conductivity.
44. The method of claim 43 , wherein the second conductivity type is n- type conductivity.
45. A semiconductor device, comprising:
a semiconductor substrate having a concentration, Ns, of a dopant of a first conductivity type; a source region and a drain region doped with a dopant of a second conductivity type; first and second junctions that define a channel region of a length, L N , in the substrate, wherein the first and seocnd junctions are defined by the source region and the drain region, respectively; a first set of pockets that includes a first pocket and a second pocket, wherein the first and second pockets are located adjacent to the first and second junctions, respectively, and wherein each of the first set of pockets is doped with a dopant of the first conductivity type with a dopant concentration, Np; a second set of pockets that includes at least one pocket in the channel region adjacent to the first pocket, and at least one pocket in the channel region adjacent to the second pocket, wherein each of the second set of pockets is doped with a dopant of the second conductivity type with a dopant concentration, Nn; and wherein an overall length of the first set of pockets and the second set of pockets is less than the length, L N , of the channel region.
46. The semiconductor device of claim 45 , wherein each of the first set of pockets has a length, Lp, and each of the second set of pockets has a length, Ln, and wherein Ln is greater than Lp.
47. The semiconductor device of claim 45 , wherein Nn is less than Np.
48. The semiconductor device of claim 45 , wherein the second set of pockets includes:
a first group of at least two pockets located adjacent to the first pocket in the channel region, wherein the first group of at least two pockets are stacked against one another; a second group of at least two pockets located adjacent to the second pocket in the channel region, wherein the second group of at least two pockets are stacked against one andother;
49. The semiconductor device of claim 45 , wherein the second set of pockets includes at least two pockets stacked against each of the first set of pockets, wherein each of the at least two pockets stacked against each of the first set of pockets has a rank, i, and a length, Ln i , and a concentration, Nn i , of a dopant of the second conductivity type that satisfy the relationship: Ln 1 >Lp; Ln i−1 <Ln i <Ln i+1 ; Nn i−1 >Nn i >Nn i+1 ; and wherein the sum, ΣNn i , of the concentrations of the dopant in the second set of pockets satisfies the relationship, ΣNn i <Ns.Cited by (0)
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