Output circuit for adjusting output voltage slew rate

Abstract

The present invention discloses an output circuit that is able to adjust the output voltage slew rate and avoid short-circuit current, comprising: a control circuit for receiving an input data and generating a first set of control signals based on the input data; an output control device consisting of a first field effect transistor (FET) connected in series with a second field effect transistor (FET) and the point of connection is the output end for generating an output signal; a first capacitor having one end connected to a first working voltage and generates a first control voltage by charging/discharging on another end to control the gate of the first field effect transistor; a first switch for controlling charging/discharging of the first capacitor device based on the first set of control signals; a first current source for providing charging current for the first capacitor device; a second capacitor having one end connected to a second working voltage and generates a second control voltage by charging/discharging on another end to control the gate of the second field effect transistor; a second switch for controlling charging/discharging of the second capacitor device based on the first set of control signal; and a second current source providing charging current for the second capacitor device. The present invention adjusts output voltage slew rate of the output circuit by adjusting the time constant of the first and second capacitor devices.

1. An output circuit for adjusting output voltage slew rate, comprising:
 a control circuit, for receiving an input data and generating a first control signal based on the input data;    an output control device consisting of a first transistor connected in scries with a second transistor and a connection is an output end for generating an output signal;    a first capacitor device having a first end and a second end, the first end is connected to a first working voltage and generates a first control voltage by charging/discharging on the second end to control a gate of the first transistor;    a first switch for controlling charging/discharging of the first capacitor device based on the first control signal;    a first current source for providing charging current for the first capacitor device;    a second capacitor device having a first end and a second end, the second end is connected to a second working voltage and generates a second control voltage by charging/discharging on the first end to control a gate of the second transistor;    a second switch for controlling charging/discharging of the second capacitor device based on the first control signal; and    a second current source providing charging current for the second capacitor device.    
     
     
       2. The output circuit of  claim 1 , wherein the first capacitor device is a single capacitor. 
     
     
       3. The output circuit of  claim 1 , wherein the second capacitor device is a single capacitor. 
     
     
       4. The output circuit of  claim 1 ,  An output circuit for adjusting output voltage slew rate, comprising:
   a control circuit, for receiving an input data and generating a first control signal based on the input data;    
   an output control device comprising a first transistor coupled in series with a second transistor, wherein a connection is an output end for generating an output signal;    
   a first capacitor device having a first end and a second end, wherein the first end is coupled to a first working voltage and the second end generates a first control voltage to control a gate of the first transistor;    
   a first switch for controlling charging/discharging of the first capacitor device based on the first control signal;    
   a second capacitor device having a first end and a second end, wherein the second end is coupled to a second working voltage and the first end generates a second control voltage to control a gate of the second transistor; and    
   a second switch for controlling charging/discharging of the second capacitor device based on the first control signal;    
 wherein the first capacitor device is consistent of  comprises a plurality of capacitors connected  coupled in parallel and the plurality of capacitors is controlled by a third switch.  
 
     
     
       5. The output circuit of  claim 4 , wherein the second capacitor device is consistent of  comprises a plurality of capacitors connected  coupled in parallel and the plurality of capacitors is controlled by a fourth switch. 
     
     
       6. The output circuit of  claim 5 , wherein the control circuit generates a second control signal to control the third and fourth switches so as to change the capacitance of the first and second capacitor devices. 
     
     
       7. The output circuit of  claim 1 ,  An output circuit for adjusting output voltage slew rate, comprising:
   a control circuit, for receiving an input data and generating a first control signal based on the input data;    
   an output control device comprising a first transistor coupled in series with a second transistor, wherein a connection is an output end for generating an output signal;    
   a first capacitor device having a first end and a second end, wherein the first end is coupled to a first working voltage and the second end generates a first control voltage to control a gate of the first transistor;    
   a first switch for controlling charging/discharging of the first capacitor device based on the first control signal;    
   a first current source for providing a first charging current for the first capacitor device;    
   a second capacitor device having a first end and a second end, wherein the second end is coupled to a second working voltage and the first end generates a second control voltage to control a gate of the second transistor;    
   a second switch for controlling charging/discharging of the second capacitor device based on the first control signal; and    
   a second current source providing a second charging current for the second capacitor device;    
 wherein the first current source is consistent of  comprises a plurality of current sources connected  coupled in parallel and the plurality of current sources is controlled by a third switch.  
 
     
     
       8. The output circuit of  claim 7 , wherein the second current source is consistent of  comprises a plurality of current sources connected  coupled in parallel and each of the current sources is controlled by a fourth switch. 
     
     
       9. The output circuit of  claim 8 , wherein the control circuit generates a third set of control signals to control the third and fourth switches so as to control the charging speed of the first and second capacitor device. 
     
     
       10. The output circuit of  claim 1 , further comprising  An output circuit for adjusting output voltage slew rate, comprising:
   a control circuit, for receiving an input data and generating a first control signal based on the input data;    
   an output control device comprising a first transistor coupled in series with a second transistor, wherein a connection is an output end for generating an output signal;    
   a first capacitor device having a first end and a second end, wherein the first end is coupled to a first working voltage and the second end generates a first control voltage to control a gate of the first transistor;    
   a first switch for controlling charging/discharging of the first capacitor device based on the first control signal;    
   a first current source for providing a first charging current for the first capacitor    
 device;  
   a second capacitor device having a first end and a second end, wherein the second end is coupled to a second working voltage and the first end generates a second control voltage to control a gate of the second transistor;    
   a second switch for controlling charging/discharging of the second capacitor device based on the first control signal;    
   a second current source providing a second charging current for the second capacitor device; and    
 a third transistor, a gate and a drain of the third transistor are connected  coupled to the gate of the first transistor to control an output current of the first transistor.  
 
     
     
       11. The output circuit of  claim 10 , further comprising a fourth transistor, a gate and a drain of the fourth transistor are connected  coupled to the gate of the second transistor to control an output current of the second transistor. 
     
     
       12. The output circuit of  claim 11 , wherein the first capacitor device is consistent of  comprises a plurality of capacitors connected  coupled in parallel and the plurality of capacitors is controlled by a third switch. 
     
     
       13. The output circuit of  claim 12 , wherein the second capacitor device is consistent of  comprises a plurality of capacitors connected  coupled in parallel and the plurality of capacitors is controlled by a fourth switch. 
     
     
       14. The output circuit of  claim 13 , wherein the control circuit generates a second control signal to control the third and fourth switches so as to change the capacitance of the first and second capacitor devices. 
     
     
       15. The output circuit of  claim 11 , wherein the first current source is consistent of  comprises a plurality of current sources connected  coupled in parallel and the plurality of current sources is controlled by a third switch. 
     
     
       16. The output circuit of  claim 15 , wherein the second current source is consistent of  comprises a plurality of current sources connected  coupled in parallel and the plurality of current sources is controlled by a fourth switch. 
     
     
       17. The output circuit of  claim 16 , wherein the control circuit generates a third control signal to control the third and fourth switches so as to control the charging speed of the first and second capacitor devices. 
     
     
       18. An output circuit for adjusting output voltage slew rate, comprising:
 a control circuit, for receiving an input data and generating a first control signal and a second control signal based on the input data;  
 an output control device consisting of  comprising a first transistor connected  coupled in series with a second transistor and , wherein a connection is an output end for generating an output signal;  
 a first capacitor device having a first end and a second end, wherein the first end is connected  coupled to a first working voltage and the second end generates a first control voltage by charging/discharging on the second end  to control a gate of the first transistor;  
 a first switch for controlling charging/discharging of the first capacitor device based on the first control signal;  
 a first current source for providing a first charging current for the first capacitor device;  
 a second capacitor device having a first end and a second end, wherein the second end is connected  coupled to a second working voltage and the first end generates a second control voltage by charging/discharging on the first end  to control a gate of the second transistor;  
 a second switch for controlling charging/discharging of the second capacitor device based on the second control signal; and  
 a second current source for providing a second charging current for the second capacitor device;  
 adjustingwherein the output voltage slew rate of the output circuit is adjusted by adjusting the dynamically adjustable time constant of at least the first andor second capacitor devices.  
 
     
     
       19. The output circuit of  claim 18 , wherein the first and second control signals are hot synchronized so as to control the first and second capacitor devices to charge/discharge at different point of time. 
     
     
       20. The output circuit of  claim 18 , wherein the relation of the first and second control signals are inverted. 
     
     
       21. The output circuit of  claim 18 , wherein output voltage slew rate of the output circuit is adjusted by adjusting the time constant of both the first and second capacitor devices.  
     
     
       22. A method for adjusting a slew rate of an output signal, the method comprising:
   receiving an input data;        generating a control signal according to the input data;        respectively providing a first current and a second current to a first capacitor device and a second capacitor device;        charging or discharging the first capacitor device to generate a first control voltage according to the control signal;        charging or discharging the second capacitor device to generate a second control voltage according to the control signal; and        outputting the output signal according to the first control voltage and the second control voltage        wherein the slew rate of the output signal is adjusted by adjusting at least one time constant or one capacitance of the first and second capacitor devices or one of the first and second currents dynamically.      
     
     
       23. The method of  claim 22 , wherein the control signal comprises a first and a second control signals, and the first and the second control signals are not synchronized so as to control the first and second capacitor devices to charging/discharging at different point of time.