Back-light control circuit of multi-lamps liquid crystal display

Abstract

A multi-lamps LCD back-light control circuit comprises a control unit, an full bridge switch, a resonance network circuit, a voltage transformer, a lamp, and a feedback network. A constant operating frequency and a pulse width modulation (PWM) feedback are used to control the CCFL current. The back-light control circuit is such that a power switch of the full bridge switch outputs a duty cycle that is controlled and changed via a PWM controller of the control unit, while a ground switch of the full bridge switch outputs a constant duty cycle controllable above 50%.

1. A multi-lamps liquid crystal display (LCD) panel back-light control circuit, comprising a control unit, an full bridge switch, a resonance network circuit, a voltage transformer, a lamp, and a feedback network, wherein a constant operating frequency and a pulse width modulation (PWM) feedback are used to control a current of cold cathode fluorescent lamps (CCFL)  (CCFLs), the back-light control circuit being characterized in that a power switch of the full bridge switch outputs a duty cycle that is controlled and changed via a PWM controller of the control unit, while a ground switch of the full bridge switch outputs a constant duty cycle controllable above 50%;
 wherein a phase relationship between a signal that controls the ground switch and a signal that controls the power switch is constant, the ground switch being formed from at least a  an NMOSFET and the power switch being formed at least from a PMOSFET; wherein with a common drain connection of the ground switch and the power switch, the power switch is turned off when the ground switch is turned on, and without a common drain connection, the power switch is turned on only after a preset delay from a turn on of the ground switch.  
 
     
     
       2. The circuit of  claim 1 , wherein the power switch of the full bridge is formed from two PMOSFET  PMOSFETs and the ground switch is formed from two NMOSFET  NMOSFETs. 
     
     
       3. The circuit of  claim 1 , wherein the control unit further comprises a PWM controller, a triangular wave/clock generator, a ½ frequency divider, and a logic circuit. 
     
     
       4. The circuit of  claim 3 , wherein the PWM controller includes an error amplifier which has an output with a voltage level that is compared to an outputted triangular wave via a comparator before obtaining a PWM output wave. 
     
     
       5. The circuit of  claim 3 , wherein the ½ frequency divider transforms the clock of the triangular wave/clock generator to a half frequency clock signal with a frequency equal to a half of the triangular wave, the  an inverter inverting the half frequency clock signal to an inverted half frequency clock signal; the half clock signal and the inverted half clock signal being outputted through a delay and an OR logic to generate an output signal having a duty cycle greater than 50% and delayed from the half clock signal, wherein the delay time is adjustable by means of a delay time controller element. 
     
     
       6. The circuit of  claim 3 , wherein a changed duty cycle output generated from the PWM controller is calculated as the result of an AND logic from the half clock signal and the output of the PWM controller, thereby the output of the PWM controller is in an outputting state only when the half clock signal is in a “1” logic state, the delay being adjustable by means of controller elements, and the AND logic enables the output of the PWM controller to be turned on only after a delay from the a turn on of the NMOSFET; wherein the PMOSFET being of low driving voltage and the NMOSFET being of high driving voltage, the inverter and the logic transform the PWM output to push the PMOSFET. 
     
     
       7. The circuit of  claim 3 , wherein the operating frequency and the synchronization of the operating phase of the triangular wave generator and the   1 / 2  divider circuit    1 / 2  frequency divider are controlled via a plurality of external synchronous signals delivered through control terminals thereof. 
     
     
       8. The circuit of  claim 1  or  3 , wherein different integrated circuits are respectively formed from the control unit, the different integrated circuits (IC) including either a plurality of respective frequency synchronous signal control terminals or a plurality of phase synchronous signal control terminals that are connected to one another so that the different ICs operate respectively either with a same operating frequency or a same phase. 
     
     
       9. The circuit of  claim 1 , wherein the resonance network circuit includes an inductor and a capacitor that are placed in the voltage transformer either in a primary side or a secondary side. 
     
     
       10. The circuit of  claim 1  or  9 , wherein the inductor of the resonance network circuit is either a separate and independent element from the voltage transformer or a leakage inductor generated by the voltage transformer. 
     
     
       11. The circuit of  claim 1  or  9 , wherein the  a secondary capacitor of the resonance network circuit is either an independent element or a parasitic capacitor generated between the CCFL  CCFLs and the LCD display panel. 
     
     
       12. A back-light control circuit for a liquid crystal display (LCD) panel, comprising:
   a lamp;        a resonance network circuit;        a feedback network commutating and filtering an AC output from the lamp;        a full bridge switch comprising a plurality of first switches connected to a voltage line and a plurality of second switches connected to a ground, the first and the second switches forming three conduction paths; and        a control unit which controls the first switches to output a larger than  50   %  duty cycle and controls the second switches to output a less than  50   %  duty cycle in order to enable a current flows through one switch of each of the first and the second switches alternately, wherein a constant operating frequency and a pulse width modulation feedback are used to control a current of the lamp, and the control unit comprises:      a PWM (pulse width modulation) controller that controls and changes the duty cycles; and        a triangular wave/clock generator, a logic circuit, and a  1 / 2  frequency divider which transforms a clock of the triangular wave/clock generator to a half frequency clock signal with a frequency equal to a half of the triangular wave, an inverter inverting the half frequency clock signal to an inverted half frequency clock signal, the half clock signal and the inverted half clock signal being outputted through a delay and an OR logic to generate an output signal having a duty cycle greater than  50   %  and delayed from the half clock signal, wherein the delay time is adjustable by means of a delay time controller element, and with a common drain connection of the second switches and the first switches, the first switches are turned off when the second switches are turned on, and without a common drain connection, the first switches are turned on only after a preset delay from a turn on of the second switches.       
     
     
       13. The circuit of  claim 12 , wherein the first switches are PMOSFET switches and the second switches are NMOSFET switches. 
     
     
       14. The circuit of  claim 12 , wherein a phase relationship between a signal that controls the second switches and a signal that controls the first switches is constant. 
     
     
       15. The circuit of  claim 12 , wherein the PWM controller further includes an error amplifier which has an output with a voltage level that is compared to an outputted triangular wave via a comparator before obtaining a PWM output wave. 
     
     
       16. The circuit of  claim 12 , wherein a constant operating frequency and a pulse width modulation feedback are used to control a current of cold cathode fluorescent lamps, wherein the operating frequency and a synchronization of an operating phase of the triangular wave/clock generator and the  1 / 2  frequency divider are controlled via an external synchronous signal delivered through a terminal thereof. 
     
     
       17. A back- light control circuit for a liquid crystal display (LCD) panel, comprising:      a lamp;        a resonance network circuit;        a feedback network commutating and filtering an AC output from the lamp;        a full bridge switch comprising a plurality of first switches connected to a voltage line and a plurality of second switches connected to a ground, the first and the second switches forming three conduction paths; and        a control unit which controls the first switches to output a larger than  50   %  duty cycle and controls the second switches to output a less than  50   %  duty cycle in order to enable a current flows through one switch of each of the first and the second switches alternately, wherein a constant operating frequency and a pulse width modulation feedback are used to control a current of the lamp, and different integrated circuits (ICs) are respectively formed from the control unit, each of the different integrated circuits including either a plurality of respective frequency synchronous signal control terminals or a plurality of phase synchronous signal control terminals that are connected to one another so that the different ICs operate respectively either with a same operating frequency or a same phase.     
     
     
       18. The circuit of  claim 17 , wherein the resonance network circuit comprises a voltage transformer, an inductor and a capacitor, wherein the inductor and the capacitor are placed in a primary side or a secondary side of the voltage transformer. 
     
     
       19. The circuit of  claim 18 , wherein the inductor of the resonance network circuit is an inductor selected from a group consisting of a separate and independent element from the transformer and a leakage inductor generated by the voltage transformer. 
     
     
       20. The circuit of  claim 19 , wherein a secondary capacitor of the resonance network circuit is either an independent element or a parasitic capacitor generated between a CCFL and the LCD panel.