Single transistor-control low-dropout regulator

Abstract

A low-dropout regulator with a single-transistor-control providing improved transient response and stability is disclosed. The single-transistor-control provides a dynamic resistance at the output of the regulator for minimizing undershoot and overshoot, and hence improves transient response. Since the single-control transistor reduces the output resistance of the regulator, the output pole is pushed to a sufficiently high frequency without affecting stability. Therefore, the limited choice of combinations of the output capacitance and its equivalent-series-resistance is substantially relaxed.

1. A low-dropout regulator comprising:
 (a) a pass transistor connected to an output terminal of said regulator, 
 (b) a control transistor having a first electrode connected to the output terminal of said regulator, a second control electrode biased with a control voltage generated by a reference mirror circuit, and a third electrode connected to a DC-biasing circuit and a biasing-current source, 
 (c) a DC-biasing circuit connected between a control electrode of the pass transistor and the third electrode of the control transistor, 
 (d) a reference mirror circuit accepting a supply- and temperature-independent reference voltage and generating a control voltage applied to the control electrode of the control transistor, and 
 (e) a first biasing-current source providing biasing to the control transistor and the DC-biasing circuit. 
 
     
     
       2. A regulator as claimed in  claim 1  wherein said pass transistor is a P-channel Metal-Oxide-Silicon Field-Effect-Transistor (PMOSFET) or a PNP bipolar junction transistor, wherein the pass transistor is connected in series between an input terminal and the output terminal of said regulator, wherein the first electrode of the control transistor is the low-impedance electrode and the third electrode of the control transistor is the output electrode, and wherein one end of the DC-biasing circuit is coupled to the input of the regulator. 
     
     
       3. A regulator as claimed in  claim 2  wherein said control transistor provides ultra-low resistance at the output terminal of said regulator, which resistance can be dynamically changed according to the output voltage of said regulator. 
     
     
       4. A regulator as claimed in  claim 2  wherein said control transistor is a PMOSFET or a PNP bipolar junction transistor. 
     
     
       5. A regulator as claimed in  claim 4  wherein the gate/base electrode of said control transistor is biased with a control voltage generated by the reference mirror circuit, the source/emitter electrode of said control transistor is coupled to the output of said regulator, and the drain/collector electrode of said control transistor is connected to the DC-biasing circuit and the first biasing-current source. 
     
     
       6. A regulator as claimed in  claim 2  wherein said DC-biasing circuit provides a DC voltage difference between the control electrode of the pass transistor and the output electrode of the control transistor whereby the control transistor operates in the saturation region. 
     
     
       7. A regulator as claimed in  claim 2  wherein said DC-biasing circuit comprises a second biasing-current source and a resistive element. 
     
     
       8. A regulator as claimed in  claim 7  wherein the second biasing-current source is connected between the input terminal of said regulator and the control electrode of the pass transistor, the resistive element is interposed between the control electrode of said pass transistor and the output electrode of said control transistor, and wherein the second biasing-current source provides biasing current to the resistive element, which produces a DC voltage difference between the control electrode of said pass transistor and the output electrode of said control transistor. 
     
     
       9. A regulator as claimed in  claim 7  wherein said resistive element is a resistor connected between the control electrode of the pass transistor and the output electrode of the control transistor. 
     
     
       10. A regulator as claimed in  claim 7  wherein said resistive element is an N-channel Metal-Oxide-Silicon Field-Effect-Transistor (NMOSFET) or a NPN bipolar junction transistor. 
     
     
       11. A regulator as claimed in  claim 10  wherein the source/emitter electrode of said NMOSFET/NPN bipolar junction transistor is coupled to the output electrode of the control transistor, the drain/collector electrode of said NMOSFET/NPN bipolar junction transistor is connected to the control electrode of the pass transistor, and wherein the voltage applied on the gate/base electrode of said NMOSFET/NPN bipolar junction transistor is used to control the source-to-drain/emitter-to-collector resistance whereby a DC voltage difference is provided between the control electrode of said pass transistor and the output electrode of said control transistor. 
     
     
       12. A regulator as claimed in  claim 2  wherein said reference mirror circuit comprises a diode-connected transistor, a current mirror, a transconductance G m -cell and a third biasing-current source. 
     
     
       13. A regulator as claimed in  claim 12  wherein within tolerances said diode-connected transistor has the same dimension and consumes the same current as the control transistor. 
     
     
       14. A regulator as claimed in  claim 12  wherein within tolerances the voltage across the low-impedance electrode and the control electrode of both said diode-connected transistor and said control transistor are the same whereby the output voltage of said regulator equals the voltage applied to the low-impedance electrode of said diode-connected transistor. 
     
     
       15. A regulator as claimed in  claim 12  wherein said diode-connected transistor is a PMOSFET or a PNP bipolar junction transistor. 
     
     
       16. A regulator as claimed in  claim 15  wherein both the drain/collector electrode and the gate/base electrode of said diode-connected transistor and the third biasing-current source are connected to form the output terminal of the reference mirror circuit and thereby generating a control voltage biased to the control electrode of the control transistor. 
     
     
       17. A regulator as claimed in  claim 12  wherein said current mirror comprises two PMOSFETs or PNP bipolar junction transistors. 
     
     
       18. A regulator as claimed in  claim 17  wherein the source/emitter electrodes of both said PMOSFETs/PNP bipolar junction transistors are coupled to the input terminal of regulator, and wherein one of the said PMOSFETs/PNP bipolar junction transistors is diode-connected to sense the output current of G m -cell, whereby by connecting the gate/base electrodes of both said PMOSFETs/PNP bipolar junction transistors the sensed output current of G m -cell is mirrored to the low-impedance electrode of the diode-connected transistor. 
     
     
       19. A regulator as claimed in  claim 12  wherein both said current mirror and said G m -cell mirror the supply- and temperature-independence reference voltage to the low-impedance electrode of the diode-connected transistor with current-driving capability. 
     
     
       20. A regulator as claimed in  claim 12  wherein said reference mirror circuit accepts a supply- and temperature-independent reference voltage and mirrors this reference voltage to the output terminal of said regulator by generating a control voltage biased to the control electrode of the control transistor. 
     
     
       21. A regulator as claimed in  claim 1  wherein said pass transistor is a N-channel Metal-Oxide-Silicon Field-Effect-Transistor (NMOSFET) or a NPN bipolar junction transistor, wherein the pass transistor is connected in series between the output terminal of said regulator and ground, wherein the first electrode of the control transistor is the low-impedance electrode and the third electrode of the control transistor is the output electrode, and wherein one end of the DC-biasing circuit is coupled to ground. 
     
     
       22. A regulator as claimed in  claim 21  wherein said control transistor provides ultra-low resistance at the output terminal of said regulator, which resistance can be dynamically changed according to the output voltage of said regulator. 
     
     
       23. A regulator as claimed in  claim 21  wherein said control transistor is a NMOSFET or a NPN bipolar junction transistor. 
     
     
       24. A regulator as claimed in  claim 23  wherein the gate/base electrode of said control transistor is biased with a control voltage generated by the reference mirror circuit, the source/emitter electrode of said control transistor is coupled to the output of said regulator, and the drain/collector electrode of said control transistor is connected to the DC-biasing circuit and the first biasing-current source. 
     
     
       25. A regulator as claimed in  claim 21  wherein said DC-biasing circuit provides a DC voltage difference between the control electrode of the pass transistor and the output electrode of the control transistor whereby the control transistor operates in the saturation region. 
     
     
       26. A regulator as claimed in  claim 21  wherein said DC-biasing circuit comprises a second biasing-current source and a resistive element. 
     
     
       27. A regulator as claimed in  claim 26  wherein the second biasing-current source is connected between ground and the control electrode of the pass transistor, the resistive element is interposed between the control electrode of said pass transistor and the output electrode of said control transistor, and wherein the second biasing-current source provides biasing current to the resistive element, which produces a DC voltage difference between the control electrode of said pass transistor and the output electrode of said control transistor. 
     
     
       28. A regulator as claimed in  claim 26  wherein said resistive element is a resistor connected between the control electrode of the pass transistor and the output electrode of the control transistor. 
     
     
       29. A regulator as claimed in  claim 26  wherein said resistive element is a P-channel Metal-Oxide-Silicon Field-Effect-Transistor (PMOSFET) or a PNP bipolar junction transistor. 
     
     
       30. A regulator as claimed in  claim 29  wherein the source/emitter electrode of said PMOSFET/PNP bipolar junction transistor is coupled to the output electrode of the control transistor, the drain/collector electrode of said PMOSFET/PNP bipolar junction transistor is connected to the control electrode of the pass transistor, and wherein the voltage applied on the gate/base electrode of said PMOSFET/PNP bipolar junction transistor is used to control the source-to-drain/emitter-to-collector resistance whereby a DC voltage difference is provided between the control electrode of said pass transistor and the output electrode of said control transistor. 
     
     
       31. A regulator as claimed in  claim 21  wherein said reference mirror circuit comprises a diode-connected transistor, a current mirror, a transconductance G m -cell and a third biasing-current source. 
     
     
       32. A regulator as claimed in  claim 31  wherein within tolerances said diode-connected transistor has the same dimension and consumes the same current as the control transistor. 
     
     
       33. A regulator as claimed in  claim 31  wherein within tolerances the voltage across the low-impedance electrode and the control electrode of both said diode-connected transistor and said control transistor are the same whereby the output voltage of said regulator equals the voltage applied to the low-impedance electrode of said diode-connected transistor. 
     
     
       34. A regulator as claimed in  claim 31  wherein said diode-connected transistor is a NMOSFET or a NPN bipolar junction transistor. 
     
     
       35. A regulator as claimed in  claim 34  wherein both the drain/collector electrode and the gate/base electrode of said diode-connected transistor and the third biasing-current source are connected to form the output terminal of the reference mirror circuit and thereby generating a control voltage biased to the control electrode of the control transistor. 
     
     
       36. A regulator as claimed in  claim 31  wherein said current mirror comprises two NMOSFETs or NPN bipolar junction transistors. 
     
     
       37. A regulator as claimed in  claim 36  wherein the source/emitter electrodes of both said NMOSFETs/NPN bipolar junction transistors are coupled to ground, and wherein one of the said NMOSFETs/NPN bipolar junction transistors is diode-connected to sense the output current of G m -cell, whereby by connecting the gate/base electrodes of both said NMOSFETs/NPN bipolar junction transistors the sensed output current of G m -cell is mirrored to the low-impedance electrode of the diode-connected transistor. 
     
     
       38. A regulator as claimed in  claim 31  wherein both said current mirror and said G m -cell mirror the supply- and temperature-independence reference voltage to the low-impedance electrode of the diode-connected transistor with current-driving capability. 
     
     
       39. A regulator as claimed in  claim 31  wherein said reference mirror circuit accepts a supply- and temperature-independent reference voltage and mirrors this reference voltage to the output terminal of said regulator by generating a control voltage biased to the control electrode of the control transistor. 
     
     
       40. A regulator, comprising:
 a pass transistor;   a control transistor;   a DC-biasing circuit having a first end coupled to a first node of the pass transistor, a second end coupled to a second node of the pass transistor, and a third end coupled to the control transistor;   a reference mirror circuit configured to receive a supply and temperature-independent reference voltage, wherein the reference mirror circuit is further configured to apply a control voltage to the control transistor; and   a current source configured to bias the control transistor and the DC-biasing circuit.   
     
     
       41. The regulator of claim 40, wherein the pass transistor is coupled to an output node of the regulator. 
     
     
       42. The regulator of claim 40, wherein the control transistor comprises a first control node coupled to an output node of the regulator, a second control node coupled to the reference mirror circuit, and a third control node coupled to the DC-biasing circuit and to the current source, wherein the control transistor is configured to be biased by the control voltage. 
     
     
       43. The regulator of claim 42, wherein the pass transistor is a P-channel Metal-Oxide Silicon Field-Effect Transistor (PMOSFET) or a PNP bipolar junction transistor, wherein the pass transistor is coupled in series between an input node of the regulator and the output node of the regulator, wherein a first control transistor node is a low-impedance node and a second control transistor node is coupled to the output node, and wherein the first end of the DC-biasing circuit is coupled to the input node. 
     
     
       44. The regulator of claim 40, wherein the pass transistor is an N-channel Metal-Oxide Silicon Field-Effect Transistor (NMOSFET) or a NPN bipolar junction transistor, wherein the pass transistor is coupled to an output node of the regulator and to ground, wherein a first control transistor node is a low-impedance node and a second control transistor node is coupled to the output node, and wherein the first end of the DC-biasing circuit is coupled to ground. 
     
     
       45. A regulator, comprising:
 a pass transistor;   a DC-biasing circuit;   a reference mirror circuit configured to produce a control voltage; and   a control transistor coupled to the reference mirror circuit, the pass transistor, and an output node of the regulator, wherein the control transistor is configured to produce a control current as a function of a difference between an output voltage of the regulator and the control voltage;   wherein the DC-biasing circuit is configured to control the pass transistor according to the control current to regulate an output voltage on the output node.   
     
     
       46. The regulator of claim 45, further comprising an output capacitor coupled to the output node. 
     
     
       47. The regulator of claim 45, wherein the control transistor is further configured to control a transient response of the regulator by adjusting a resistance of the control transistor in response to a change in the output voltage. 
     
     
       48. The regulator of claim 45, wherein the reference mirror circuit is further configured to receive a reference voltage and to generate the control voltage based, at least in part, on the reference voltage, and wherein the reference voltage is both supply-independent and temperature-independent. 
     
     
       49. The regulator of claim 45, further comprising a current source configured to bias the control circuit and the DC-biasing circuit. 
     
     
       50. A method, comprising:
 generating, by a reference mirror circuit, a control voltage;   producing, by a control transistor, a control current as a function of a difference between an output voltage of a regulator and the control voltage, wherein the control transistor is coupled to the reference mirror circuit, a pass transistor, and a DC-biasing circuit;   controlling, by the DC-biasing circuit, the pass transistor based, at least in part, on the control current to regulate an output voltage of the regulator.   
     
     
       51. The method of claim 50, further comprising controlling, by the control transistor, a transient response of the regulator by varying a resistance of the control transistor in response to a change in the output voltage. 
     
     
       52. The method of claim 50, further comprising generating, by the reference mirror circuit, the reference voltage based on a temperature-independent and supply-independent reference voltage. 
     
     
       53. A system, comprising:
 a regulator that includes:
 a pass transistor; 
 a control transistor; 
 a DC-biasing circuit having a first end coupled to a first node of the pass transistor, a second end coupled to a second node of the pass transistor, and a third end coupled to the control transistor; 
 a reference mirror circuit configured to be coupled to a supply-independent and temperature-independent reference voltage, wherein the reference mirror circuit is further configured to generate a control voltage to be applied to the control transistor; and 
 a current source configured to bias the control transistor and the DC-biasing circuit; and 
   an output capacitor coupled to an output node of the regulator.   
     
     
       54. The system of claim 53, wherein the output capacitor comprises an output capacitance and an output resistance. 
     
     
       55. The system of claim 53, wherein the regulator comprises a low-dropout regulator.