Liquid crystal display panels having control lines with uniform resistance

Abstract

A liquid crystal display (LCD) panel includes a substrate, a plurality of parallel control lines on the substrate, and a bonding pad area on the substrate having a plurality of bonding pads therein. A respective one of a plurality of interconnecting conductors connect a respective bonding pad of the bonding pad area to a respective one of the plurality of parallel control lines, each of the plurality of interconnecting conductors having a uniform resistance. According to embodiments of the invention, an interconnecting conductor of the plurality of interconnecting conductors may include a material selected to provide the uniform resistance. The interconnecting conductor may include a first portion including a first material having a first resistivity and a second portion including a second material having a second resistivity different from the first resistivity. The first and second portions may have respective first and second lengths selected to provide the uniform resistance. According to other embodiments, an interconnecting conductor of the plurality of interconnecting conductors may have a width selected to provide the uniform resistance. In one embodiment, the plurality of interconnecting conductors have a resistivity per unit length associated therewith and extend from the bonding pad area in a fanned configuration, with the resistivity of the interconnecting conductors increasing toward a medial portion of the fanned configuration. The width of the interconnecting conductors may decrease towards the medial portion of the fanned configuration to produce the desired resistivity. According to other embodiments, an interconnecting conductor of the plurality of interconnecting conductors has a length selected to provide the uniform resistance. In one embodiment, the interconnecting conductor has a serpentine portion to provide the desired length.

1. A liquid crystal display (LCD) panel having a plurality of pixel electrodes and a plurality of thin film transistors, comprising:
 a substrate; 
 a plurality of parallel control lines connected to the thin film transistors on the substrate; 
 a bonding pad area on said substrate including a plurality of bonding pads therein; and 
 a plurality of interconnecting conductors, a respective one of said plurality of interconnecting conductors connecting a respective bonding pad in said bonding pad area to a respective one of said plurality of parallel control lines, said plurality of interconnecting conductors providing a uniform resistance between said bonding pads and said control lines connected thereto, 
 wherein said plurality of interconnecting conductors extend from said bonding pad area in a fanned configuration, wherein a respective one of said plurality of conductors has a respective width, and wherein the width of said interconnecting conductors decreases towards a medial portion of said fanned configuration, 
 wherein an interconnecting conductor of said plurality of interconnecting conductors comprises a material selected to provide said uniform resistance, 
 wherein an interconnecting conductor of said plurality of interconnecting conductors comprises a first portion and a second portion, 
 wherein said first and second portions have respective first and second lengths selected to provide said uniform resistance, and 
 wherein at least one of said first and second portions comprises a serpentine portion. 
 
     
     
       2. An LCD panel according to  claim 1 , wherein a first distance between a predetermined bonding pad and a first control line is greater than a second distance between a second bonding pad and a second control line. 
     
     
       3. An LCD panel according to  claim 2 , wherein an interconnecting conductor of said plurality of interconnecting conductors comprises a material selected to provide said uniform resistance. 
     
     
       4. An LCD panel according to claim  3  1, wherein an interconnecting conductor of said plurality of interconnecting conductors comprises a the first portion comprising a first material having a first resistivity and a the second portion comprising a second material having a second resistivity different from said first resistivity. 
     
     
       5. An LCD panel according to  claim 4 , wherein said first and second portions have respective first and second lengths selected to provide said uniform resistance. 
     
     
       6. An LCD panel according to  claim 5 , wherein at least one of said first and second portions comprises a serpentine portion. 
     
     
       7. An LCD panel according to  claim 2 , wherein an interconnecting conductor of said plurality of interconnecting conductors has a width selected to provide said uniform resistance. 
     
     
       8. An LCD panel according to  claim 2 , wherein a respective one of said plurality of interconnecting conductors has a respective resistivity per unit length associated therewith, and wherein the resistivity of said interconnecting conductors increases toward said medial portion of said fanned configuration. 
     
     
       9. An LCD panel according to  claim 2 , wherein an interconnecting conductor of said plurality of interconnecting conductors has a length selected to provide said uniform resistance. 
     
     
       10. An LCD panel according to  claim 9 , wherein said interconnecting conductor has a serpentine portion. 
     
     
       11. An LCD panel according to  claim 10 , wherein said interconnecting conductor has a first straight portion and a second serpentine portion. 
     
     
       12. An LCD panel according to  claim 2 , wherein said plurality of parallel control lines comprises one of a plurality of gate lines or a plurality of data lines. 
     
     
       13. A liquid crystal display (LCD) panel having a plurality of pixel electrodes and a plurality of thin film transistors, comprising:
 a substrate; 
 an array of LCD elements on said substrate, said array comprising a plurality of rows and columns; 
 a bonding pad area on said substrate including a plurality of bonding pads therein; and 
 a plurality of interconnecting conductors on the substrate, a respective one of which connects a respective bonding pad in the bonding pad area to a respective LCD element of a row of LCD elements, said plurality of interconnecting conductors being configured and having a width selected to provide a uniform resistance between the bonding pads and the LCD elements of said one row of LCD elements connected thereto, 
 wherein said plurality of interconnecting conductors extend from said bonding pad area in a fanned configuration, wherein a respective one of said plurality of conductors has a respective width, and wherein the width of said interconnected interconnecting conductors decreases towards a medial portion of said fanned configuration, 
 wherein an interconnecting conductor of said plurality of interconnecting conductors has a length selected to provide said uniform resistance, and 
 wherein said interconnecting conductor comprises a serpentine portion. 
 
     
     
       14. An LCD panel according to  claim 13 , wherein an interconnecting conductor of said plurality of interconnecting conductors comprises a material selected to provide said uniform resistance. 
     
     
       15. An LCD panel according to  claim 13 , wherein an interconnecting conductor of said plurality of interconnecting conductors comprises a first portion comprising a first material having a first resistivity and a second portion comprising a second material having a second resistivity different from said first resistivity. 
     
     
       16. An LCD panel according to  claim 15 , wherein said first and second portions have respective first and second lengths selected to provide said uniform resistance. 
     
     
       17. An LCD panel according to  claim 16 , wherein at least one of said first and second portions has a serpentine portion. 
     
     
       18. An LCD panel according to  claim 13 , wherein an interconnecting conductor of said plurality of interconnecting conductors has a length selected to provide said uniform resistance. 
     
     
       19. An LCD panel according to  claim 18 , wherein said interconnecting conductor comprises a serpentine portion. 
     
     
       20. An LCD panel according to claim  19  13, wherein said interconnecting conductor has a first straight portion and a second serpentine portion. 
     
     
       21. A display panel having a plurality of pixel electrodes and a plurality of thin film transistors, comprising:
 a substrate;   a plurality of parallel control lines connected to the thin film transistors on said substrate;   a bonding pad area on said substrate including a plurality of bonding pads therein; and   a plurality of interconnecting conductors, a respective one of said plurality of interconnecting conductors connecting a respective bonding pad in said bonding pad area to a respective one of said plurality of parallel control lines,   wherein said plurality of interconnecting conductors extend from said bonding pad area in a fanned configuration, and at least one of said plurality of interconnecting conductors has a serpentine portion.    
     
     
       22. A display panel of claim 21, wherein said at least one of said plurality of interconnecting conductors further has a straight portion.  
     
     
       23. A display panel of claim 21, wherein at least another of said plurality of interconnecting conductors has a straight portion.  
     
     
       24. A display panel of claim 23, wherein said straight portion is located at the outer side of said serpentine portion.  
     
     
       25. A display panel of claim 21, wherein said at least one of said interconnecting conductor has a wavelike or ridged shape.  
     
     
       26. A display panel of claim 21, wherein said plurality of control lines comprises a plurality of gate lines and a plurality of data lines.  
     
     
       27. A display panel having comprising:
 a substrate;   a plurality of pixel electrodes over said substrate;   a plurality of control lines over said substrate, the control lines electrically connected to said plurality of pixel electrodes and a plurality of thin film transistors;   a bonding pad area on said substrate including a plurality of bonding pads therein; and   a plurality of interconnecting conductors over said substrate, a respective one of which connects a respective bonding pad in said bonding pad area to a respective one of said plurality of control lines,   wherein said plurality of interconnecting conductors extend from said bonding pad area in a fanned configuration, and lengths of respective ones of said plurality of interconnecting conductors increase towards a medial portion said fanned configuration,   wherein said respective one of said plurality of interconnecting conductors further has a straight portion and a serpentine portion.    
     
     
       28. A display panel of claim 27, wherein said serpentine portion comprising a first material having a first resistivity and said straight portion comprising a second material having a second resistivity different from said first resistivity.  
     
     
       29. A display panel of claim 28, wherein the lengths of said serpentine portion and said straight portion and the resistance associated therewith given by
   Kx+(a−x)=b;
     K≧b/a1;
   
       and
   a≧x,
 
 where K represents a resistivity ratio of the first material to the second material, a represents the length of said respective one of said interconnecting conductors, b represents the length of the longest one of said interconnecting conductors, a1 represents the length of the shortest one of said interconnecting conductors, and x represents the length of the serpentine portion.  
 
     
     
       30. A display panel of claim 27, wherein said respective one of said interconnecting conductor has a wavelike or ridged shape.  
     
     
       31. A display panel of claim 27, wherein said plurality of control lines comprises a plurality of gate lines and a plurality of data lines.  
     
     
       32. A display panel comprising:
 a substrate;   a plurality of parallel control lines connected to the thin film transistors on said substrate; a bonding pad area on said substrate including a plurality of bonding pads therein; and   a plurality of interconnecting conductors, a respective one of said plurality of interconnecting conductors connecting a respective bonding pad in said bonding pad area to a respective one of said plurality of parallel control lines,   wherein said plurality of interconnecting conductors extend from said bonding pad area in a fanned configuration, and at least one of said plurality of interconnecting conductors has a first portion and a second portion having differing resistivities, and   wherein said at least one of said interconnecting conductors has a wavelike or ridged shape.    
     
     
       33. A display panel of claim 32, wherein said first portion and said second portion comprises different materials.  
     
     
       34. A display panel of claim 33, wherein said first portion comprises chrome.  
     
     
       35. A display panel of claim 34, wherein said second portion comprises aluminum.  
     
     
       36. A display panel of claim 32, wherein said first portion and said second portion are straight.  
     
     
       37. A display panel of claim 36, wherein said first portion is serpentine, and said second portion is straight.  
     
     
       38. A display panel of claim 32, wherein said plurality of control lines comprises a plurality of gate lines and a plurality of data lines.  
     
     
       39. A display panel of claim 1, wherein said plurality of control lines comprises a plurality of gate lines and a plurality of data lines.  
     
     
       40. A display panel of claim 13, wherein said plurality of control lines comprises a plurality of gate lines and a plurality of data lines.  
     
     
       41. A display panel having a plurality of pixel electrodes and a plurality of thin film transistors, comprising:
 a substrate;   a plurality of parallel control lines connected to the thin film transistors on said substrate;   a bonding pad area on said substrate including a plurality of bonding pads therein; and   a plurality of interconnecting conductors, a respective one of said plurality of interconnecting conductors connecting a respective bonding pad in said bonding pad area to a respective one of said plurality of parallel control lines,   wherein said plurality of interconnecting conductors extend from said bonding pad area in a fanned configuration, said plurality of interconnecting conductors comprise a first conductor and a second conductor, and said first conductor has a wavelike portion and said second conductor is rectilinear.    
     
     
       42. A display panel of claim 41, wherein said plurality of interconnecting conductors further comprises a third conductor that is rectilinear and has a width different from a width of said second conductor.  
     
     
       43. A display panel of claim 42, wherein the width of said third conductor is greater than the width of said second conductor, and said third conductor are disposed farther than said second conductor from a medial portion of said fanned configuration.  
     
     
       44. A display panel of claim 41, wherein said plurality of interconnecting conductors further comprises a third conductor that has a wavelike portion that has an amplitude different from an amplitude of the wavelike portion of said first conductor.  
     
     
       45. A display panel of claim 44, wherein the amplitude of the wavelike portion of said third conductor is smaller than the amplitude of the wavelike portion of said first conductor, and said third conductor is farther than said first conductor from a medial portion of said fanned configuration.  
     
     
       46. A display panel of claim 45, wherein said second conductor is farther than said third conductor from a medial portion of said fanned configuration.  
     
     
       47. A display panel of claim 41, wherein said second conductor is farther than said first conductor from a medial portion of said fanned configuration.  
     
     
       48. A display panel having a plurality of pixel electrodes and a plurality of thin film transistors, comprising:
 a substrate;   a plurality of parallel control lines connected to the thin film transistors on said substrate;   a bonding pad area on said substrate including a plurality of bonding pads therein; and   a plurality of interconnecting conductors, a respective one of said plurality of interconnecting conductors connecting a respective bonding pad in said bonding pad area to a respective one of said plurality of parallel control lines,   wherein said plurality of interconnecting conductors extend from said bonding pad area in a fanned configuration, said plurality of interconnecting conductors comprise a first conductor and a second conductor, each of said first conductor and said second conductor having a wavelike portion, and an amplitude of the wavelike portion of the first conductor is different from an amplitude of the wavelike portion of the second conductor.    
     
     
       49. A display panel of claim 44, wherein the amplitude of the wavelike portion of said second conductor is smaller than the amplitude of the wavelike portion of said first conductor, and said second conductor is farther than said first conductor from a medial portion of said fanned configuration.  
     
     
       50. A display panel having a plurality of pixel electrodes and a plurality of thin film transistors, comprising:
 a substrate;   a plurality of parallel control lines connected to the thin film transistors on said substrate;   a bonding pad area on said substrate including a plurality of bonding pads therein; and   a plurality of interconnecting conductors, a respective one of said plurality of interconnecting conductors connecting a respective bonding pad in said bonding pad area to a respective one of said plurality of parallel control lines,   wherein said plurality of interconnecting conductors extend from said bonding pad area in a fanned configuration, said plurality of interconnecting conductors comprise a first conductor and a second conductor, each of said first conductor and said second conductor having a wavelike portion, and a shape of the wavelike portion of the first conductor is different from a shape of the wavelike portion of the second conductor.    
     
     
       51. A display panel having a plurality of pixel electrodes and a plurality of thin film transistors, comprising:
 a substrate;   a plurality of substantially parallel control lines connected to the thin film transistors on said substrate;   a bonding pad area on said substrate including a plurality of bonding pads therein; and   a plurality of interconnecting conductors, a respective one of said plurality of interconnecting conductors connecting a respective bonding pad in said bonding pad area to a respective one of said plurality of substantially parallel control lines,   wherein said plurality of interconnecting conductors extend from said bonding pad area in a fanned configuration, said plurality of interconnecting conductors comprise a first conductor group and a second conductor group, and said first conductor group comprises wavelike conductors and said second conductor group comprises rectilinear conductors.    
     
     
       52. A display panel of claim 41, wherein said rectilinear conductors comprise widths different from each other.  
     
     
       53. A display panel of claim 42, wherein said first conductor group is disposed around a medial portion of said fanned configuration and said second conductor group is disposed around outer portions of said fanned configuration.  
     
     
       54. A display panel having a plurality of pixel electrodes and a plurality of thin film transistors, comprising:
 a substrate;   a plurality of substantially parallel control lines connected to the thin film transistors on said substrate;   a bonding pad area on said substrate including a plurality of bonding pads therein; and   a plurality of interconnecting conductors, a respective one of said plurality of interconnecting conductors connecting a respective bonding pad in said bonding pad area to a respective one of said plurality of substantially parallel control lines,   wherein said plurality of interconnecting conductors extend from said bonding pad area in a fanned configuration, said plurality of interconnecting conductors comprise a first conductor group and a second conductor group, and said first conductor group comprises wavelike conductors and said second conductor group comprises rectilinear conductors,   wherein said first conductor group is disposed around a medial portion of said fanned configuration and said second conductor group is disposed around outer portions of said fanned configuration, and   wherein a respective one of said rectilinear conductors has a respective width and the widths of said rectilinear conductors decrease towards a medial portion of said fanned configuration.