Semiconductor device

Abstract

In the semiconductor device, a control power MOSFET chip 2 is disposed on the input-side plate-like lead 5, and the drain terminal DT 1 is formed on the rear surface of the chip 2, and the source terminal ST 1 and gate terminal GT 1 are formed on the principal surface of the chip 2, and the source terminal ST 1 is connected to the plate-like lead for source 12. Furthermore, a synchronous power MOSFET chip 3 is disposed on the output-side plate-like lead 6, and the drain terminal DT 2 is formed on the rear surface of the chip 3 and the output-side plate-like lead 6 is connected to the drain terminal DT 2. Furthermore, source terminal ST 2 and gate terminal GT 2 are formed on the principal surface of the synchronous power MOSFET chip 3, and the source terminal ST 2 is connected to the plate-like lead for source 13. The plate-like leads for source 12 and 13 are exposed, and therefore, it is possible to increase the heat dissipation capability of the MCM 1.

1. A semiconductor device comprising a first transistor and a second transistor, each of which has an input electrode, first output electrode and second output electrode, wherein
 the current path connecting between said first output electrode and said second output electrode of said first transistor are connected in series to the current path connecting between said first output electrode and said second output electrode of said second transistor;   either said first output electrode or said second output electrode of said first transistor is connected to a first conductive member; and   the other output electrode of said first transistor is connected to a second conductive member;   either said first output electrode or said second output electrode of said second transistor is connected to said second conductive member;   the other output electrode of said second transistor is connected to a third conductive member;   said first conductive member, said second conductive member and said third conductive member are electrically isolated from one another; and   said first conductive member, said second conductive member, said third conductive member, said first transistor and said second transistor are mechanically integrated.   
     
     
       2. A semiconductor device according to  claim 1 , wherein said second conductive member has two or more bends. 
     
     
       3. A semiconductor device according to  claim 1 , wherein said second conductive member is a nearly S-shape. 
     
     
       4. A semiconductor device according to  claim 1 , wherein in said second conductive member, the surface to which an output electrode of said first transistor is connected is located on the same side of the surface to which an output electrode of said second transistor is connected. 
     
     
       5. A semiconductor device comprising
 a plurality of semiconductor chips, each of which has a terminal on its principal surface,   a conductive plate which has electrical connections to at least two semiconductor chips' terminals among said plurality of semiconductor chips,   a sealed body which encapsulates said plurality of semiconductor chips, and   a plurality of external connection terminals which have individual electrical connections to the plurality of semiconductor chips, wherein   at least two semiconductor chips which are connected by the conductive plate have an individual transistor circuit, and the conductive plate is exposed outside said sealed body.   
     
     
       6. A semiconductor device according to  claim 5 , wherein among said plurality of semiconductor chips, each of a first semiconductor chip and a second semiconductor chip has a power-supply transistor circuit; and
 said semiconductor device further comprising   a first conductive plate which connects to a drain terminal of said first semiconductor chip,   a second conductive plate which connects to a source terminal of said first semiconductor chip,   a third conductive plate which connects to a drain terminal of said second semiconductor chip, and   a fourth conductive plate which connects to a source terminal of said second semiconductor chip, wherein   said second conductive plate has an electrical connection to said third conductive plate, and said second and third conductive plates are at least partially exposed outside said sealed body.   
     
     
       7. A semiconductor device according to  claim 6 , wherein said second conductive plate and said third conductor plate are integrated. 
     
     
       8. A semiconductor device according to  claim 5 , wherein
 among said plurality of semiconductor chips,   each of a first semiconductor chip and a second semiconductor chip has a power-supply transistor circuit, and a third semiconductor chip has a driver circuit which controls said first and second semiconductor chips.   
     
     
       9. A semiconductor device according to  claim 6 , wherein said second and fourth conductive plates are partially exposed on either the principal or rear surface of said sealed body, and said first and third conductive plates are partially exposed on the other surface of said sealed body. 
     
     
       10. A semiconductor device according to  claim 9 , wherein said second conductive plate and said third conductor plate are integrated. 
     
     
       11. A semiconductor device according to  claim 5 , wherein among said plurality of semiconductor chips,
 at least one semiconductor chip is installed upside down in relation to the other semiconductor chips.   
     
     
       12. A semiconductor device according to  claim 6 , wherein said second semiconductor chip is installed upside down in relation to said first semiconductor chip,
 said second and third conductive plates are partially exposed on either the principal or rear surface of said sealed body; and   said first and fourth conductive plates are partially exposed on the other surface of said sealed body.   
     
     
       13. A semiconductor device according to  claim 12 , wherein said second conductive plate and said third conductive plate are integrated. 
     
     
       14. A semiconductor device according to  claim 5 , wherein a heat radiating member is installed in the exposed area of said conductive plate exposed outside said sealed body. 
     
     
       15. A semiconductor device comprising
 a plurality of semiconductor chips, each of which has a terminal on its principal surface,   a conductive plate which has electrical connections to at least two semiconductor chips' terminals among said plurality of semiconductor chips,   a sealed body which encapsulates said plurality of semiconductor chips by resin,   a plurality of external connection terminals which have individual electrical connections to the plurality of semiconductor chips, wherein   said conductive plate is exposed outside said sealed body, and   the connecting portion of said conductive plate at which said conductive plate is connected to one semiconductor chip is joined to the connecting portion at which said conductive plate is connected to the other semiconductor chip, on either the principal or rear surface of said sealed body, or on the outside of said semiconductor chips inside said sealed body.   
     
     
       16. A semiconductor device according to  claim 15 , wherein among said plurality of semiconductor chips,
 each of a first semiconductor chip and a second semiconductor chip has a power-supply transistor circuit, and a third semiconductor chip has a driver circuit which controls said first and second semiconductor chips.   
     
     
       17. A semiconductor device according to  claim 15 , wherein a heat radiating member is installed in the exposed area of said conductive plate exposed outside said sealed body. 
     
     
       18. A semiconductor device according to  claim 15 , wherein said conductive plate has an electrical connection to the semiconductor chip via a plurality of gold bumps. 
     
     
       19. A semiconductor device according to  claim 16 , wherein the terminal of said first semiconductor chip has an electrical connection to the terminal of said third semiconductor chip by said conductive plate, and the terminal of said second semiconductor chip has an electrical connection to the terminal of said third semiconductor chip by another conductive plate. 
     
     
       20. A semiconductor device comprising
 a plurality of semiconductor chips, each of which has a terminal on its principal surface,   a conductive plate which has electrical connections to at least two semiconductor chips' terminals among said plurality of semiconductor chips,   a sealed body which encapsulates said plurality of semiconductor chips by resin,   a plurality of external connection terminals which have individual electrical connections to said plurality of semiconductor chips and are disposed on the peripheral edge of the rear surface of said sealed body, wherein   said conductive plate is exposed on the at least either principal or rear surface of said sealed body.   
     
     
       21. A semiconductor device according to  claim 20 , wherein among said plurality of semiconductor chips,
 each of a first semiconductor chip and a second semiconductor chip has a power-supply transistor circuit, and   a third semiconductor chip has a driver circuit which controls said first and second semiconductor chips.   
     
     
       22. A semiconductor device according to  claim 20 , wherein a heat radiating member is installed in the exposed area of said conductive plate exposed outside said sealed body. 
     
     
       23. A semiconductor device according to  claim 20 , wherein
 said conductive plate has an electrical connection to the semiconductor chip via a plurality of gold bumps.   
     
     
       24. A semiconductor device according to  claim 20 , wherein
 among said plurality of semiconductor chips,   each of a first semiconductor chip and a second semiconductor chip has a power-supply transistor circuit, and   said second semiconductor chip is installed upside down compared to said first semiconductor chip; and   said semiconductor device further comprising   a first conductive plate which connects to a drain terminal of said first semiconductor chip,   a second conductive plate which connects to a source terminal of said first semiconductor chip,   a third conductive plate which connects to a drain terminal of said second semiconductor chip, and   a fourth conductive plate which connects to a source terminal of said second semiconductor chip, wherein   said second and third conductive plates are partially exposed on either the principal or rear surface of said sealed body, and said first and fourth conductive plates are partially exposed on the other surface of said sealed to body.   
     
     
       25. A semiconductor device for a DC/DC converter formed in a single package comprising:
 a first semiconductor chip having a main face and a rear face and electrically connected to a first conductor member at an input side;   a second semiconductor chip having a main face and a rear face and electrically connected to a second conductor member at a grounding side, wherein the first and second semiconductor chips are arranged in opposite relation to one another with respect to the main faces and the rear faces thereof;   a driver IC chip for controlling the first and second semiconductor chips;   a source terminal formed in the main face of the first semiconductor chip;   a drain terminal formed in the rear face of the first semiconductor chip;   a drain terminal formed in the main face of the second semiconductor chip;   a source terminal and gate terminal formed in the rear face of the second semiconductor chip;   a source terminal and gate terminal formed in a rear face of the second semiconductor chip; and   a single conductor member formed above the source terminal of the first semiconductor chip and the drain terminal of the second semiconductor chip;   wherein the single conductor member is electrically connected to the source terminal of the first semiconductor chip and the drain terminal of the second semiconductor chip, and   wherein the gate terminal of the second semiconductor chip is electrically connected to the driver IC chip.   
     
     
       26. The semiconductor device for a DC/DC converter according to claim 25, wherein the first semiconductor chip and the second semiconductor chip are power transistors. 
     
     
       27. A semiconductor device for a DC/DC converter formed in a single package comprising:
 a first external terminal;   a second external terminal;   a third external terminal;   a first semiconductor chip, having a main face and a rear face and formed above the first external terminal, electrically connected to a first conductor member at an input side;   a second semiconductor chip, having a main face and a rear face and formed above the second external terminal, electrically connected to a second conductor member at a grounding side;   a driver IC chip for controlling the first and second semiconductor chips;   a source terminal formed in the main face of the first semiconductor chip;   a drain terminal formed in the rear face of the first semiconductor chip, wherein the first and second semiconductor chips are arranged in opposite relation with respect to the main and rear faces thereof;   a drain terminal formed in the main face of the second semiconductor chip;   a source terminal and a gate terminal formed in the rear face of the second semiconductor chip; and   a single conductor member formed above the source terminal of the first semiconductor chip, the drain terminal of the second semiconductor chip and the third external terminal; wherein the single conductor member is electrically connected to the source terminal of the first semiconductor chip, the drain terminal of the second semiconductor chip and the third external terminal,   wherein a terminal is formed in a main face of the driver IC chip,   wherein a wire is connected to the terminal of the driver IC chip and the gate terminal of the second semiconductor chip,   wherein the first, second and third external terminals are formed in a rear face of the package, and   wherein the first external terminal is electrically connected to the drain terminal of the first semiconductor chip.   
     
     
       28. The semiconductor device for a DC/DC converter according to claim 27, wherein a gate terminal is formed in the main face of the first semiconductor,
 wherein a second terminal different from the terminal formed in the main face of the driver IC chip is formed in the main face of the driver IC chip, and   wherein a wire is connected to the second terminal of the driver IC chip.   
     
     
       29. The semiconductor device for a DC/DC converter according to claim 27, wherein a cross sectional area of the conductor plate member is larger than that of the wire. 
     
     
       30. The semiconductor device for a DC/DC converter according to claim 29, wherein the first and second semiconductor chips are power transistors. 
     
     
       31. A semiconductor device for a DC/DC converter formed in a single package comprising:
 a plate conductor member at an input side;   a plate conductor member at a grounding side;   a plate conductor member at an output;   a first semiconductor chip having a main face and a rear face and formed above the first external terminal and electrically connected to a plate conductor member at an input side;   a second semiconductor chip having a main face and a rear face and formed above the second external terminal and electrically connected to a plate conductor member at a grounding side, wherein the first and second semiconductor chips are arranged in opposite relation with respect to the main and rear faces thereof;   a source terminal and a gate terminal formed in the main face of the first semiconductor chip;   a drain terminal formed in the rear face of the first semiconductor chip;   a drain terminal formed in the main face of the second semiconductor chip;   a source terminal formed in the rear face of the second semiconductor chip; and   a single conductor member formed above the plate conductor member at the output side, the source terminal of the first semiconductor chip and the drain terminal of the second semiconductor chip and the third external terminal   wherein the single conductor member is electrically connected to the source terminal of the first semiconductor chip, the drain terminal of the second semiconductor chip and the plate conductor member at the output side,   a wire electrically connected to the source terminal of the second semiconductor chip;   wherein the plate conductor members at the input side, grounding side and output side are formed in the rear face of the package,   wherein the plate conductor member at the input side is electrically connected to the drain terminal of the first semiconductor chip, and   wherein the plate conductor member at the grounding side is electrically connected to the source terminal of the second semiconductor chip.   
     
     
       32. The semiconductor device for a DC/DC converter according to claim 31, wherein cross sectional areas of the conductor plate members are each respectively larger than that of the wire. 
     
     
       33. The semiconductor device for a DC/DC converter according to claim 31, which further comprises a driver IC chip for controlling the first and second semiconductor chips,
 wherein the source terminal of the first semiconductor chip is electrically connected to the driver IC chip.   
     
     
       34. The semiconductor device for a DC/DC converter according to claim 31, wherein the source terminal of the first semiconductor chip is electrically connected to an area where the conductor plate member at the output side is not connected, and wherein the wire is connected to the area. 
     
     
       35. A semiconductor device for a DC/DC converter formed in a single package comprising:
 a plate conductor member at an input side;   a plate conductor member at a grounding side;   a plate conductor member at an output side;   a first semiconductor chip having a main face and a rear face and formed above the conductor member at input side;   a second semiconductor chip having a main face and a rear face and above the plate conductor member at the grounding side, wherein the first and second semiconductor chips are arranged in opposite relation with respect to the main and rear faces thereof;   a source terminal and a gate terminal formed on the main surface of the first semiconductor chip,   a drain terminal formed on the rear face of the first semiconductor chip;   a drain terminal formed on the main face of the second semiconductor chip;   a source terminal formed on the rear face of the second semiconductor chip;   a single conductor member above the plate conductor member at the output side, wherein the single conductor member is electrically connected to the source terminal of the first semiconductor chip, the drain terminal of the second semiconductor chip, and the plate conductor member at the output side; and   a wire connected to the source terminal of the first semiconductor chip;   wherein the plate conductor member at the input side, the plate conductor member at the grounding side and the plate conductor member at the output side are formed in a rear face of the package,   wherein the plate conductor member at the input side is electrically connected to the drain terminal of the first semiconductor chip, and   wherein the plate conductor member at the grounding side is electrically connected to the source terminal of the second semiconductor chip.   
     
     
       36. The semiconductor device for a DC/DC converter according to claim 35, which further comprises a driver IC chip for controlling the first and second semiconductor chips, wherein the gate terminal of the first semiconductor is electrically connected to the driver IC chip, and
 wherein a wire is electrically connected to the driver IC chip.   
     
     
       37. The semiconductor device for a DC/DC converter according to claim 35, which further comprises a driver IC chip for controlling the first and second semiconductor chips, wherein a gate terminal of the second semiconductor chip is formed in the rear face of the second semiconductor chip, and
 wherein the gate terminal of the second semiconductor chip is electrically connected to the driver IC chip.   
     
     
       38. The semiconductor device according to claim 35, wherein the first semiconductor chip and the second semiconductor chip are power transistors. 
     
     
       39. A semiconductor device for a DC/DC converter formed in a single package comprising:
 a first semiconductor chip having a main face and a rear face and electrically connected to a plate conductor member;   a second semiconductor chip having a main face and a rear face and electrically connected to a plate conductor member at a grounding side;   a source terminal and a gate terminal formed on the main surface of the first semiconductor chip,   a drain terminal formed in the rear face of the first semiconductor chip;   a drain terminal formed in the main face of the second semiconductor chip;   a source terminal formed in the rear face of the second semiconductor chip; and   a single conductor member above the source terminal of the first semiconductor chip and the drain terminal of the second semiconductor chip,   wherein the single conductor member is electrically connected to the source terminal of the first semiconductor chip and the drain terminal of the second semiconductor chip, and   wherein a wire is connected to the source terminal and the gate terminal of the first semiconductor chip.   
     
     
       40. A semiconductor device for a DC/DC converter formed in a single package comprising:
 a first semiconductor chip having a main face and a rear face and electrically connected to a plate conductor member;   a second semiconductor chip having a main face and a rear face and electrically connected to a plate conductor member at a grounding side;   a driver IC chip for controlling the first and second semiconductor chips;   a source terminal and a gate terminal formed on the main surface of the first semiconductor chip,   a drain terminal formed on the rear face of the first semiconductor chip;   a drain terminal formed in the main face of the second semiconductor chip;   a source terminal formed in the rear face of the second semiconductor chip; and   a single conductor member above the source terminal of the first semiconductor chip and the drain terminal of the second semiconductor chip,   wherein the single conductor member is electronically connected to the source terminal of the second semiconductor chip, and   wherein a wire is connected to the source terminal of the first semiconductor chip and the driver IC chip.   
     
     
       41. The semiconductor device for a DC/DC converter according to claim 40, wherein the wire is connected to a source terminal area where the single conductor member is not connected to the first semiconductor chip. 
     
     
       42. A semiconductor device for a DC/DC converter comprising:
 a first semiconductor chip having a main face and a rear face and electrically connected to a plate conductor member at an input side;   a second semiconductor chip having a main face and a rear face and connected to a plate conductor member at a grounding side, wherein the first and second semiconductor chips are arranged in opposite relation with respect to the main and rear faces thereof;   a driver IC chip for controlling the first and second semiconductor chips;   a source terminal formed in the main face of the first semiconductor chip;   a drain terminal formed in the rear face of the first semiconductor chip;   a drain terminal formed in the main face of the second semiconductor chip;   a source terminal formed in the rear face of the second semiconductor chip; and   a single conductor member formed above the source terminal of the first semiconductor chip and drain terminal of the second semiconductor chip, wherein the single conductor member is electrically connected to the source terminal and the gate terminal of the first semiconductor chip, and   wherein the driver IC chip is provided with a terminal to connect with the source terminal of the first semiconductor chip.   
     
     
       43. The semiconductor device according to claim 42, wherein the wire is electrically connected to the terminal of the driver IC chip in an area of the source terminal where the first semiconductor chip is not connected to the single conductor member. 
     
     
       44. The semiconductor device for a DC/DC converter according to claim 42, wherein a gate terminal is formed in the main face of the first semiconductor chip, and a wire for electrically connecting the driver IC chip is connected to the gate terminal. 
     
     
       45. The semiconductor device for a DC/DC converter according to claim 42, wherein a gate terminal is formed in the rear face of the second semiconductor chip, and the gate terminal of the second semiconductor chip is electrically connected to the terminal of the driver IC chip. 
     
     
       46. The semiconductor device for a DC/DC converter according to claim 42, wherein a sectional area of the plate conductor member at the output side is larger than that of the wire. 
     
     
       47. The semiconductor device according to claim 25, wherein the first and second conductor members are plate conductor members. 
     
     
       48. The semiconductor device according to claim 27, wherein the first and second conductor members are plate conductor members.