USRE44199EExpiredUtilityPatentIndex 91
Variable throughput reduction communications system and method
Est. expiryJun 14, 2020(expired)· nominal 20-yr term from priority
Inventors:GARODNICK JOSEPH
H04L 1/0025H04L 1/0002Y02D30/50H04J 13/004H04L 1/0071H04L 2001/0096H04L 1/004H04B 2201/70703H04B 1/707H04L 1/02H04J 13/00H04L 1/0041
91
PatentIndex Score
24
Cited by
16
References
49
Claims
Abstract
A communications system and method having a transmitted data rate determined by an error rate syndrome at a receiver. Data are demultiplexed into a plurality of data channels, and processed as a plurality of channels. A combiner combines the plurality of channels as a multiplexed signal. At a receiver, the multiplexed signal is despread into a plurality of despread channels. A syndrome signal is generated from an error rate of the channels. From the syndrome signal, a desired-data rate is determined for the transmitter.
Claims
exact text as granted — not AI-modifiedI claim:
1. A communications system comprising
a transmitter, including,
a demultiplexer for demultiplexing input data into a plurality of data channels;
a plurality of forward-error-correction encoders and interleavers, coupled to said demultiplexer, for FEC encoding and interleaving the plurality of data channels as a plurality of FEC encoded and interleaved channels, respectively;
a plurality of processors coupled to said plurality of FEC encoders and interleavers, for processing the plurality of FEC encoded and interleaved channels as a plurality of modulated channels;
a combiner coupled to said plurality of processors, for combining the plurality of modulated channels as a multiplexed signal;
a receiver, including,
a plurality of demodulators for demodulating the multiplexed signal into a plurality of demodulated channels, respectively;
a multiplicity of FEC decoder and de-interleavers, coupled to said plurality of demodulators for FEC decoding and de-interleaving the multiplicity of demodulated channels, as a multiplicity of decoded demodulated channels having an error rate;
a command processor responsive to the error rate for determining a desired data rate and generating a control signal to be transmitted to the transmitter; and
a multiplexer, coupled to said plurality of FEC decoders and de-interleavers, for multiplexing the multiplicity of decoded channels
said transmitter including receiver circuitry for receiving the control signal transmitted by the receiver and circuitry responsive to the control signal to control the data rate of transmitted data.
2. The communications system as set forth in claim 1 , wherein
said multiplicity of FEC decoders generates a plurality of syndrome signals; and
said command processor is responsive to the plurality of syndrome signals, for determining which channels in the plurality of modulated channels to delete from transmission over the communications channel.
3. The communications system as set forth in claim 1 , wherein
said multiplicity of FEC decoders generates a plurality of syndrome signals; and
a said command processor is responsive to the plurality of syndrome signals, for employing erasure decoding for correcting errors.
4. The communications system as set forth in claims 1 wherein said command processor is responsive to the a plurality of syndrome signals for sending a data-rate command signal to the transmitter.
5. A communications system comprising:
a transmitter, including,
demultiplexer means for demultiplexing input data into a plurality of data channels;
encoder means far FEC encoding and interleaving the plurality of data channels as a plurality of FEC encoded and interleaved channels, respectively;
processor means for processing the plurality of FEC encoded and interleaved channels as a plurality of modulated channels;
combiner means for combining the plurality of modulated channels as a multiplexed signal;
a receiver, including,
demodulator means for demodulating the multiplexed signal into a plurality of demodulated channels, respectively;
decoder means for FEC decoding and de-interleaving the multiplicity of demodulated channels, as a multiplicity of decoded channels having an error rate;
command processor means responsive to the error rate for generating a signal indicating a desired data rate to be sent to said transmitter; and
multiplexer means for multiplexing the multiplicity of decoded channels
said transmitter including receiver circuitry for receiving the control signal transmitted by the receiver and circuitry responsive to the control signal to control the data rate of transmitted data.
6. The communications system as set forth in claim 5 , wherein
said decoder means generates a plurality of syndrome signals; and
said command processor is responsive to the plurality of syndrome signals for determining which channels in the plurality of modulated channels to delete from transmission over the communications channel.
7. The communications system as set forth in claim 5 , wherein
said decoder means generates a plurality of syndrome signals; and
said command processor means is responsive to the plurality of syndrome signals, for employing erasure decoding for correcting errors.
8. A communications method comprising the steps of:
demultiplexing input data into a plurality of data channels;
FEC encoding and interleaving the plurality of data channels as a plurality of FEC encoded and interleaved channels, respectively;
processing the plurality of FEC encoded and interleaved channels as a plurality of modulated channels;
combining the plurality of channels as a multiplexed signal;
transmitting the multiplexed signal having the plurality of modulated channels, over a communications channel;
demodulating the multiplexed signal into a plurality of demodulated channels, respectively;
FEC decoding and de-interleaving the plurality of demodulated channels, as a multiplicity of decoded channels;
generating a syndrome signal from an error rate of the multiplicity of decoded channels;
generating, in response to the syndrome signal, a channel quality indication control signal indicating a desired data rate;
transmitting the quality indication control signal to the transmitter; and
multiplexing the multiplicity of decoded channels; and
controlling the data rate of data transmitted during said transmitting step in response to the control signal.
9. The communications method as set forth in claim 8 , further including the steps of:
generating a plurality of syndrome signals; and
determining, responsive to the plurality of syndrome signals, which channels in the plurality of modulated channels to delete from transmission over the communications channel.
10. The communications method as set forth in claim 8 , further including the steps of:
generating a plurality of syndrome signals; and
employing, responsive to the plurality of syndrome signals, erasure decoding for correcting errors.
11. A receiver for recovering wireless data conveyed in data symbols by a plurality of different subchannel signals transmitted over a wireless channel, comprising:
demodulator circuitry for detecting the transmitted signals in a plurality of demodulated channels; decoder circuitry for FEC decoding and de-interleaving the plurality of demodulated channels, providing a multiplicity of decoded channels, each having an error rate; command processor circuitry responsive to the error rate of the decoded channels for generating a data-rate control signal to produce a desired data rate to be sent by the data symbol transmitter of the signals, the data rate control signal controlling operation of circuitry at the transmitter to produce the desired data rate to be sent by the data symbol transmitter of the signals; transmitting circuitry for conveying the error rate dependent rate control signal back to the data symbol transmitter; and multiplexer circuitry for combining the multiplicity of decoded channels into a signal stream of received data.
12. The receiver of claim 11 wherein the decoder circuitry includes circuitry to decode FEC codes of different rates.
13. A method for recovering wireless data conveyed in data symbols by a plurality of different subchannel signals transmitted over a wireless channel, comprising the steps of:
detecting the transmitted signals in a plurality of demodulated channels; FEC decoding and de-interleaving the plurality of demodulated channels, providing a multiplicity of decoded channels, each having an error rate; using command processor circuitry responsive to the error rate of the decoded channels to generate a data-rate control signal to produce a desired data rate to be sent by the data symbol transmitter of the signals, transmitting the error rate dependent data-rate control signal back to the data symbol transmitter; and multiplexing the multiplicity of decoded channels into a single stream of received data.
14. The method of claim 13 wherein the decoding step includes decoding FEC codes of different rates.
15. A transmitter for generating a wireless signal forming transmitted signals having a data rate including
a demultiplexer for demultiplexing input data into a plurality of independent data channels; encoder circuitry for FEC encoding and interleaving the plurality of data channels as a plurality of FEC encoded and interleaved channels, respectively; processor circuitry for processing the plurality of FEC encoded and interleaved channels as a plurality of modulated channels; a receiver, located at the transmitter, for receiving a data-rate control signal generated from a remote terminal; and a processor responsive to the data-rate control signal for adjusting the data rate of the transmitted signals.
16. The transmitter of claim 15 wherein the FEC encoder circuitry is set to different code rates.
17. The transmitter of claim 16 wherein the data rate processor changes the transmitted data rate by changing the FEC encoding rate.
18. A method tor transmitting a wireless signal forming transmitted signals having a data rate, including the steps of
demultiplexing input data into a plurality of independent data channels; FEC encoding and interleaving the plurality of data channels as a plurality of FEC encoded and interleaved channels, respectively; processing the plurality of FEC encoded and interleaved channels as a plurality of modulated channels; receiving an error rate dependent data rate control signal generated from a remote terminal; and adjusting the data rate of the transmitted signal in accordance with the data-rate control signal.
19. The method of claim 18 wherein the modulated channels are set to common symbol rates but different modulated depths.
20. The method of claim 18 wherein the FEC encoding is set to varying code rates.
21. The method of claim 18 wherein the data rate processor changes the transmitted data rate by changing the FEC encoding rate.
22. A wireless transmitter comprising:
a demultiplexer having at least one input and a plurality of outputs, said input receiving an input data stream and said outputs providing a first plurality of parallel output data streams, with each output data stream including a group of different data symbols from said input data stream, said output data streams collectively providing a first data rate; a spread spectrum processor for generating a separate spread spectrum signal for each of said first plurality of output data streams; transmission circuitry for simultaneously transmitting said separate spread spectrum signals in a common channel; and a controller for said demultiplexer, said controller receiving a feedback control signal from a receiver, said feedback control signal being an indication of the signal quality of the data rate received at the receiver, whereby in response to said feedback control signal indicating a reduction in signal quality, said controller controls said demultiplexer to change said outputs from output data streams having different data symbols to output data streams having the same data symbols, thereby providing a second data rate lower than said first data rate.
23. The wireless transmitter of claim 22 further including FEC encoder circuitry for FEC-encoding said first plurality of parallel output data streams.
24. The wireless transmitter of claim 23 further including bit-interleaving circuitry for bit-interleaving said first plurality of FEC-encoded parallel output data streams.
25. The wireless transmitter of claim 22 wherein said demultiplexer has additional outputs which provide a second plurality of parallel output data streams accompanying said first plurality of parallel output data streams, each respective one of said second plurality of output data streams including the same data symbols as a respective one of said first plurality of parallel output data streams.
26. The transmitter of claim 22 wherein said feedback control signal is a data rate command signal.
27. A wireless transmitter comprising:
a demultiplexer having at least one input and a plurality of outputs, said input receiving an input data stream and said outputs providing a first plurality of parallel output data streams with each output data stream including a group of different data symbols from said input data stream, said output data streams collectively providing a first data rate; a spread spectrum processor for generating a separate spread spectrum signal for each of said first plurality of output data streams; transmission circuitry for simultaneously transmitting said separate spread spectrum signals in a common channel; and a controller for said demultiplexer, said controller receiving a feedback control signal from a receiver, said feedback control signal being an indication of the signal quality of the data received at the receiver whereby, in response to said feedback control signal indicating a reduction in signal quality, said controller controls said demultiplexer to change said outputs from said first plurality of output data streams having different data symbols to a second plurality of output data streams having different data symbols, said second plurality being less than said first plurality, whereby said second plurality of output data streams collectively provides a second data rate lower than said first data rate.
28. The wireless transmitter of claim 27 further including FEC encoder circuitry for FEC-encoding said first and second plurality of parallel output data streams.
29. The wireless transmitter of claim 28 further including bit-interleaving circuitry for bit-interleaving said first and second plurality of FEC-encoded parallel output data streams.
30. The wireless transmitter of claim 27 wherein said demultiplexer additionally produces a third plurality of parallel output data streams, each respective one of said third plurality of output data streams including the same data symbols as a respective one of said first plurality of parallel output data streams.
31. The wireless transmitter of claim 27 wherein said demultiplexer additionally produces a fourth plurality of parallel output data streams, each respective one of said fourth plurality of output data streams including the same data symbols as a respective one of said second plurality of parallel output data streams.
32. The transmitter of claim 27 wherein said feedback control signal is a data rate command signal.
33. A wireless transmitter that transmits an input bit stream by demultiplexing the input bit stream to form plural, parallel, lower-rate output bit streams which, after processing are simultaneously transmitted in separately detectible signals within a common frequency channel, comprising:
a demultiplexer for demultiplexing said input bit stream and producing parallel, lower-rate output bit streams, each lower-rate output bit stream having a group of different symbols from said input bit stream; and control circuitry for said demultiplexer responsive to a feedback control signal from a receiver, said feedback control signal being an indication of the signal quality of data received at the receiver, said control circuitry causing the number of said parallel, lower-rate output bit streams produced by said demultiplexer to increase when said feedback control signal indicates an increase in signal quality and to decrease when said feedback signal indicates a decrease in signal quality.
34. The wireless transmitter of claim 33 wherein said parallel, lower-rate output bit streams are transmitted as signals having constant symbol durations.
35. The wireless transmitter of claim 34 wherein said parallel, lower-rate output bit streams are error-encoded and bit-interleaved before transmission.
36. The wireless transmitter of claim 33 wherein said parallel, lower-rate output bit streams collectively have a data rate that increases when the number of said lower-rate output bit streams increases and have a data rate that decreases when the number of said lower-rate output bit streams decreases.
37. The transmitter of claim 33 wherein said feedback control signal is a data rate command signal.
38. A wireless receiver for simultaneously receiving a plurality of spread spectrum signals transmitted in a common frequency channel, comprising:
rf circuitry for converting said received spread spectrum signals to baseband; a demodulator for separating said baseband spread spectrum signals and for recovering a stream of data symbols from each of said spread spectrum signals; a multiplexer for multiplexing bit-streams of data derived from said recovered streams of data symbols to form a single stream of output data; and a controller for controlling the number of bit-streams that are applied to said multiplexer, whereby the rate of said single stream of output data is determined by the number of bit-streams applied to said multiplexer.
39. The receiver of claim 38 further including a bit-deinterleaver and FEC decoder for deinterleaving and decoding said bit-streams before they are applied to the multiplexer.
40. The receiver of claim 38 wherein said controller combines bit-streams having the same bit sequences to produce said bit-streams applied to said multiplexer.
41. The receiver of claim 38 wherein said controller generates a feedback control signal which is sent to the transmitter that transmits said plurality of spread spectrum signals, said feedback control signal indicating the signal quality of the data received at the receiver, said feedback control signal changing the number of transmitted spread spectrum signals that have different bit sequences, whereupon said controller changes the number of bit-streams that are applied to said multiplexer to change the rate of said single stream of output data.
42. The receiver of claim 41 wherein said controller increases the number of inputs applied to said multiplexer when said feedback control signal indicates an increase in signal quality.
43. The receiver of claim 41 wherein said controller decreases the number of inputs applied to said multiplexer when said feedback signal indicates a decrease in signal quality.
44. A receiver for simultaneously receiving a plurality of separately-detectible signals simultaneously transmitted in a common frequency channel, comprising:
rf circuitry for converting said received plurality of signals to baseband; a demodulator for separating said plurality of baseband signals and for recovering a stream of data symbols from each of said signals; a multiplexer for multiplexing bit-streams of data derived from said recovered streams of data symbols to form a single stream of output data; and a controller for controlling the number of bit-streams that are applied to said multiplexer, whereby the rate of said single stream of output data is determined by the number of bit-streams applied to said multiplexer.
45. The receiver of claim 44 further including a bit-deinterleaver and an FEC decoder for deinterleaving and decoding said bit-streams before they are applied to said multiplexer.
46. The receiver of claim 44 wherein said controller combines bit-streams having the same bit sequences to produce said bit-streams applied to said multiplexer.
47. The receiver of claim 44 wherein said controller generates a feedback control signal which is sent to the transmitter that transmits said plurality of signals, said feedback control signal indicating the signal quality in the channel between the transmitter and said receiver, said feedback control signal changing the number of transmitted separately-detectible signals that have different bit sequences, whereupon said controller changes the number of bit-streams that are applied to said multiplexer to change the rate of said single stream of output data.
48. The receiver of claim 47 wherein said controller increases the number of inputs applied to said multiplexer when said feedback signal indicates an increase in signal quality.
49. The receiver of claim 47 wherein said controller decreases the number of inputs applied to said multiplexer when said feedback signal indicates a decrease in signal quality.Cited by (0)
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