USRE44267EExpiredUtility

Method to prevent static destruction of an active element comprised in a liquid crystal display device

53
Assignee: SATOU TAKASHIPriority: Oct 3, 1995Filed: Oct 2, 1996Granted: Jun 4, 2013
Est. expiryOct 3, 2015(expired)· nominal 20-yr term from priority
Inventors:Takashi Satou
H10W 72/536H10D 89/611H10D 89/811G02F 2202/103G02F 1/136204G02F 1/1343G02F 1/136
53
PatentIndex Score
11
Cited by
34
References
33
Claims

Abstract

A liquid crystal display device which utilizes an active matrix substrate and its substrate, and which is provided with a novel method of manufacture which can reduce the manufacturing process of amorphous silicon thin film transistors of reverse stagger construction, and an electrostatic protection means which is created using this method of manufacture. In a thin film transistor manufacturing process, along with forming an aperture for connecting the contact hole and the external terminal in a manufacturing process for a thin film transistor, utilization is made of ITO film as the wiring. The electrostatic protection means is formed from a bi-directional diode (electrostatic protection element) which is composed utilizing an MOS transistor connected between the electrode (PAD) for connecting the external terminal, and the joint electric potential line. The electrostatic protection element is substantially a transistor, with great current capacity, and utilizing the TFT formation process of pixel components in their existent state, the process can be formed without any complications.

Claims

exact text as granted — not AI-modified
What is claimed is: 
     
       1. A method of manufacturing a thin film element comprising the steps of:
 (A) forming a gate electrode layer, and a gate electrode material layer on a substrate having the same material as the gate electrode layer;   (B) forming a gate insulation film on said gate electrode layer and gate electrode material layer;   (C) forming a channel layer and an ohmic contact layer on said gate insulation film that overlaps horizontally with said gate electrode layer;   (D) forming a source electrode layer and a drain electrode layer that are connected to said ohmic contact layer;   (E) removing said ohmic contact layer from a region between said source electrode layer and the drain electrode layer by etching;   (F) forming a protective film for covering said source electrode layer said drain electrode layer and said gate electrode material layer;   (G) forming a first aperture wherein a part of said gate insulation film and the overlapping layer of the protective film and said gate electrode material layer are selectively etched for exposing a portion of a surface of one of the gate electrode layer and the gate electrode material layer and at the same times, forming a second aperture wherein a portion of the protective film on the source electrode layer and the drain electrode layer are selectively etched for exposing a portion of a surface of one of the source electrode layer and the drain electrode layer; and   (H) connecting an electrically conductive material layer through said first aperture and said second aperture to at least one of the gate electrode layer, the gate electrode material layer, the source electrode layer, and/or the drain electrode layer.   
     
     
       2. The method of manufacturing a thin film element in  claim 1 , wherein said first aperture formed in said step (G) is one of a contact aperture for connecting a wiring to said gate electrode material layer, and an aperture for connecting an external terminal to said gate electrode material layer. 
     
     
       3. The method of manufacturing a thin film element in  claim 1 , wherein said electrically conductive material is formed of ITO (indium tin oxide). 
     
     
       4. An active matrix substrate comprising:
 a thin film transistor (TFT) connected to a scanning line, a signal line arranged in a matrix state, and a pixel electrode to compose pixel components; 
 protective means for preventing static electricity destruction using thin film transistors established between at least one of said scanning line and said signal line, or a region electrically equivalent to the at least one of said scanning line and said signal line, and a common electric potential region, said protective means for preventing electrostatic destruction includes a diode wherein a gate electrode layer in the thin film transistor and a source/drain electrode layer are connected; and 
 a first aperture formed by selectively removing an insulation layer on said gate electrode layer and a second aperture formed in a same manufacturing process by selectively removing an insulating layer on said source/drain electrode layer, said gate electrode layer and said source/drain electrode layer electrically connected via said first aperture and said second aperture by an electrically conductive material layer composed of the same material as said pixel electrode. 
 
     
     
       5. The active matrix substrate in  claim 4 , wherein said first aperture passes through the an overlapping film of the layer that includes a first insulation film on the a gate electrode material layer and passes through the a second insulation film on the first insulation film, and the second aperture passes through only the second insulation film on the source/drain electrode layer. 
     
     
       6. The active matrix substrate in  claim 4 , wherein said pixel electrode and the electrically conductive material layer are formed from ITO (indium tin oxide). 
     
     
       7. The active matrix substrate in  claim 4 , wherein a region electrically equivalent to at least one of the scanning line and the signal line is an electrode for connecting the an external terminal, and one of a common electric potential line which applies a standard potential that becomes the standard potential at a time of driving the a liquid crystal using alternate current, and a joint electric potential line for commonly connecting the electrode to make the electrode and the one of the common electric potential line and the joint electric potential line the same electric potential. 
     
     
       8. The active matrix substrate in  claim 7 , wherein the protective means for preventing electrostatic destruction is provided both between the electrode for connecting the external terminal and the common electric potential line and between the electrode for connecting the external terminal and the joint electric potential line. 
     
     
       9. The active matrix substrate in  claim 4 , wherein said protective means for preventing static electricity destruction includes a bi-directional diode for commonly connecting a first diode anode and a second diode cathode, for commonly connecting a first diode cathode and a second diode anode. 
     
     
       10. A liquid crystal display device using the active matrix substrate described in  claim 4 . 
     
     
       11. A method of manufacturing an active matrix substrate comprising the steps of:
 (A) forming a gate electrode layer, and a gate electrode material layer on a substrate having the same material as the gate electrode layer;   (B) forming a gate insulation film on said gate electrode layer and gate electrode material layer;   (C) forming a channel layer having a gate electrode layer as a plane surface on the gate insulation film;   (D) forming a source/drain electrode layer connected to an ohmic contact layer and for forming a source/drain electrode material layer from the same material as the source/drain electrode layer in a predetermined region on said insulation film;   (E) forming a protective film for covering said source electrode layer, said drain electrode layer and said gate electrode material layer;   (F) forming a first aperture wherein a part of said gate insulation film and the overlapping layer of the protective film on the gate electrode layer and said gate electrode material layer are selectively etched for exposing a portion of a surface of one of the gate electrode layer and the gate electrode material layer and at the same times, forming a second aperture wherein a portion of the protective film on the source/drain electrode layer and source/drain electrode material layer are selectively etched for exposing a portion of a surface of one of the source/drain electrode layer and the source/drain electrode material layer; and   (G) connecting an electrically conductive material layer to at least one of the gate electrode layer, the gate electrode material layer, the source/drain electrode layer and the source/drain electrode material layer through said first aperture and said second aperture.   
     
     
       12. The method of manufacturing an active matrix substrate in  claim 11 , wherein:
 a thin film transistor (TFT) is connected to a scanning line and a signal line;   a pixel electrode is connected to the thin film transistor; and   a diode for preventing electrostatic destruction constructed for connecting a thin film transistor gate electrode layer and the source/drain electrode layer, on the active matrix substrate.   
     
     
       13. The method of manufacturing an active matrix substrate in  claim 12 , wherein the layer formed from the same layer as the pixel electrode is the electrically conductive material layer. 
     
     
       14. The method of manufacturing an active matrix substrate in  claim 11 , wherein ITO (Indium Tin Oxide) is the electrically conductive material layer. 
     
     
       15. A method for peventing preventing electrostatic destruction of active elements in an active matrix liquid crystal display device, comprising the steps of:
 forming a pixel part including a thin film transistor connected to a scanning line and a signal line arranged in a matrix, and a pixel electrode connected to one end of the thin film transistor; 
 providing protective means for preventing electrostatic destruction, including a diode having a gate electrode layer in the thin film transistor connected to a source/drain electrode layer; and 
 connecting the protective means for preventing static electricity destruction between at least one of said scanning line, said signal line, a member electrically equivalent to at least one of said scanning line and said signal line, and a common electric potential line. 
 
     
     
       16. A method of manufacturing a thin film element, comprising the steps of:
 (A) forming a gate electrode layer and a gate electrode material layer, which is formed of substantially the same material as said gate electrode layer, above a substrate;   (B) forming a gate insulation film, a channel layer and an ohmic contact layer above said gate electrode layer and said gate electrode material layer;   (C) forming a source electrode layer and a drain electrode layer that are connected to said ohmic contact layer;   (D) removing said ohmic contact layer from a region between said source electrode layer and said drain electrode layer by etching;   (E) forming a protective film for covering said source electrode layer, said drain electrode layer and said gate electrode material layer, the protective film being in contact with the channel layer in at least a region between said source electrode layer and said drain electrode layer;   (F) forming a first aperture wherein a part of said gate insulation film and said protective film above said gate electrode material layer is selectively etched for exposing a portion of a surface of said gate electrode material layer, and substantially simultaneously, forming a second aperture wherein a part of  the protective film on said source electrode layer and said drain electrode layer is selectively etched for exposing a portion of a surface of at least one of said source electrode layer and said drain electrode layer; and   (G) forming an electrically conductive material layer on at least one of said first aperture and said second aperture.   
     
     
       17. The method of manufacturing a thin film element in claim 16, wherein said electrically conductive material layer of said second aperture is a pixel electrode. 
     
     
       18. The method of manufacturing a thin film element in claim 16, wherein said electrically conductive material layer is made of ITO. 
     
     
       19. The method of manufacturing a thin film element in claim 16, wherein said electrically conductive material layer of said first aperture is an external connection terminal.  
     
     
       20. The method of manufacturing a thin film element in claim 16, wherein said electrically conductive material layer formed on said second aperture is connected to an electrically conductive material layer formed on said first aperture.  
     
     
       21. The method of manufacturing a thin film element in claim 16, wherein the gate electrode layer and the gate electrode material layer are formed on one or more layers of the substrate. 
     
     
       22. A method of manufacturing a thin film element, comprising the steps of:
 (A) forming a pixel gate electrode layer and a protective element gate electrode layer, which is formed of substantially the same material as said pixel gate electrode layer, above a substrate;   (B) forming a gate insulation film, a channel layer and an ohmic contact layer on said pixel gate electrode layer and said protective element gate electrode layer;   (C) forming a pixel source electrode layer, a pixel drain electrode layer, a protective element source electrode layer and a protective element drain electrode layer that are connected to said ohmic contact layer;   (D) removing said ohmic contact layer from a region between said pixel source electrode layer and said pixel drain electrode layer and from a region between said protective element source electrode layer and said protective element drain electrode layer by etching;   (E) forming a protective film for covering said pixel source electrode layer, said pixel drain electrode layer, said protective element source electrode layer and said protective element drain electrode layer, the protective film being in contact with the channel layer in at least a region between said pixel source electrode layer and said pixel drain electrode layer;   (F) forming a first aperture wherein a part of said protective film on said pixel source electrode layer and said pixel drain electrode layer is selectively etched for exposing a portion of a surface of at least one of said pixel source electrode layer and said pixel drain electrode layer, and substantially simultaneously, forming a second aperture wherein a part of  the protective film on said protective element source electrode layer, said protective element drain electrode layer and said protective element gate electrode layer is selectively etched for exposing a portion of a surface of at least one of said protective element source electrode layer, said protective element drain electrode layer and said protective element gate electrode layer; and   (G) forming an electrically conductive material layer on at least one of said first aperture and said second aperture.   
     
     
       23. The method of manufacturing a thin film element in claim 22, wherein said electrically conductive material layer formed on said second aperture is connected to said electrically conductive material layer formed on said first aperture.  
     
     
       24. A method of manufacturing an active matrix substrate, comprising the steps of:
 (A) forming a gate electrode layer and a gate electrode material layer, which is formed of substantially the same material as said gate electrode layer, above a substrate;   (B) forming a gate insulation film on said gate electrode layer and said gate electrode material layer;   (C) forming a channel layer such that the gate insulation film is disposed between the channel layer and the gate electrode layer;   (D) forming a source electrode layer and a drain electrode layer that are electrically connected to said channel layer;   (E) forming a protective film for covering said source electrode layer, said drain electrode layer and said gate electrode material layer, the protective film being in contact with the channel layer in at least a region between said source electrode layer and said drain electrode layer;   (F) forming a first aperture wherein a part of said gate insulation film and said protective film above said gate electrode material layer is selectively etched for exposing a portion of a surface of said gate electrode material layer, and substantially simultaneously, forming a second aperture wherein a part of said protective film on said source electrode layer and said drain electrode layer is selectively etched for exposing a portion of a surface of at least one of said source electrode layer and said drain electrode layer; and   (G) forming an electrically conductive material film on at least one of said first aperture and said second aperture.    
     
     
       25. The method of manufacturing an active matrix substrate in claim 24, wherein said electrically conductive material layer of said second aperture is a pixel electrode.  
     
     
       26. The method of manufacturing an active matrix substrate in claim 24, wherein said electrically conductive material layer is made of ITO.  
     
     
       27. The method of manufacturing an active matrix substrate in claim 24, wherein said electrically conductive material layer of said first aperture is an external connection terminal.  
     
     
       28. The method of manufacturing an active matrix substrate in claim 24, wherein said electrically conductive material layer formed on said second aperture is connected to an electrically conductive material layer formed on said first aperture.  
     
     
       29. A method of manufacturing an active matrix substrate, comprising the steps of:
 (A) forming a pixel gate electrode layer and a protective element gate electrode layer, which is formed of substantially the same material as said pixel gate electrode layer, above a substrate;   (B) forming a gate insulation film on said pixel gate electrode layer and said protective element gate electrode material layer;   (C) forming a channel layer such that the gate insulation film is disposed between the channel layer and said pixel gate electrode layer, the gate insulation film also being disposed between the channel layer and said protective element gate electrode layer;   (D) forming a pixel source electrode layer, a pixel drain electrode layer, a protective element source electrode layer and a protective element drain electrode layer that are electrically connected to said channel layer;   (E) forming a protective film for covering said pixel source electrode layer, said pixel drain electrode layer, said protective element source electrode layer and said protective element drain electrode layer, the protective film being in contact with the channel layer in at least a region between said pixel source electrode layer and said pixel drain electrode layer;   (F) forming a first aperture wherein a part of said protective film on said pixel source electrode layer and said pixel drain electrode layer is selectively etched for exposing a portion of a surface of at least one of said pixel source electrode layer and said pixel drain electrode layer, and substantially simultaneously, forming a second aperture wherein a part of  the protective film on said protective element source electrode layer, said protective element drain electrode layer and said protective element gate electrode layer is selectively etched for exposing a portion of a surface of at least one of the protective element source electrode layer, said protective element drain electrode layer and said protective element gate electrode layer; and   (G) forming an electrically conductive material layer on at least one of said first aperture and said second so aperture.    
     
     
       30. The method of manufacturing an active matrix substrate in claim 29, wherein said electrically conductive material layer formed on said second aperture is connected to said electrically conductive material layer formed on said first aperture.  
     
     
       31. A method of manufacturing a thin film element, comprising the steps of:
 (A) forming a gate electrode layer and a gate electrode material layer, which is formed of substantially the same material as said gate electrode layer, above a substrate;   (B) forming a gate insulation film, a channel layer and an ohmic contact layer above said gate electrode layer and said gate electrode material layer;   (C) forming a source electrode layer and a drain electrode layer that are connected to said ohmic contact layer;   (D) removing said ohmic contact layer from a region between said source electrode layer and said drain electrode layer by etching;   (E) forming a protective film for covering said source electrode layer, said drain electrode layer and said gate electrode material layer, the protective film being in contact with the channel layer in at least a region between said source electrode layer and said drain electrode layer;   (F) forming a first aperture wherein a part of said gate insulation film and said protective film above said gate electrode material layer is selectively etched for exposing a portion of a surface of said gate electrode material layer, and substantially simultaneously, forming a second aperture wherein a part of  the protective film over said source electrode layer and said drain electrode layer is selectively etched for exposing a portion of a surface of at least one of said source electrode layer and said drain electrode layer; and   (G) forming an electrically conductive material layer on at least one of said first aperture and said second aperture.    
     
     
       32. An active matrix substrate comprising:
 a switching element disposed in correspondence with an intersection of a signal line and a scanning line, and a pixel electrode disposed in correspondence with the switching element;   a static destructive protection element using thin film transistors established between at least one of the scanning line and said signal line, or a region electrically equivalent to the at least one of the scanning line and the signal line, and a common electric potential region, the static destructive protection element including a diode wherein a gate electrode layer in the thin film transistor, a source electrode layer and a drain electrode layer are connected; and   a first aperture formed by selectively removing an insulation layer above the gate electrode layer and a second aperture formed by selectively removing an insulating layer above the source electrode layer and the drain electrode layer;   wherein the gate electrode layer, the source electrode layer and the drain electrode layer are electrically connected via the first aperture and the second aperture by an electrically conductive material layer composed of the same material as said pixel electrode.   
     
     
       33. A method of manufacturing a thin film element, comprising the steps of:
 (A) forming a gate electrode layer and a gate electrode material layer, which is formed of substantially the same material as said gate electrode layer;   (B) forming a gate insulation film, a channel layer and an ohmic contact layer above said gate electrode layer and said gate electrode material layer;   (C) forming a source electrode layer and a drain electrode layer that are connected to said ohmic contact layer;   (D) removing said ohmic contact layer from a region between said source electrode layer and said drain electrode layer by etching;   (E) forming a protective film for covering said source electrode layer, said drain electrode layer and said gate electrode material layer, the protective film being in contact with the channel layer in at least a region between said source electrode layer and said drain electrode layer;   (F) forming a first aperture wherein a part of said gate insulation film and said protective film above said gate electrode material layer is selectively etched for exposing a portion of a surface of said gate electrode material layer, and substantially simultaneously, forming a second aperture wherein a part of  the protective film on said source electrode layer and said drain electrode layer is selectively etched for exposing a portion of a surface of at least one of said source electrode layer and said drain electrode layer; and   (G) forming an electrically conductive material layer on at least one of said first aperture and said second aperture.

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