Phase locked loop, transceiver device and method for generating an oscillator signal

Abstract

A phase locked loop has a controlled oscillator for outputting an oscillator signal depending on a control signal. A comparator generates a comparison result from a comparison between a reference frequency signal and a feedback signal derived from the oscillator signal. The phase locked loop also has a filter block for filtering the comparison result and for deriving the control signal from the comparison result, where the filter block has a loop filter and a rejection filter for the frequency-selective attenuation of at least one first interference frequency in the comparison result.

The invention claimed is: 
     
       1. A phase locked loop, comprising:
 a digital controlled oscillator configured to generate an oscillator signal, and having an oscillator input and an oscillator output; 
 a comparator, having a comparator first input coupled to a reference input, a comparator second input coupled to the oscillator output, and a comparator output; wherein the comparator is configured to generate an unwanted periodic pattern as a function of the oscillator signal, where the unwanted periodic pattern includes at least a first interference frequency; and 
 a filter block having a filter block input coupled to the comparator output and having a filter block output coupled to the oscillator input, the filter block comprising a loop filter and a rejection filter, wherein the rejection filter comprises a notch filter comprising an at least second-order recursive filter having one or more filter coefficients for rejecting at least the first interference frequency, 
 wherein the notch filter comprises a plurality of at least second-order recursive filters connected in series which have one or more filter coefficients for rejecting the first interference frequency and further interference frequencies. 
 
     
     
       2. The phase locked loop of  claim 1 , wherein the notch filter comprises a cascaded integrator comb filter. 
     
     
       3. The phase locked loop of  claim 1 , wherein the filter block output is coupled to the oscillator input via a sigma-delta modulator. 
     
     
       4. The phase locked loop of  claim 1 , wherein the oscillator output is coupled to the comparator second input via a frequency divider. 
     
     
       5. A phase locked loop, comprising:
 a digital controlled oscillator configured to output an oscillator signal based on a control signal; 
 a comparator operable to generate a comparison result from a comparison between a reference frequency signal and a feedback signal derived from the oscillator signal, the comparison result including an unwanted periodic pattern having at least a first interference frequency; and 
 a filter block configured to filter the comparison result and configured to derive the control signal from the comparison result, the filter block comprising a loop filter and a notch filter for the frequency-selective attenuation of at least the first interference frequency in the comparison result, the notch filter comprising an at least second-order recursive filter which has one or more filter coefficients for the frequency-selective attenuation of the first interference frequency, 
 wherein the notch filter further comprises a plurality of at least second-order recursive filters connected in series having one or more filter coefficients for the frequency-selective attenuation of the first interference frequency and further interference frequencies. 
 
     
     
       6. The phase locked loop of  claim 5 , wherein the notch filter further comprises a cascaded integrator comb filter. 
     
     
       7. The phase locked loop of  claim 5 , further comprising a sigma-delta modulator configured to derive the control signal from the filtered comparison result. 
     
     
       8. The phase locked loop of  claim 5 , further comprising a frequency divider configured to derive the feedback signal from the oscillator signal. 
     
     
       9. A method for generating an oscillator signal, comprising:
 generating the oscillator signal depending on a control signal;   deriving a feedback signal from the oscillator signal;   generating a comparison result by comparing the feedback signal with a reference frequency signal;   filtering the comparison result, wherein the filtering involves low-pass filtering and rejection of at least a first interference frequency in the comparison result, and wherein the rejection comprises notch filtering using a plurality of at least second-order recursive filters connected in series that have one or more filter coefficients to reject the first interference frequency; and   adapting the control signal depending on the filtered comparison result.   
     
     
       10. The method of claim 9, wherein the rejection further comprises comb filtering. 
     
     
       11. The method of claim 9, wherein adapting the control signal further comprises performing a sigma-delta modulation of the filtered comparison result. 
     
     
       12. The method of claim 9, wherein deriving the feedback signal comprises frequency division of the oscillator signal. 
     
     
       13. The method of claim 9, wherein the comparison result is generated as a digital signal, and the filtering is effected digitally.