Method of verifying programming of a nonvolatile memory device

Abstract

A first verify voltage is applied to a word line of a selected memory cell, after a bit line is precharged, to program-verify the memory cell in a nonvolatile memory device. A first read evaluation operation for changing a voltage of the bit line is performed. Results of the first read evaluation operation are sensed using a first sensing voltage. A second read evaluation operation for changing the voltage of the bit line is performed again. Results of the second read verify operation are then sensed using the first sensing voltage.

What is claimed is: 
     
       1. A method of verifying programming of a selected memory cell of a nonvolatile memory device, the method comprising:
 precharging a bit line; 
 a first sensing step of applying a first verify voltage to a word line of the selected memory cell, performing a first read evaluation operation for changing a voltage of the bit line, and sensing results of the first read evaluation operation using a first sensing voltage; and 
 a second sensing step of, after the first sensing step, performing a second read evaluation operation for changing the a voltage of the bit line, and sensing results of the second read evaluation operation using the first a second sensing voltage. 
 
     
     
       2. The method of  claim 1 , wherein a pass voltage is applied to the remaining word lines other than the word line of the selected memory cell. 
     
     
       3. The method of  claim 1 , wherein in the second read evaluation operation, the first verify voltage is applied to the word line of the selected memory cell. 
     
     
       4. The method of  claim 1 , further comprising:
 setting a step voltage of a program voltage to a first step voltage with respect to memory cells which are sensed as program fail in the first sensing step. 
 
     
     
       5. The method of  claim 1 , further comprising:
 setting a step voltage of a program voltage to a second step voltage with respect to memory cells which are sensed as program pass in the first sensing step and sensed as program fail in the second sensing step. 
 
     
     
       6. The method of  claim 1 , further comprising:
 setting a step voltage of a program voltage to a first step voltage with respect to memory cells which are sensed as program fail in the first sensing step, wherein the first step voltage is higher than a current program step voltage, and 
 setting a step voltage of a program voltage to a second step voltage with respect to memory cells which are sensed as program pass in the first sensing step and sensed as program fail in the second sensing step, wherein the second step voltage is lower than the current program step voltage. 
 
     
     
       7. A method of verifying programming of a selected memory cell of a nonvolatile memory device, the method comprising:
 precharging a bit line; 
 applying a first verify voltage to a word line of the selected memory cell and performing a read evaluation operation for changing a voltage of the bit line; and 
 sensing results of the read evaluation operation using a first sensing voltage and a second sensing voltage. 
 
     
     
       8. The method of  claim 7 , further comprising:
 applying a pass voltage to the remaining word lines other than the word line of the selected memory cell. 
 
     
     
       9. The method of  claim 7 , further comprising:
 setting a step voltage of a program voltage to a first step voltage with respect to memory cells which are sensed as program fail as a result of the sensing using the first sensing voltage. 
 
     
     
       10. The method of  claim 7 , further comprising:
 setting a step voltage of a program voltage to a second step voltage with respect to memory cells which are sensed as program pass as a result of the sensing using the first sensing voltage and sensed as program fail as a result of the sensing using the second sensing voltage. 
 
     
     
       11. The method of  claim 7 , further comprising:
 setting a step voltage of a program voltage to a first step voltage with respect to memory cells which are sensed as program fail as a result of the sensing using the first sensing voltage, wherein the first step voltage is higher than a current program step voltage, and 
 setting a step voltage of a program voltage to a second step voltage with respect to memory cells which are sensed as program pass as a result of the sensing using the first sensing voltage and sensed as program fail as a result of the sensing using the second sensing voltage, wherein the second step voltage is lower than the current program step voltage. 
 
     
     
       12. The method of  claim 7 , wherein the sensing of the results of the read evaluation operation using the first and second sensing voltages comprises:
 a first sensing step of sensing the results of the read evaluation operation using the first sensing voltage; and 
 a second sensing step of performing a second read evaluation operation for changing the voltage of the bit line, and sensing results of the second read evaluation operation using the second sensing voltage. 
 
     
     
       13. A method of verifying programming of a nonvolatile memory device, the method comprising:
 precharging a bit line; 
 applying a first verify voltage to a word line of a selected memory cell; 
 performing a first read evaluation operation for changing a voltage of the bit line; 
 first sensing results of the first read evaluation operation using a first sensing voltage; 
 performing a second read evaluation operation for changing the a voltage of the bit line; and 
 second sensing results of the second read evaluation operation using the first a second sensing voltage. 
 
     
     
       14. The method of  claim 13 , further comprising:
 applying a pass voltage to the remaining word lines other than the word line of the selected memory cell. 
 
     
     
       15. The method of  claim 13 , wherein in the second read evaluation operation, the first verify voltage is applied to the word line of the selected memory cell. 
     
     
       16. The method of  claim 13 , further comprising:
 setting a step voltage of a program voltage to a first step voltage with respect to memory cells which are sensed as program fail in the first sensing step. 
 
     
     
       17. The method of  claim 13 , further comprising:
 setting a step voltage of a program voltage to a second step voltage with respect to memory cells which are sensed as program pass in the first sensing step and sensed as program fail in the second sensing step. 
 
     
     
       18. The method of  claim 13 , further comprising:
 setting a step voltage of a program voltage to a first step voltage with respect to memory cells which are sensed as program fail in the first sensing step, wherein the first step voltage is higher than a current program step voltage, and 
 setting a step voltage of a program voltage to a second step voltage with respect to memory cells which are sensed as program pass in the first sensing step and sensed as program fail in the second sensing step, wherein the second step voltage is lower than the current program step voltage. 
 
     
     
       19. A method of claim 1, wherein a level of the second sensing voltage is equal to a level of the first sensing voltage.  
     
     
       20. A method of claim 1, wherein a level of the second sensing voltage is different from a level of the first sensing voltage.  
     
     
       21. A method of claim 7, wherein the sensing comprises:
 first sensing results of the read evaluation operation using the first sensing voltage; and   second sensing results of the read evaluation operation using the second sensing voltage,   wherein the first sensing voltage and the second sensing voltage are different voltages.    
     
     
       22. The method of claim 7, wherein sensing results of the read evaluation operation using a first sensing voltage and a second sensing voltage comprises sensing results of the read evaluation operation using the first sensing voltage and followed by the second sensing voltage.  
     
     
       23. A method of claim 13, wherein a level of the second sensing voltage is equal to a level of the first sensing voltage.  
     
     
       24. A method of claim 13, wherein a level of the second sensing voltage is different from a level of the first sensing voltage.  
     
     
       25. A method of operating a nonvolatile memory device, the method comprising:
 performing a first verify operation comprising:
 precharging a bit line coupled to a selected memory cell; 
 performing an evaluation operation on the bit line; and 
 sensing a result of the evaluation operation; and 
   performing a second verify operation without resetting and precharging the bit lines.    
     
     
       26. The method of claim 25, wherein performing an evaluation operation comprises performing a read evaluation operation on the bit line to change a voltage of the bit line.  
     
     
       27. The method of claim 26, wherein a result of the first evaluation operation is sensed using a first sensing voltage.  
     
     
       28. The method of claim 27, wherein performing a second verify operation comprises sensing the result of the first evaluation operation using a second sensing voltage, and the first sensing voltage and the second sensing voltage have different levels.  
     
     
       29. The method of claim 25, wherein performing a second verify operation comprises:
 performing a second evaluation operation to change a voltage of the bit line; and   sensing a result of the second evaluation operation.    
     
     
       30. The method of claim 29, wherein the result of the first evaluation operation and the result of the second evaluation operation are sensed using a same sensing voltage.  
     
     
       31. The method of claim 29, wherein the result of the first evaluation operation and the result of the second evaluation operation are sensed using different sensing voltages.  
     
     
       32. The method of claim 25, wherein setting a step voltage of a program voltage for the selected memory cell further comprises setting a first step voltage of the program voltage for the selected memory cell when the selected memory cell is sensed as program fail in the first verification operation.  
     
     
       33. The method of claim 32, wherein the first step voltage is higher than a current step voltage.  
     
     
       34. The method of claim 25, wherein setting a step voltage of a program voltage for the selected memory cell further comprises setting a second step voltage of the program voltage for the selected memory cell when the selected memory cell is sensed as program pass in the first verification operation but program fail in the second verification operation.  
     
     
       35. The method of claim 34, wherein the second step voltage is lower than a current step voltage.