Semiconductor structure and method of manufacture

Abstract

In various embodiments, semiconductor structures and methods to manufacture these structures are disclosed. In one embodiment, a method to manufacture a semiconductor structure includes forming a cavity in a substrate. A portion of the substrate is doped, or a doped material is deposited over a portion of the substrate. At least a portion of the doped substrate or at least a portion of the doped material is converted to a dielectric material to enclose the cavity. The forming of the cavity may occur before or after the doping of the substrate or the depositing of the doped material. Other embodiments are described and claimed.

What is claimed is: 
     
       1. A method, comprising:
 forming a cavity in a substrate to expose at least a portion of the substrate in the cavity; 
 directly doping the exposed portion of the substrate to render a doped region of substrate in the cavity; 
 etching at least one or more trenches in the cavity in the doped region of the substrate; and 
 converting at least a portion of the doped region of the substrate to a dielectric material to seal at least one or more of the trenches in the cavity. 
 
     
     
       2. The method of  claim 1 , wherein the forming of the cavity in the substrate occurs subsequent to the doping of the portion of the substrate. 
     
     
       3. The method of  claim 1 , wherein the doping of the portion of the substrate occurs after the forming of the cavity in the substrate. 
     
     
       4. The method of  claim 1 , wherein the cavity extends from a first surface of the substrate to a distance of at least about one micron or greater towards a second surface of the substrate, wherein the second surface is parallel to, or substantially parallel to, the first surface and further comprising forming an electrically conductive material over the dielectric material. 
     
     
       5. The method of  claim 4 , further comprising forming at least a portion of an active device in the substrate adjacent to the cavity, wherein the active device is electrically coupled to the electrically conductive material. 
     
     
       6. The method of  claim 4 , wherein the dielectric material comprises oxide, the substrate comprises silicon, and the electrically conductive material comprises aluminum, copper, doped polycrystalline silicon, gold, nickel, or permalloy, or combinations thereof. 
     
     
       7. The method of  claim 1 , further comprising forming a non-conformal material over the dielectric material. 
     
     
       8. The method of  claim 7 , further comprising forming a conformal material over the non-conformal material to hermetically seal the cavity, wherein the forming of the non-conformal material comprises deposing the non-conformal material using a chemical vapor deposition (CVD) process. 
     
     
       9. The method of  claim 1 , further comprising:
 forming a first dielectric layer over the substrate; 
 forming a second dielectric layer over the first dielectric layer; 
 said forming a cavity comprising forming an opening in the first and second dielectric layers, wherein a width of the opening is about 25 microns or greater, a width of the cavity ranges from about 0.5 microns to about 2 microns, and a depth of the cavity is about ten microns or greater. 
 
     
     
       10. The method of  claim 1 , wherein a depth of the cavity is at least about two times (2×) greater than a width of the cavity. 
     
     
       11. The method of  claim 1 , wherein a depth of the cavity is at least about ten times (10×) greater than a width of the cavity. 
     
     
       12. The method of  claim 1 , wherein the substrate comprises silicon and the dielectric material is silicon dioxide and the converting comprises forming the silicon dioxide by performing a thermal oxidation process to convert at least a portion of the silicon substrate to the silicon dioxide. 
     
     
       13. A dielectric platform comprising:
 a silicon substrate including:
 a cavity; 
 a bottom surface; and 
 a top surface; 
 wherein the bottom surface is parallel to or substantially parallel to the top surface; 
   a plurality of dielectric structures formed in the substrate; and   a capping or sealing structure formed over the cavity, wherein the capping or sealing structure includes a doped portion of the silicon substrate that has been converted to a dielectric material.    
     
     
       14. The dielectric platform of claim 13, wherein the plurality of dielectric structures comprise silicon dioxide.  
     
     
       15. The dielectric platform of claim 13, wherein a depth of the cavity is at least two times greater than a width of the cavity.  
     
     
       16. The dielectric platform of claim 13, wherein a depth of the cavity is at least ten times greater than a width of the cavity.  
     
     
       17. The dielectric platform of claim 13, further comprising a passive component on the top surface of the substrate.  
     
     
       18. The dielectric platform of claim 17, wherein the passive component comprises an electrically-conductive material.  
     
     
       19. The dielectric platform of claim 18, wherein the substrate further comprises an active device adjacent to the sealed cavity.  
     
     
       20. The dielectric platform of claim 19, wherein the active device is electrically coupled to the electrically-conductive material.  
     
     
       21. The dielectric platform of claim 18, wherein the electrically-conductive material comprises aluminum, copper, doped polycrystalline silicon, gold, nickel, or permalloy.  
     
     
       22. The dielectric platform of claim 13, wherein the substrate further comprises a first dielectric layer on the top surface of the substrate.  
     
     
       23. The dielectric platform of claim 22, wherein the substrate further comprises a second dielectric layer on the first dielectric layer.  
     
     
       24. The dielectric platform of claim 13, further comprising a non-conformal material between the substrate and the capping or sealing structure.  
     
     
       25. The dielectric platform of claim 24, wherein the capping or sealing structure comprises a conformal material disposed over the non-conformal material, and wherein the conformal material is configured to hermetically seal the cavity.  
     
     
       26. The dielectric platform of claim 13, wherein the capping or sealing structure comprises silicon nitride or silicon dioxide.  
     
     
       27. The dielectric platform of claim 13, wherein a width of the cavity is about 0.5 microns to about 2 microns, and wherein a depth of the cavity is about ten microns or greater.