Phase-change nonvolatile memory and manufacturing method therefor

Abstract

A phase-change nonvolatile memory (PRAM) is constituted of a semiconductor substrate, a lower electrode, a first interlayer insulating film having a first hole, an impurity diffusion layer embedded in the first hole, a second interlayer insulating film having a second hole whose diameter is smaller than the diameter of the first hole, a phase-change recording layer, and an upper electrode. The impurity diffusion layer is constituted of two semiconductor layers having different conductivity types, wherein one semiconductor layer is constituted of a base portion and a projecting portion having a heating spot in contact with the phase-change recording layer, while the other semiconductor layer is formed to surround the projecting portion. A depletion layer is formed in proximity to the junction surface so as to reduce the diameter of the heating spot, thus reducing the current value Ireset for writing data in to the phase-change recording layer.

What is claimed is: 
     
       1. A phase-change nonvolatile memory comprising:
 a semiconductor substrate; 
 a lower electrode formed on the semiconductor substrate; 
 a first interlayer insulating film which is formed to cover the lower electrode and the semiconductor substrate, wherein a first hole is formed in the first insulating film so as to expose the lower electrode; 
 an impurity diffusion layer embedded in the first hole, wherein the impurity diffusion layer is constituted of a first semiconductor layer and a second semiconductor layer which have different conductivity types; 
 a second interlayer insulating film which is formed to cover the first interlayer insulating film and the impurity diffusion layer, wherein a second hole is formed in the second interlayer insulating film so as to expose the impurity diffusion layer; 
 a phase-change recording layer which is formed to cover the second interlayer insulating film and to embed the second hole; and 
 an upper electrode formed on the phase-change recording layer, 
 wherein the first semiconductor layer is constituted of a base portion which is formed inside the first hole so as to cover the lower electrode and a projecting portion which projects from the base portion so that a heating spot thereof comes in contact with the phase-change recording layer in the second hole, while the second semiconductor layer is formed to at least partially surround the projecting portion, 
 wherein a depletion layer is formed in proximity to a junction surface formed between the first semiconductor layer and the second semiconductor layer so as to reduce a diameter of the heating spot, and 
 wherein the heating spot heats the phase-change recording layer in response to a current flowing between the impurity diffusion layer and the phase-change recording layer. 
 
     
     
       2. The phase-change nonvolatile memory according to  claim 1 , wherein the second hole is positioned inside the first hole in plan view. 
     
     
       3. The phase-change nonvolatile memory according to  claim 1 , wherein a side wall is formed on an interior surface of the second hole. 
     
     
       4. A phase-change nonvolatile memory comprising:
 a lower electrode: 
 a semiconductor layer disposed on the lower electrode; 
 a phase-change recording layer disposed on the semiconductor layer; and 
 an upper electrode disposed on the phase-change recording layer, 
 wherein the semiconductor layer comprises a first impurity diffusion layer and a second impurity diffusion layer having different conductivity types from each other, 
 and a heating current for the phase-change recording layer is controlled by a width of a depletion layer formed at a PN junction surface of the first impurity diffusion layer and the second impurity diffusion layer. 
 
     
     
       5. The phase-change nonvolatile memory according to  claim 4 , wherein a part of the first impurity diffusion layer is at least partially surrounded by the second impurity diffusion layer, and the phase-change recording layer is in contact with a surface of the part of the first impurity diffusion layer. 
     
     
       6. The phase-change nonvolatile memory according to  claim 5  further comprising a first insulating film, wherein the semiconductor layer is formed in a first hole located in the first insulating film. 
     
     
       7. The phase-change nonvolatile memory according to  claim 6  further comprising a second insulating film disposed on the first insulating film, wherein the phase-change recording layer is formed in a second hole located in the second insulating film, and the second hole is positioned inside the first hole in plan view. 
     
     
       8. The phase-change nonvolatile memory according to  claim 4 , wherein a thermal conductivity of the lower electrode is higher than a thermal conductivity of the upper electrode. 
     
     
       9. The phase-change nonvolatile memory according to  claim 4 , wherein the semiconductor layer comprises a silicon layer, and the phase-change recording layer comprises a chalcogenide layer. 
     
     
       10. A phase-change nonvolatile memory comprising:
 a lower electrode; 
 a first impurity diffusion layer of a first conductivity type, the first impurity diffusion layer including a base portion on the lower electrode and a projecting portion projected from a first top surface portion of the base portion; 
 a second impurity diffusion layer of a second conductivity type formed on a second top surface portion of the base portion and a side surface of the projecting portion, the first conductivity type being different from the second conductivity type; and 
 a phase-change recording layer formed on a top surface of the projecting portion. 
 
     
     
       11. The phase-change nonvolatile memory according to  claim 10 , wherein a first hole is formed in the second impurity diffusion layer so as to expose the lower electrode and a second hole is formed above the first hole to expose the projecting portion, and
 wherein the second hole is positioned inside the first hole in plan view. 
 
     
     
       12. The phase-change nonvolatile memory according to  claim 10 , wherein a first hole is formed in the second impurity diffusion layer so as to expose the lower electrode and a second hole is formed above the first hole to expose the projecting portion, and
 wherein a part of an interior surface of the second hole contacts with an interior surface of the first hole. 
 
     
     
       13. The phase-change nonvolatile memory according to  claim 10 , wherein a first hole is formed in the second impurity diffusion layer so as to expose the lower electrode and a second hole is formed above the first hole to expose the projecting portion, and
 wherein the second hole is positioned on one side of the first hole in plan view. 
 
     
     
       14. The phase-change nonvolatile memory according to  claim 10 , wherein a first hole is formed in the second impurity diffusion layer so as to expose the lower electrode and a second hole is formed above the first hole to expose the projecting portion, and
 wherein the second hole has an elliptic shape. 
 
     
     
       15. The phase-change nonvolatile memory according to  claim 10 , wherein a first hole is formed in the second impurity diffusion layer so as to expose the lower electrode and a second hole is formed above the first hole to expose the projecting portion, and
 wherein, in a plan view, a position of the second hole matches a circumferential periphery of the first hole. 
 
     
     
       16. The phase-change nonvolatile memory according to  claim 10 , wherein a first hole is formed in the second impurity diffusion layer so as to expose the lower electrode and a second hole is formed above the first hole to expose the projecting portion, and
 wherein a side wall is formed on an interior surface of the second hole. 
 
     
     
       17. The phase-change nonvolatile memory according to  claim 16 , wherein a third hole is formed by the side wall such that the third hole has a diameter associated which increases in a direction toward said phase-change recording layer. 
     
     
       18. The phase-change nonvolatile memory according to  claim 17 , wherein a diameter of the third hole is smaller than a diameter of the second hole. 
     
     
       19. A phase-change nonvolatile memory comprising:
 a lower electrode;   a semiconductor layer disposed on the lower electrode;   a phase-change recording layer disposed on the semiconductor layer; and   an upper electrode disposed on the phase-change recording layer,   wherein the semiconductor layer comprises a first impurity diffusion layer and a second impurity diffusion layer having different conductivity types from each other, and   a heating current for the phase-change recording layer is controlled by a PN junction formed by the first impurity diffusion layer and the second impurity diffusion layer,   wherein the first impurity layer comprises a base portion and a projecting portion which projects from the base portion, while the second impurity diffusion layer is formed to at least partially surround the projecting portion.