Reduced crosstalk sensor and method of formation

Abstract

Isolation methods and devices for isolating regions of a semiconductor device are disclosed. The isolation methods and structures include forming an isolating trench among pixels or other active areas of a semiconductor device. The trench extends through the substrate to the base layer, wherein a liner may be deposited on the side walls of the trench. A conductive material is deposited into the trench to block electrons from passing through.

The invention claimed is: 
     
       1. An image sensor comprising:
 a substrate formed over a base layer; 
 a plurality of pixel cells formed within said substrate, each pixel cell comprising a photo-conversion device having a charge collection region of a second conductivity type for accumulating photo-generated charge formed in said substrate below a first layer of a first conductivity type; and 
 a plurality of trenches, each trench being provided along a perimeter of a respective pixel cell, each trench extending at least to a surface of the base layer and below a lower level of said photo-conversion device, each trench having sidewalls, and being at least partially filled with a conductive material that inhibits electrons from passing through said trench, 
 wherein each of said plurality of trenches prevents diffusion of photo-generated charge generated by said photo-conversion device in one pixel cell to an adjacent pixel cell, and 
 wherein the conductive material is sufficiently biased to form one of a hole rich or electron rich accumulation layer along the sidewalls of the trench. 
 
     
     
       2. The sensor of  claim 1 , further comprising a dielectric material formed along at least a portion of said sidewalls. 
     
     
       3. The sensor of  claim 2 , wherein the dielectric material is an oxide. 
     
     
       4. The sensor of  claim 2 , wherein the dielectric material is formed on the sidewalls of the trench but not on a bottom of the trench. 
     
     
       5. The sensor of  claim 2 , wherein the dielectric material comprises at least two materials having different indices of refraction. 
     
     
       6. The sensor of  claim 2 , wherein said dielectric material is substantially conformal such that thickness of said dielectric material is substantially same along said sidewalls and a bottom of said trench. 
     
     
       7. The sensor of  claim 6 , wherein thickness of said dielectric material along said sidewalls is greater than about 100 Angstroms. 
     
     
       8. The sensor of  claim 1 , wherein said material is a conductive material. 
     
     
       9. The sensor of claim  8  1, wherein said conductive material comprises one of doped polysilicon, undoped polysilicon and boron-doped carbon. 
     
     
       10. The sensor of  claim 1 , wherein said trench has a depth greater than about 2000 Angstroms. 
     
     
       11. The sensor of  claim 10 , wherein said trench has a depth in the range of about 4000 to about 5000 Angstroms. 
     
     
       12. The sensor of  claim 1 , wherein the sensor comprises a CMOS image sensor. 
     
     
       13. The sensor of  claim 1 , wherein the sensor comprises a CCD image sensor. 
     
     
       14. The sensor of  claim 1 , wherein the pixel cells are red pixel cells of a Bayer pattern. 
     
     
       15. The sensor of  claim 1 , further comprising a contact adjacent at least one of the plurality of trenches, for biasing the conductive material within the trench positive or negative. 
     
     
       16. The sensor of  claim 1 , wherein the base layer is an epitaxial layer. 
     
     
       17. A structure for isolating an active area on a semiconductor device, said structure comprising:
 a photo-conversion device comprising a doped charge collection region of a second conductivity type for accumulating charge formed in said active area below a first region of a first conductivity type; 
 a trench formed in a substrate along at least a portion of a periphery of said active area in said semiconductor device, wherein said trench has sidewalls and a bottom, and wherein said bottom of said trench extends at least only to a surface of a base layer below said substrate which is below a lower level of said photo-conversion device, and wherein said trench has sidewalls; 
 a dielectric liner formed along said sidewalls; and 
 a conductive material formed over said dielectric liner that at least partially fills said trench and inhibits electrons from passing through said trench, 
 wherein said trench prevents diffusion of electrons from said doped charge collection region into a region outside said active area, and 
 wherein the conductive material is sufficiently biased to form one of a hole rich or electron rich accumulation layer along the sidewalls of the trench. 
 
     
     
       18. The structure of  claim 17 , wherein the dielectric liner comprises an oxide material. 
     
     
       19. The structure of  claim 17 , wherein the dielectric liner is one of high-density plasma oxide and spin-on dielectric oxide. 
     
     
       20. The structure of  claim 17 , wherein the dielectric liner is formed of a material selected from the group consisting of silicon dioxide, aluminum oxide, undoped polysilicon, silicon nitride, PE-oxide and FSG-oxide. 
     
     
       21. The structure of  claim 17 , wherein the dielectric liner is formed of at least two materials having different indices of refraction. 
     
     
       22. The structure of  claim 17 , wherein the dielectric liner is formed of PE-oxide and FSG-oxide. 
     
     
       23. The structure of  claim 17 , wherein the material is a conductive material. 
     
     
       24. The structure of claim  23  17, wherein the conductive material comprises one of doped polysilicon, undoped polysilicon and boron-doped carbon. 
     
     
       25. The structure of  claim 17 , wherein the trench has a depth greater than about 2000 Angstroms. 
     
     
       26. The structure of  claim 25 , wherein the trench has a depth in the range of about 4000 to about 5000 Angstroms. 
     
     
       27. The structure of  claim 17 , wherein the semiconductor device comprises one of a CMOS image sensor or a CCD image sensor. 
     
     
       28. The structure of  claim 17 , further comprising a contact adjacent the trench, for biasing the material within the trench positive or negative. 
     
     
       29. A processing system, said processing system comprising:
 a processor; 
 a semiconductor device; 
 a trench formed in a substrate along at least a portion of a periphery of said active area in said semiconductor device, the active area having a photo-conversion device comprising a charge collection region of n-type conductivity for accumulating charge and located below a p-type region of said active area, wherein said trench extends at least only to a surface of a base layer below said substrate and to a level below a lower level of said photo-conversion device, and wherein said trench has sidewalls and inhibits diffusion of charge outside said active area; 
 a dielectric liner formed along said sidewalls; and 
 a material formed over said insulating liner that at least partially fills said trench, the material being sufficiently biased to form one of a hole rich or electron rich accumulation layer along the sidewalls of the trench. 
 
     
     
       30. The processing system of  claim 29 , wherein the dielectric liner is an oxide material. 
     
     
       31. The processing system of  claim 29 , wherein the dielectric liner is one of high-density plasma oxide and spin-on dielectric oxide. 
     
     
       32. The processing system of  claim 29 , wherein the conductive material comprises one of doped polysilicon, undoped polysilicon and boron-doped carbon. 
     
     
       33. The processing system of  claim 29 , wherein the trench has a depth greater than about 2000 Angstroms. 
     
     
       34. The processing system of  claim 33 , wherein the trench has a depth in the range of about 4000 to about 5000 Angstroms. 
     
     
       35. The processing system of  claim 29 , wherein the semiconductor device comprises a CMOS image sensor. 
     
     
       36. The processing system of  claim 29 , wherein the semiconductor device comprises a CCD image sensor. 
     
     
       37. The processing system of  claim 29 , wherein the dielectric liner comprises at least two materials having different indices of refraction. 
     
     
       38. The processing system of  claim 29 , wherein the dielectric liner comprises PE-oxide and FSG-oxide. 
     
     
       39. The processing system of  claim 29 , wherein the dielectric liner is provided along the sidewalls of the trench but not on a bottom of the trench. 
     
     
       40. An image sensor comprising:
 a pixel array, the pixel array including a plurality of pixels arranged in columns and rows, each pixel comprising a respective photodiode disposed in a semiconductor substrate and having an n-type charge collection region for accumulating charge carriers generated by photons incident on the photodiode; and   a trench disposed in the semiconductor substrate and extending to a surface of a p-type underlying layer below a lower level of at least one photodiode, the trench having sidewalls and being at least partially filled with at least one material having a refractive index that is different from a refractive index of an adjacent material to provide photon isolation using differences in refractive indices,   wherein the at least one material is sufficiently biased to form one of a hole rich or electron rich accumulation layer along the sidewalls of the trench.    
     
     
       41. The image sensor of claim 40, wherein each said trench is filled with two materials.  
     
     
       42. The image sensor of claim 41, wherein said two materials have different indices of refraction.  
     
     
       43. The image sensor of claim 41, wherein a first of said two materials is a liner for lining the sidewalls.  
     
     
       44. The image sensor of claim 41, wherein the first of said two materials is the adjacent material.  
     
     
       45. The image sensor of claim 40, wherein the photodiode comprises a pinning layer.  
     
     
       46. An image sensor comprising:
 a pixel array, the pixel array comprising a plurality of pixels arranged in columns and rows, each pixel comprising a respective photodiode disposed in a semiconductor substrate and having an n-type charge collection region for accumulating charge carriers generated by photons incident on the photodiode; and   at least one trench disposed in the semiconductor substrate, having sidewalls, extending to a surface of a p-type underlying layer below a lower level of the photodiode and being filled with a material for providing photon isolation between pixels using differences in refractive indices,   wherein the material is sufficiently biased to form one of a hole rich or electron rich accumulation layer along the sidewalls of the trench.    
     
     
       47. The image sensor of claim 46, wherein the material comprises two different materials.  
     
     
       48. The image sensor of claim 47, wherein the two materials have different indices of refraction.  
     
     
       49. The imager sensor of claim 47, wherein the adjacent material is disposed to line the sidewalls.  
     
     
       50. The image sensor of claim 47, wherein the photodiode comprises a pinning layer.  
     
     
       51. A processing system comprising:
 a processor;   a random access memory;   a flash memory;   a communication path between at least the processor and the random access memory and flash memory; and   an image sensor for receiving an image, generating an electrical representation of the image, and providing the electrical representation of the image to the communication path, the image sensor comprising:
 a pixel array, the pixel array comprising a plurality of pixels arranged in columns and rows, each pixel comprising a respective photodiode disposed in a semiconductor substrate and having an n-type charge collection region for accumulating charge carriers generated by photons incident on the photodiode; and 
 a trench disposed in the semiconductor substrate and extending to a surface of a p-type underlying layer below a lower level of at least one photodiode, the trench having sidewalls and being at least partially filled with at least one material having a refractive index that is different from a refractive index of an adjacent material to provide photon isolation using differences in refractive indices, 
 wherein the at least one material is sufficiently biased to form one of a hole rich or electron rich accumulation layer along the sidewalls of the trench.  
   
     
     
       52. The processing system of claim 51, wherein said processing system is a part of a camera.  
     
     
       53. The processing system of claim 51, wherein said processing system is a part of a cellular telephone.  
     
     
       54. An image sensor comprising:
 a pixel array, the pixel array including a plurality of pixels arranged in columns and rows, each pixel comprising a respective photodiode disposed in a semiconductor substrate and having an n-type charge collection region for accumulating charge carriers generated by photons incident on the photodiode; and   a trench disposed in the semiconductor substrate and extending only to a surface of an underlying layer below a lower level of at least one photodiode without contacting the n-type charge collection region, the trench having sidewalls and being at least partially filled with at least one material having a refractive index that is different from a refractive index of an adjacent material to provide photon isolation using differences in refractive indices,   wherein the at least one material is sufficiently biased to form one of a hole rich or electron rich accumulation layer along the sidewalls of the trench.    
     
     
       55. An image sensor comprising:
 a pixel array, the pixel array including a plurality of pixels arranged in columns and rows, each pixel comprising a respective photodiode disposed in a semiconductor substrate and having an n-type charge collection region arranged in a p-type region, the n-type region for accumulating charge carriers generated by photons incident on the photodiode; and   a trench disposed in the semiconductor substrate and extending through only the p-type region to a surface of an underlying layer below a lower level of at least one photodiode, the trench having sidewalls and being at least partially filled with at least one material having a refractive index that is different from a refractive index of an adjacent material to provide photon isolation using differences in refractive indices,   wherein the at least one material is sufficiently biased to form one of a hole rich or electron rich accumulation layer along the sidewalls of the trench.