Inrush current controller

Abstract

An inrush current controller for a device has a connector for hot-plugging the device into a source of energization. An impedance has a current input coupled to a first contact of the connector and a current output coupled to the device. The impedance has an impedance control input. An impedance control circuit has a logic input coupling to a second contact of the connector. The impedance control circuit has an impedance control output connected to the impedance control input. The impedance control output forces the impedance OFF during a first time interval after hot-plugging. The logic input triggers a limited inrush at the current input after the first time interval.

What is claimed is: 
     
       1. A controller for a device, the controller comprising:
 a connector for plugging the device into a source of energization and unplugging the device from the source of energization, wherein the connector comprises:
 a first contact for connecting to a first power supply contact of the source; 
 a second contact for connecting to a logic output from the source; and 
 a third contact for connecting to a second power supply contact of the source; 
 
 an impedance having a current input that couples to the first contact of the connector, an impedance control input, and a current output coupling to the device; and 
 an impedance control circuit comprising:
 a first timer; 
 a logic input coupling to the second contact of the connector; and 
 an impedance control output connected to the impedance control input, the impedance control output forcing the impedance OFF during a first time interval controlled by the first timer which is triggered by, and starts timing in response to, the device being plugged into the source of energization, and the logic output from the source enabling a limited inrush at the current input during a second time interval controlled by a second timer. 
 
 
     
     
       2. The controller of  claim 1  wherein the device comprises a data storage device and the source of energization comprises a host computer system. 
     
     
       3. The controller of  claim 1  wherein the impedance is variable as a function of the control input. 
     
     
       4. The controller of  claim 1  further comprising:
 the first timer coupled to the current input and the impedance control output, the first timer comprising a first timer output that forces the impedance OFF during the first time interval; and 
 a current limit circuit coupled to the logic input and the impedance control output, the current limit circuit comprising a current limit output coupled to the impedance control output and controlled by the second timer. 
 
     
     
       5. The controller of  claim 4  wherein the first timer output overrides the current limit output to the impedance control output during the first time interval such that the impedance control output forces the impedance OFF independent of the current limit output of the current limit circuit. 
     
     
       6. The controller of  claim 5  wherein the first timer output is an open circuit during the second time interval such that the first timer output does not override the current limit output of the current limit circuit. 
     
     
       7. The controller of  claim 4  wherein the current limit output gradually changes the impedance control output during the second time interval so that a voltage output of the impedance has a slew rate that does not exceed 12 volts per 100 milliseconds. 
     
     
       8. The controller of  claim 7  wherein the device has an impedance that is partially inductive. 
     
     
       9. The controller of  claim 4  wherein the first timer resets automatically when the connector is disconnected from the source of energization. 
     
     
       10. The controller of  claim 4  wherein the first timer is triggerable by voltage transients at the current input. 
     
     
       11. The controller of  claim 1  wherein the impedance control output triggers the limited inrush when the logic input is open circuit, and wherein the impedance control output triggers the limited inrush when the logic input is at a high level. 
     
     
       12. The controller of  claim 1  wherein the impedance comprises a transistor. 
     
     
       13. A controller for a device, the controller comprising:
 a connector configured to connect the device to a power source, wherein the connector comprises:
 a first contact for connecting to a first power supply contact of the power source; and 
 a second contact for connecting to a logic output connection of the power source; and a third contact for connecting to a second power supply contact of the power source; 
 
 an impedance component having a current input coupled to the first contact of the connector, an impedance control input, and a current output coupled to the device; and 
 an impedance control circuit comprising:
 an impedance control output coupled to the impedance control input; 
 a first timer coupled to the current input and the impedance control output, wherein the impedance control circuit is configured to enable the impedance control output to force the impedance component to an OFF state during a first time interval controlled by the first timer, wherein the first timer is enabled when, and starts timing in response to a connection that is made between the connector and the power source; and 
 a logic input coupled to the second contact of the connector, wherein the impedance control circuit enables a limited amount of current at the current input based on the logic output during a second time interval. 
 
 
     
     
       14. The controller of  claim 13 , wherein the impedance control circuit further comprises:
 a current limit circuit coupled to the logic input and the impedance control output, wherein the current limit circuit is configured to enable the impedance control output to control the impedance component to provide the limited amount of current at the current input during the second time interval such that a voltage of the device has a slew rate that does not exceed a preselected limit, wherein the second time interval is controlled by a second timer. 
 
     
     
       15. The controller of  claim 13 , wherein the first timer is enabled by the device being physically connected to the power source, which forces the impedance component OFF during the first time interval. 
     
     
       16. The controller of  claim 13 , wherein impedance component includes a variable impedance, and wherein the impedance control output is coupled to the impedance control input for controlling the variable impedance. 
     
     
       17. The controller of  claim 16 , wherein the impedance control circuit comprises:
 a current limit circuit coupled to the logic input, the current limit circuit including a current limit output coupled to the impedance control output such that the impedance control output is configured to control the variable impedance based on the logic input, wherein the first timer includes a first timer output configured to override the current limit output such that the impedance control output forces the impedance OFF during the first time interval independent of the current limit output. 
 
     
     
       18. The controller of  claim 13 , wherein the device comprises a data storage device and the source of energization comprises a host computer system. 
     
     
       19. The controller of  claim 13 , wherein the first timer is configured to be enabled by voltage transients at the current input, and wherein the first timer is configured to automatically reset when the connector is disconnected from the power source. 
     
     
       20. A controller for a device, the controller comprising:
 a connector for plugging the device into a source of energization and unplugging the device from the source of energization, wherein the connector comprises:
 a first contact for connecting to a first power supply contact of the source; 
 a second contact for connecting to a logic output from the source; and 
 a third contact for connecting to a second power supply contact of the source; 
 
 an impedance component having a current input coupled to the first contact of the connector, an impedance control input, and a current output coupled to the device; and 
 an impedance control circuit comprising:
 an impedance control output connected to the impedance control input; 
 a first timer configured to force the impedance OFF during a first time interval controlled by the first timer; 
 a second timer configured to provide a current limiting output during a second time interval; and 
 a current limiting circuit coupled to the logic input and the impedance control output, 
 wherein the current limiting circuit is configured to enable, via the impedance control output, a limited current output from the impedance component to the device during the second time interval based on the second timer, 
 wherein the current limiting circuit is configured to gradually change the impedance control output such that a voltage of the device has a slew rate that does not exceed a predetermined limit during the second time interval, and 
 wherein the current limiting circuit is configured to gradually change the impedance control output based on the logic output from the source. 
 
 
     
     
       21. The controller of  claim 20 , wherein the predetermined limit is 12 volts per 100 milliseconds. 
     
     
       22. The controller of  claim 20 , wherein the first timer is coupled to the current input and the impedance control output. 
     
     
       23. The controller of  claim 20 , wherein the first timer is enabled by detecting a new power source connection from the source of energization, and wherein the first timer is configured to force the impedance component OFF during the first time interval in response to detecting the new power source connection. 
     
     
       24. The controller of  claim 20 , wherein the first timer is configured to be triggered by voltage transients at the current input, and wherein the first timer is configured to automatically reset when the connector is disconnected from the source of energization. 
     
     
       25. The controller of  claim 20 , wherein the impedance component includes a variable impedance, and wherein the impedance control output is coupled to the impedance control input for controlling the variable impedance. 
     
     
       26. A controller for a device, the controller comprising:
 a connector for plugging the device into a source of a power supply voltage and unplugging the device from the source of power supply voltage, wherein the connector comprises:
 a first contact for connecting to a first power supply contact of the source; 
 a second contact for connecting to a logic output from the source; and 
 a third contact for connecting to a second power supply contact of the source; 
   an impedance having a current input that couples to the first contact of the connector, an impedance control input, and a current output coupling to the device; and   an impedance control circuit comprising:
 a first timer; 
 a logic input coupling to the second contact of the connector; and 
 an impedance control output connected to the impedance control input, the impedance control output placing the impedance in a high-impedance state during a first time interval controlled by the first timer in response to an applied supply voltage that is triggered by, and starts timing in response to, the device being plugged into the source of power supply voltage, and the logic output from the source limiting current at the current input during a second time interval controlled by a second timer. 
   
     
     
       27. The controller of claim 26, wherein the impedance control circuit is configured to control current provided to a capacitance of the device that includes at least one capacitor. 
     
     
       28. A data storage device comprising:
 a power supply input providing power;   a memory storage element that draws electrical current from the power provided by the power supply input;   a capacitance, having at least one capacitor, connected to the power supply input; and   a protection circuit including
 a current path between the power supply input and the capacitance, the current path including a variable impedance element configured to vary an impedance of the current path in response to a control input; 
 an energy storage circuit providing, in response to an amount of energy stored therein, a control signal to the control input; 
 a timer circuit configured to couple the power supply input to the energy storage circuit and to start timing, in response to an applied voltage at the power supply input and, after a first time period, isolate the power supply input from the energy storage circuit; and 
 an inrush current limiting circuit configured, in response to discharging of the energy stored in the energy storage circuit in response to an external signal and at a discharge rate, to charge the capacitance according to a predetermined slew rate derived from the discharge rate. 
   
     
     
       29. The device of claim 28, wherein the capacitance provides power to the memory storage element in response to loss of power from the power supply input. 
     
     
       30. The device of claim 28, further including a disc drive storage circuit configured to be powered by the power supply input. 
     
     
       31. The device of claim 28, wherein the at least one capacitor is connected between the current path and a ground of the data storage device. 
     
     
       32. A method for use with a memory storage device that receives power from an external power supply on a power supply input, the method comprising:
 controlling current provided to a capacitance of the memory storage device by, in response to a positive voltage change on the external power supply,
 increasing the impedance between the external power supply and the power supply input for a first time interval; 
 charging a capacitive circuit during the first time interval; and
 in response to the first time interval completing and to a logic input that indicates an on state for the memory storage device, 
 discharging the capacitive circuit at a discharge rate; and 
 reducing the impedance between the external power supply and the power supply input at a slew rate determined by the discharge rate. 
 
   
     
     
       33. The method of claim 32, further including the steps of
 charging, at a charge rate, the capacitive circuit during a second time interval in response to the logic input indicating an off state for the storage device;   increasing the impedance between the external power supply and the power supply input at a slew rate determined by the charge rate; and   discharging, in response to the increase in the impedance determined by the charge rate, the capacitance of the memory storage device to provide power to the memory storage device.   
     
     
       34. The method of claim 32, further including the step of determining the slew rate as a function of the device capacitance and power-using device elements of the storage device. 
     
     
       35. The method of claim 32, wherein the capacitance of the memory storage device includes at least one capacitor.