Thin-film transistor and method of making same

Abstract

A thin-film transistor includes a substrate, and a gate including a double-layered structure having first and second metal layers provided on the substrate, the first metal layer being wider than the second metal layer by 1 to 4 μm. A method of making such a thin-film transistor includes the steps of: depositing a first metal layer on a substrate, depositing a second metal layers directly on the first metal layer; forming a photoresist having a designated width on the second metal layer; patterning the second metal layer via isotropic etching using the photoresist as a mask; patterning the first metal layer by means of an anisotropic etching using the photoresist as a mask, the first metal layer being etched to have the designated width, thus forming a gate having a laminated structure of the first and second metal layers; and removing the photoresist.

What is claimed is: 
     
       1. A thin film transistor comprising:
 a substrate; and   a double-layered metal gate having a first metal layer and a second metal layer thereon, a total width of the first metal layer being greater than a total width of the second metal layer by about 1 to 4 μm.   
     
     
       2. The transistor of  claim 1 , wherein the first metal layer has a first and second side portion being exposed from the second metal layer, each side portion being at least about 0.5 μm in width. 
     
     
       3. The transistor of  claim 2 , wherein each side portion of the first metal layer is less than about 2 μm in width. 
     
     
       4. A thin film transistor on a substrate comprising:
 a double-layered gate having a first metal layer including aluminum and a second metal layer deposited on the first metal layer, wherein:
 the first metal layer has a substantially trapezoidal cross-sectional area with a top edge that is substantially parallel to the substrate; 
 a first portion of the top edge is in contact with the second metal layer; 
 a second portion of the top edge is not in contact with the second metal layer; 
 the first metal layer is wider than the second metal layer by greater than 1 μm and less than 4 μm so that sides of the first metal layer are exposed and are in contact with a first insulating layer; 
 the first metal layer has a thickness greater than 500 Å and less than 4000 Å and the second metal layer has a thickness greater than 500 Å and less than 2000 Å; 
 the second metal layer prevents hillock formation at the sides of the first metal layer; and 
 the first insulating layer is on the second metal layer; 
   a semiconductor layer on a portion of the first insulating layer at a location corresponding to the gate;   an ohmic contact layer on two sides of the semiconductor layer;   a source electrode and a drain electrode on the ohmic contact layer; and   a second insulating layer covering the semiconductor layer, the source and drain electrodes, and the first insulating layer.    
     
     
       5. A thin film transistor comprising:
 a substrate; and   a double-layered metal gate having a first metal layer and a second metal layer thereon, wherein:
 the first metal layer has a substantially trapezoidal cross-sectional area with a top edge that is substantially parallel to the substrate; 
 a first portion of the top edge is in contact with the second metal layer; 
 a second portion of the top edge is not in contact with the second metal layer; 
 a gate insulating layer is on the second metal layer; 
 the first metal layer has a thickness greater than 500 Å and less than 4000 Å; 
 the second metal layer has a thickness greater than 500 Å and less than 2000 Å; 
 the second metal layer prevents hillock formation at the sides of the first metal layer that are in contact with a gate insulating layer; and 
 a total width of the first metal layer is greater than a total width of the second metal layer by greater than 1 μm and less than 4 μm.  
   
     
     
       6. The transistor of claim 5, wherein the total width of the first metal layer is measured along the top edge of the first metal layer that is substantially parallel to the substrate.  
     
     
       7. The transistor of claim 5, wherein the total width of the second metal layer is measured along a top edge of the second metal layer that is substantially parallel to the substrate.  
     
     
       8. A thin film transistor on a substrate comprising:
 a double-layered gate having a first metal layer including aluminum and a second metal layer deposited on the first metal layer, wherein:
 the first metal layer has a substantially trapezoidal cross-sectional area with a top edge that is substantially parallel to the substrate; 
 a first portion of the top edge is in contact with the second metal layer; 
 a second portion of the top edge is not in contact with the second metal layer; and 
 the first metal layer is wider than the second metal layer by greater than 1 μm and less than 4 μm so that sides of the first metal layer are exposed and are in contact with a first insulating layer; 
 the second metal layer prevents hillock formation at the sides of the first metal layer; and 
 the first insulating layer is on the second metal layer; 
   a semiconductor layer on a portion of the first insulating layer at a location corresponding to the gate;   an ohmic contact layer on two sides of the semiconductor layer;   a source electrode and a drain electrode on the ohmic contact layer;   a second insulating layer covering the semiconductor layer, the source and drain electrodes, and the first insulating layer, wherein the second insulating layer has a contact hole over the drain electrode; and   a pixel electrode on the second insulating layer and connected to the drain electrode through the contact hole.    
     
     
       9. The thin film transistor of claim 8, wherein lateral surfaces of the second metal layer are inclined so that the second metal layer has a substantially trapezoidal cross-sectional area.  
     
     
       10. The thin film transistor of claim 8, wherein the width of the first metal layer is measured along the top edge of the first metal layer that is substantially parallel to the substrate.  
     
     
       11. The thin film transistor of claim 8, wherein the width of the second metal layer is measured along a top edge of the second metal layer that is substantially parallel to the substrate.  
     
     
       12. The thin film transistor of claim 8, wherein the first metal layer has a thickness greater than 500 Å and less than 4000 Å.  
     
     
       13. The thin film transistor of claim 8, wherein the second metal layer has a thickness greater than 500 Å and less than 2000 Å.  
     
     
       14. The thin film transistor of claim 8, wherein the first metal layer has a thickness greater than 500 Å and less than 4000 Å and the second metal layer has a thickness greater than 500 Å and less than 2000 Å.