USRE46123EActiveUtility

Solid-state image sensor and method of manufacturing the same

54
Assignee: TOSHIBA KKPriority: Sep 11, 2009Filed: Jan 13, 2015Granted: Aug 23, 2016
Est. expirySep 11, 2029(~3.2 yrs left)· nominal 20-yr term from priority
H10F 39/811H10F 39/803H10F 39/182H10F 39/199H01L 27/14645H01L 27/1464H01L 27/14609H01L 27/14636
54
PatentIndex Score
0
Cited by
20
References
50
Claims

Abstract

According to one embodiment, a solid-state image sensor includes a semiconductor substrate including a first surface on which light enters, and a second surface opposite to the first surface, a pixel region formed in the semiconductor substrate, and including a photoelectric conversion element which converts the incident light into an electrical signal, a peripheral region formed in the semiconductor substrate, and including a circuit which controls an operation of the element in the pixel region, a plurality of interconnects which are formed in a plurality of interlayer insulating films stacked on the second surface, and are connected to the circuit, and a support substrate formed on the stacked interlayer insulating films and the interconnects. An uppermost one of the interconnects formed in an uppermost one of the interlayer insulating films is buried in a first trench formed in the uppermost interlayer insulating film.

Claims

exact text as granted — not AI-modified
What is claimed is: 
     
       1. A solid-state image sensor comprising:
 a semiconductor substrate including a first surface on which light enters, and a second surface opposite to the first surface; 
 a pixel region formed in the semiconductor substrate, and including a photoelectric conversion element which converts the incident light into an electrical signal; 
 a peripheral region formed in the semiconductor substrate, and including a circuit which controls an operation of the element in the pixel region; 
 a plurality of interconnects which are formed in a plurality of interlayer insulating films stacked on the second surface, and are connected to the circuit; and 
 a support substrate formed on the stacked interlayer insulating films and the interconnects; 
 an electrode provided in the semiconductor substrate and extending through the peripheral region from the first surface to the second surface, one end of the electrode connected to a pad on the first surface and an other another end of the electrode connected to the circuit on the second surface; and 
 at least one of dummy layers formed in the plurality of interlayer insulating films stacked on the second surface, and not connected to the circuit, the dummy layers provided in a low-coverage region in the interlayer insulating films above at least one of the pixel region and a peripheral region, 
 wherein an uppermost one of the interconnects formed in an uppermost one of the interlayer insulating films is buried in a first trench formed in the uppermost interlayer insulating film, wherein the uppermost one of the interconnects extends inwardly of the uppermost interlayer insulating film from the surface thereof facing away from the first surface, 
 wherein an uppermost one of the dummy layer formed in the uppermost interlayer insulating film is buried in a second trench formed in the uppermost interlayer insulating film, wherein the uppermost one of the dummy layers extends inwardly of the uppermost interlayer insulating film from the surface thereof facing away from the first surface, and 
 wherein a material used as the uppermost interconnect and the uppermost dummy layer are is selected from the group consisting of copper and an alloy of copper. 
 
     
     
       2. The sensor according to  claim 1 , wherein an upper surface level of the uppermost interconnect is equal to that of the uppermost interlayer insulating film. 
     
     
       3. The sensor according to  claim 1 , wherein a material used as another interconnect is selected from the group consisting of copper and an alloy of copper. 
     
     
       4. The sensor according to  claim 1 , wherein an upper surface level of the dummy layer is equal to that of the uppermost interlayer insulating film. 
     
     
       5. The sensor according to  claim 1 , wherein a material used as an interconnect except for the uppermost interconnect is selected from the group consisting of aluminum and an alloy of aluminum. 
     
     
       6. The sensor according to  claim 1 , further comprising a lens formed on the first surface in the pixel region. 
     
     
       7. The sensor according to  claim 1 , wherein a material used as the pad is selected from the group consisting of aluminum and an alloy of aluminum. 
     
     
       8. The sensor according to  claim 1 , wherein the dummy layer is provided in the low-coverage region so as to satisfy a predetermined coverage in the uppermost interlayer insulating film. 
     
     
       9. A solid-state image sensor comprising:
 a semiconductor substrate including a first surface on which light enters, and a second surface opposite to the first surface;   a pixel region formed in the semiconductor substrate, and including a photoelectric conversion element which converts the incident light into an electrical signal;   a peripheral region formed in the semiconductor substrate, and including a circuit which controls an operation of the element in the pixel region;   a plurality of interconnects which are formed in a plurality of interlayer insulating films stacked on the second surface, and are connected to the circuit; and   a support substrate formed above the stacked interlayer insulating films and the interconnects;   an electrode provided in the semiconductor substrate and extending through the peripheral region from the first surface to the second surface, one end of the electrode connected to a pad thereon formed on the first surface side of the semiconductor substrate and another end of the electrode connected to the circuit on the second surface; and   at least one dummy layer formed in the plurality of interlayer insulating films stacked on the second surface, and not connected to the circuit, the at least one dummy layer provided in a low-coverage region in the interlayer insulating films above at least one of the pixel region and a peripheral region,   wherein an uppermost one of the interconnects formed in an uppermost one of the interlayer insulating films is buried in a first trench formed in the uppermost interlayer insulating film, wherein the uppermost one of the interconnects extends inwardly of the uppermost interlayer insulating film from the surface thereof facing away from the first surface,   wherein the at least one dummy layer is formed in the uppermost interlayer insulating film and is buried in a second trench formed in the uppermost interlayer insulating film, wherein the at least one dummy layer formed in the uppermost interlayer insulating film extends inwardly of the uppermost interlayer insulating film from the surface thereof facing away from the first surface, and   wherein a material used as the uppermost one of the interconnects and the at least one dummy layer formed in the uppermost interlayer insulating film is selected from the group consisting of copper and an alloy of copper.   
     
     
       10. The solid state image sensor of claim 9, further comprising a color filter located on the first surface side of the semiconductor substrate. 
     
     
       11. The solid state imaging sensor of claim 10, wherein a microlens is positioned over the color filter. 
     
     
       12. The solid state imaging sensor of claim 9, wherein an upper surface level of the uppermost one of the interconnects is at the same location as the upper surface of the uppermost interlayer insulating film. 
     
     
       13. The solid state imaging sensor of claim 9, wherein an upper surface level of the at least one dummy layer formed in the uppermost interlayer insulating film is at the same location as the upper surface of the uppermost interlayer insulating film. 
     
     
       14. The solid state imaging sensor of claim 9, wherein a material of the pad is selected from the group consisting of aluminum and an alloy of aluminum. 
     
     
       15. The solid state imaging sensor of claim 11, wherein the microlens is located between at least two pads. 
     
     
       16. The solid-state image sensor according to claim 9, wherein the support substrate is disposed above the stacked interlayer insulating films and the interconnects through an intervening adhesion layer. 
     
     
       17. The solid-state image sensor according to claim 9, wherein the semiconductor substrate includes an epitaxial layer. 
     
     
       18. The solid-state image sensor according to claim 9, wherein the semiconductor substrate includes an element isolation region. 
     
     
       19. The solid-state image sensor according to claim 10, wherein the color filter includes a white color filter configured to transmit the whole wavelength region of visible light therethrough. 
     
     
       20. The solid-state image sensor according to claim 18, wherein the element isolation region isolates individual photoelectric conversion elements. 
     
     
       21. The solid-state image sensor according to claim 20, wherein the element isolation region includes an element isolation insulating film formed on the second surface, and an impurity layer formed below the element isolation insulating film. 
     
     
       22. The solid-state image sensor according to claim 9, wherein the peripheral region includes an analog-digital conversion circuit, a processor, a row control circuit and a column control circuit. 
     
     
       23. A solid-state image sensor comprising:
 a semiconductor substrate including a first surface on which light enters, and a second surface opposite to the first surface;   a pixel region formed in the semiconductor substrate, and including a photoelectric conversion element which converts the incident light into an electrical signal;   a peripheral region formed in the semiconductor substrate, and including a circuit which controls an operation of the element in the pixel region;   a plurality of interconnects which are formed in a plurality of interlayer insulating films stacked on the second surface, and are connected to the circuit; and   a support substrate formed above the stacked interlayer insulating films and the interconnects;   an electrode provided in the semiconductor substrate and extending through the peripheral region from the first surface to the second surface, one end of the electrode connected to a pad on the first surface and another end of the electrode connected to the circuit on the second surface; and   at least one of dummy layer formed in the plurality of interlayer insulating films stacked on the second surface, and not connected to the circuit, the at least one dummy layer provided in a low-coverage region in the interlayer insulating films above at least one of the pixel region and a peripheral region,   wherein an uppermost one of the interconnects formed in an uppermost one of the interlayer insulating films is buried in a first trench formed in the uppermost interlayer insulating film, wherein the uppermost one of the interconnects extends inwardly of the uppermost interlayer insulating film from the surface thereof facing away from the first surface,   wherein the at least one dummy layer is formed in the uppermost interlayer insulating film and is buried in a second trench formed in the uppermost interlayer insulating film, wherein the at least one dummy layer formed in the uppermost interlayer insulating film extends inwardly of the uppermost interlayer insulating film from the surface thereof facing away from the first surface, and   wherein a material used as the uppermost one of the interconnects and the at least one dummy layer formed in the uppermost interlayer insulating film is selected from the group consisting of copper and an alloy of copper.   
     
     
       24. The solid-state image sensor according to claim 23, wherein the peripheral region includes an analog-digital conversion circuit, a processor, a row control circuit and a column control circuit. 
     
     
       25. The solid state image sensor of claim 23, further comprising a color filter located on the first surface side of the semiconductor substrate. 
     
     
       26. The solid state imaging sensor of claim 25, wherein a microlens is positioned over the color filter. 
     
     
       27. The solid state imaging sensor of claim 23, wherein an upper surface level of the uppermost one of the interconnects is at the same location as the upper surface of the uppermost interlayer insulating film. 
     
     
       28. The solid state imaging sensor of claim 23, wherein an upper surface level of the at least one dummy layer formed in the uppermost interlayer insulating film is at the same location as the upper surface of the uppermost interlayer insulating film. 
     
     
       29. The solid state imaging sensor of claim 23, wherein a material of the pad is selected from the group consisting of aluminum and an alloy of aluminum. 
     
     
       30. The solid state imaging sensor of claim 26, wherein the microlens is located between at least two pads. 
     
     
       31. The solid-state image sensor according to claim 23, wherein the support substrate is disposed above the stacked interlayer insulating films and the interconnects through an intervening adhesion layer. 
     
     
       32. The solid-state image sensor according to claim 23, wherein the semiconductor substrate includes an epitaxial layer. 
     
     
       33. The solid-state image sensor according to claim 23, wherein the semiconductor substrate includes an element isolation region. 
     
     
       34. The solid-state image sensor according to claim 25, wherein the color filter includes a white color filter configured to transmit the whole wavelength region of visible light therethrough. 
     
     
       35. The solid-state image sensor according to claim 33, wherein the element isolation region isolates individual photoelectric conversion elements. 
     
     
       36. The solid-state image sensor according to claim 35, wherein the element isolation region includes an element isolation insulating film formed on the second surface, and an impurity layer formed below the element isolation insulating film. 
     
     
       37. A solid-state image sensor comprising:
 a semiconductor substrate including a first surface on which light enters, and a second surface opposite to the first surface;   a pixel region formed in the semiconductor substrate, and including a photoelectric conversion element which converts the incident light into an electrical signal;   a peripheral region formed in the semiconductor substrate, and including a circuit which controls an operation of the element in the pixel region;   a plurality of interconnects which are formed in a plurality of interlayer insulating films stacked on the second surface, and are connected to the circuit; and   a support substrate formed on the stacked interlayer insulating films and the interconnects;   an electrode provided in the semiconductor substrate and extending through the peripheral region from the first surface to the second surface, one end of the electrode connected to a pad thereon formed on the first surface side of the semiconductor substrate and another end of the electrode connected to the circuit on the second surface; and   at least one dummy layer formed in the plurality of interlayer insulating films stacked on the second surface, and not connected to the circuit, the at least one dummy layer provided in a low-coverage region in the interlayer insulating films above at least one of the pixel region and a peripheral region,   wherein an uppermost one of the interconnects formed in an uppermost one of the interlayer insulating films is buried in a first trench formed in the uppermost interlayer insulating film wherein the uppermost one of the interconnects extends inwardly of the uppermost interlayer insulating film from the surface thereof facing away from the first surface,   wherein the at least one dummy layer is formed in the uppermost interlayer insulating film and is buried in a second trench formed in the uppermost interlayer insulating film, wherein the at least one dummy layer formed in the uppermost interlayer insulating film extends inwardly of the uppermost interlayer insulating film from the surface thereof facing away from the first surface, and   wherein a material used as the uppermost one of the interconnects and the at least one dummy layer formed in the uppermost interlayer insulating film is selected from the group consisting of copper and an alloy of copper.   
     
     
       38. The solid-state image sensor according to claim 37, wherein the peripheral region includes an analog-digital conversion circuit, a processor, a row control circuit and a column control circuit. 
     
     
       39. The solid-state image sensor according to claim 37, wherein the semiconductor substrate includes an epitaxial layer. 
     
     
       40. The solid state image sensor of claim 37, further comprising a color filter located on the first surface side of the semiconductor substrate. 
     
     
       41. The solid state imaging sensor of claim 40, wherein a microlens is positioned over the color filter. 
     
     
       42. The solid state imaging sensor of claim 37, wherein an upper surface level of the uppermost one of the interconnects is at the same location as the upper surface of the uppermost interlayer insulating film. 
     
     
       43. The solid state imaging sensor of claim 37, wherein an upper surface level of the at least one dummy layer formed in the uppermost interlayer insulating film is at the same location as the upper surface of the uppermost interlayer insulating film. 
     
     
       44. The solid state imaging sensor of claim 37, wherein a material of the pad is selected from the group consisting of aluminum and an alloy of aluminum. 
     
     
       45. The solid state imaging sensor of claim 41, wherein the microlens is located between at least two pads. 
     
     
       46. The solid-state image sensor according to claim 37, wherein the support substrate is disposed above the stacked interlayer insulating films and the interconnects through an intervening adhesion layer. 
     
     
       47. The solid-state image sensor according to claim 37, wherein the semiconductor substrate includes an element isolation region. 
     
     
       48. The solid-state image sensor according to claim 40, wherein the color filter includes a white color filter configured to transmit the whole wavelength region of visible light therethrough. 
     
     
       49. The solid-state image sensor according to claim 47, wherein the element isolation region isolates individual photoelectric conversion elements. 
     
     
       50. The solid-state image sensor according to claim 49, wherein the element isolation region includes an element isolation insulating film formed on the second surface, and an impurity layer formed below the element isolation insulating film.

Cited by (0)

No later patents cite this yet.

References (0)

No backward citations on record.