Reading memory cells using multiple thresholds
Abstract
A method for operating a memory ( 28 ) includes storing data, which is encoded with an Error Correction Code (ECC), in analog memory cells ( 32 ) of the memory by writing respective analog input values selected from a set of nominal values to the analog memory cells. The stored data is read by performing multiple read operations that compare analog output values of the analog memory cells to different, respective read thresholds so as to produce multiple comparison results for each of the analog memory cells. At least two of the read thresholds are positioned between a pair of the nominal values that are adjacent to one another in the set of the nominal values. Soft metrics are computed responsively to the multiple comparison results. The ECC is decoded using the soft metrics, so as to extract the data stored in the analog memory cells.
Claims
exact text as granted — not AI-modifiedThe invention claimed is:
1. A method for operating a memory, comprising:
storing data, which is encoded with an Error Correction Code (ECC), in analog memory cells of the memory by writing to the analog memory cells respective analog input values that program the analog memory cells to a set of memory states;
reading the stored data multiple times from each analog memory cell by performing multiple read operations that compare analog output values of the analog memory cells to different, respective read thresholds so as to produce multiple comparison results for each of the analog memory cells, wherein the analog output values associated with each memory state lie in a respective analog value region, wherein analog value regions are separated by one or more boundary regions, and wherein at least two of the read thresholds are positioned in a boundary region between a pair of adjacent ones of the analog value regions;
computing soft metrics responsively to the multiple comparison results; and
decoding the ECC using the soft metrics, so as to extract the data stored in the analog memory cells;
wherein a plurality of the memory cells stores two or more bits of the data, wherein reading the data comprises, for the plurality of the memory cells, reading the two or more data bits in respective two or more decoding stages, and wherein computing the soft metrics comprises modifying a soft metric of a first bit read in a first decoding stage responsively to a value of a second bit read in a second decoding stage that precedes the first decoding stage; and
wherein modifying the soft metric comprises conditionally inverting the soft metric of the first bit depending on the value of the second bit.
2. The method according to claim 1 , wherein each of the analog memory cells stores one or more bits of the data, and wherein each of the soft metrics corresponds to one of the bits.
3. The method according to claim 2 , wherein each of at least some of the analog memory cells stores two or more bits of the data, wherein reading the data comprises, for each of the at least some of the analog memory cells, reading the two or more data bits in respective two or more decoding stages, and wherein computing the soft metrics comprises modifying a soft metric of a first bit read in a first decoding stage responsively to a value of a second bit read in a second decoding stage that precedes the first decoding stage.
4. The method according to claim 3 , wherein modifying the soft metric comprises conditionally inverting the soft metric of the first bit depending on the value of the second bit.
5. The method according to claim 1 , and comprising making an initial attempt to decode the ECC using an initial set of the read thresholds, such that no more than one of the read thresholds in the initial set is positioned in any given boundary region, and comparing the analog output values to the multiple read thresholds upon a failure of the initial attempt.
6. The method according to claim 1 , wherein each comparison result has one of first and second possible values, and wherein computing the soft metrics comprises determining respective first and second counts of the comparison results having the first and second possible values, and computing the soft metrics based on the first and second counts.
7. The method according to claim 1 , and comprising, upon failing to decode the ECC, adding one or more additional read thresholds to the multiple read thresholds, re-computing the soft metrics responsively to the additional read thresholds, and decoding the ECC using the re-computed soft metrics.
8. The method according to claim 7 , wherein adding the additional threshold comprises progressively increasing a number of the read thresholds until a predetermined condition is met.
9. The method according to claim 1 , wherein reading the data from a first group of the analog memory cells further comprises estimating interference caused to the first group by a second group of the analog memory cells and canceling the estimated interference.
10. The method according to claim 9 , wherein canceling the estimated interference comprises modifying the soft metrics associated with the first group responsively to the estimated interference.
11. The method according to claim 9 , and comprising, upon failing to decode the ECC in the first group, selecting whether to perform one of:
re-reading the data in the second group, so as to re-estimate and cancel the interference;
re-estimating the interference by reading the data in a third group of the memory cells; and
adding one or more additional read thresholds and re-reading the data in the first group using the additional read thresholds.
12. The method according to claim 1 , wherein computing the soft metrics comprises normalizing the soft metrics so as not to depend on a number of the read thresholds.
13. The method according to claim 1 , wherein performing the multiple read operations comprises positioning the multiple read thresholds at non-uniform intervals with respect to one another.
14. The method according to claim 1 , wherein the analog output values associated with each memory state are distributed in a respective statistical distribution, and wherein reading the stored data comprises positioning the at least two of the read thresholds about a midpoint between respective statistical distributions of the analog output values associated with the memory states represented by the adjacent analog value regions.
15. The method according to claim 1 , wherein two or more of the comparison results for a given analog memory cell are inconsistent with one another.
16. A data storage apparatus, comprising:
an interface, which is operative to communicate with a memory that includes a plurality of analog memory cells; and
a memory signal processor (MSP), which is connected to the interface and is coupled configured to store data, which is encoded with an Error Correction Code (ECC), in the analog memory cells by writing respective input analog values that program the analog memory cells to a set of memory states, to read the stored data multiple times from each analog memory cell by performing multiple read operations that compare analog output values of the analog memory cells to different, respective read thresholds so as to produce multiple comparison results for each of the analog memory cells, wherein the analog output values associated with each memory state lie in a respective analog value region, wherein analog value regions are separated by one or more boundary regions, and wherein at least two of the read thresholds are positioned in a boundary region between a pair of adjacent ones of the analog value regions, to compute soft metrics responsively to the multiple comparison results, and to decode the ECC using the soft metrics, so as to extract the data stored in the analog memory cells;
wherein a plurality of the memory cells stores two or more bits of the data;
wherein the MSP is further configured to:
read the two or more data bits in respective two or more decoding stages, and
modify a soft metric of a first bit read in a first decoding stage dependent upon a value of a second bit read in a second decoding stage that precedes the first decoding stage; and
wherein to modify the soft metric, the MSP is further configured to conditionally invert the soft metric of the first bit depending on the value of the second bit.
17. The apparatus according to claim 16 , wherein each of the analog memory cells stores one or more bits of the data, and wherein each of the soft metrics corresponds to one of the bits.
18. The apparatus according to claim 17 , wherein each of at least some of the analog memory cells stores two or more bits of the data, and wherein the MSP is coupled to read the two or more data bits in respective two or more decoding stages, and to modify a soft metric of a first bit read in a first decoding stage responsively to a value of a second bit read in a second decoding stage that precedes the first decoding stage.
19. The apparatus according to claim 18 , wherein the MSP is coupled to conditionally invert the soft metric of the first bit depending on the value of the second bit.
20. The apparatus according to claim 16 , wherein the MSP is coupled configured to make an initial attempt to decode the ECC using an initial set of the read thresholds, such that no more than one of the read thresholds in the initial set is positioned in any given boundary region, and to compare the analog output values to the multiple read thresholds upon failure of the initial attempt.
21. The apparatus according to claim 16 , wherein each comparison result has one of first and second possible values, and wherein the MSP is coupled configured to determine respective first and second counts of the comparison results having the first and second possible values, and to compute the soft metrics based on the first and second counts.
22. The apparatus according to claim 16 , wherein, upon failing to decode the ECC, the MSP is coupled configured to add one or more additional read thresholds to the multiple read thresholds, to recompute the soft metrics responsively to the additional read thresholds and to decode the ECC using the recomputed soft metrics.
23. The apparatus according to claim 22 , wherein the MSP is coupled configured to progressively increase a number of the read thresholds until a predetermined condition is met.
24. The apparatus according to claim 16 , wherein the MSP is coupled configured to estimate interference caused to a first group of the analog memory cells by a second group of the analog memory cells, and to cancel the estimated interference.
25. The apparatus according to claim 24 , wherein the MSP is coupled configured to modify the soft metrics associated with the first group responsively to the estimated interference.
26. The apparatus according to claim 24 , wherein, upon failing to decode the ECC in the first group, the MSP is coupled configured to select whether to perform one of:
re-reading the data in the second group, so as to re-estimate and cancel the interference;
re-estimating the interference by reading the data in a third group of the memory cells; and
adding one or more additional read thresholds and re-reading the data in the first group using the additional read thresholds.
27. The apparatus according to claim 16 , wherein the MSP is coupled configured to normalize the soft metrics so as not to depend on a number of read thresholds.
28. The apparatus according to claim 16 , wherein the MSP is coupled configured to position the multiple read thresholds at non-uniform intervals with respect to one another.
29. The apparatus according to claim 16 , wherein the analog output values associated with each memory state are distributed in a respective statistical distribution, and wherein the MSP is coupled configured to position the at least two of the read thresholds about a midpoint between respective statistical distributions of the analog output values associated with the memory states represented by the adjacent analog value regions.
30. The apparatus according to claim 16 , wherein two or more of the comparison results for a given analog memory cell are inconsistent with one another.
31. A data storage apparatus, comprising:
a memory device, comprising:
a plurality of analog memory cells, which are configured to store data, which is encoded with an Error Correction Code (ECC) and written to the analog memory cells as respective analog input values that program the analog memory cells to a set of memory states; and
reading circuitry, which is coupled to read the stored data multiple times from each analog memory cell by performing multiple read operations that compare output analog values of the analog memory cells to different, respective read thresholds so as to produce multiple comparison results for each of the analog memory cells, wherein the analog output values associated with each memory state lie in a respective analog value region, wherein analog value regions are separated by one or more boundary regions, and wherein at least two of the read thresholds are positioned in a boundary region between a pair of adjacent ones of the analog value regions, to compute soft metrics responsively to the multiple comparison results, and to output the computed soft metrics; and
a Memory Signal Processor (MSP) device, which is connected to the memory device and is coupled to accept the soft metrics computed by the reading circuitry, and to decode the ECC using the soft metrics.
32. A method for operating a memory, comprising:
storing data, which is encoded with an Error Correction Code (ECC), in a group of analog memory cells of the memory by writing to the analog memory cells in the group respective analog input values; reading the data from the analog memory cells in the group by comparing analog output values of the analog memory cells in the group to one or more read thresholds, and applying ECC decoding to the read data; and upon a failure of the ECC decoding, canceling interference caused to the analog memory cells in the group by at least one other analog memory cell, and re-decoding the ECC.
33. A data storage apparatus, comprising:
an interface, which is operative to communicate with a memory that includes a plurality of analog memory cells; and a memory signal processor (MSP), which is connected to the interface and is coupled to store data, which is encoded with an Error Correction Code (ECC), in a group of analog memory cells of the memory by writing to the analog memory cells in the group respective analog input values, to read the data from the analog memory cells in the group by comparing analog output values of the analog memory cells in the group to one or more read thresholds, and applying ECC decoding to the read data, and, upon a failure of the ECC decoding, to cancel interference caused to the analog memory cells in the group by at least one other analog memory cell, and to re-decode the ECC.
34. A method for reading a memory cell of a non-volatile memory, comprising:
performing a first read operation of a memory cell dependent upon a first read threshold, wherein data stored in the memory cell is encoded with an Error Correction Code (ECC); performing a second read operation of the memory cell dependent upon a second read threshold, wherein the first read threshold and the second read threshold are positioned in a boundary region relative to two possible memory states; and determining a soft metric using the results of the first read operation and the second read operation; modifying the soft metric by conditionally inverting the soft metric depending on a value of a data bit read from another memory cell; and decoding the ECC using the soft metric to extract the data from the memory cell.
35. The method of claim 34, wherein the boundary region comprises an area of overlap between distributions of two memory states.
36. The method of claim 34, further comprising performing an initial read operation of the non-volatile memory cell dependent upon an initial read threshold prior to the first and second read operations.
37. The method of claim 36, wherein the first read operation and the second read operation are performed responsive to a failure of an error correction process dependent upon results of the initial read operation.
38. The method of claim 36, wherein the first read threshold is less than the initial read threshold, and wherein the second threshold is greater than the initial read threshold.
39. The method of claim 34, further comprising determining an interference caused to the memory cell by at least one other memory cell and compensating for the interference.
40. A method for operating a non-volatile memory, wherein the non-volatile memory includes a plurality of memory cells, the method, comprising:
performing a first read on a first group of the plurality of memory cells dependent upon a first read threshold, wherein data stored in the first group of the plurality of memory cells is encoded with an Error Correction Code (ECC); performing a second read on the first group of the plurality of memory cells dependent upon a second read threshold; determining at least one soft metric dependent upon results of the first read operation and the second read operation; decoding the ECC using the at least one soft metric; responsive to a failure to decode the ECC, performing a third read on the first group of the plurality of memory cells dependent upon a third read threshold; updating at least one soft metric dependent upon a result of the third read; wherein a of the plurality memory cells stores two or more bits of the data; wherein performing the first read on the first group includes reading the two or more data bits of a memory cell in the first group in respective two or more decoding stages; wherein determining the soft metric includes modifying a soft metric of a first bit read in a first decoding stage dependent upon a value of a second bit read in a second decoding stage that precedes the first decoding stage; and wherein modifying the at least one soft metric includes conditionally inverting the soft metric of the first bit dependent upon the value of the second bit.
41. The method of claim 40, wherein updating the at least one soft metric comprises determining a new soft metric dependent upon the results of the first read operation and the second read operation, and results of the third read operation.
42. The method of claim 40, wherein the ECC comprises a low-density parity-check (LDPC) code.Cited by (0)
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