Nonvolatile memory device and method of forming the same

Abstract

A nonvolatile memory device and a method of forming the nonvolatile memory device, the method including forming a tunnel insulating layer on a substrate, wherein forming the tunnel insulating layer includes forming a multi-element insulating layer by a process including sequentially supplying a first element source, a second element source, and a third element source to the substrate, forming a charge storage layer on the tunnel insulating layer, forming a blocking insulating layer on the charge storage layer, and forming a control gate electrode on the blocking insulating layer.

What is claimed is: 
     
       1. A method of forming a nonvolatile memory device, comprising:
 forming a tunnel insulating layer on a substrate, wherein forming the tunnel insulating layer includes forming a multi-element insulating layer by a process including loading the substrate in a chamber and sequentially supplying a first element source, a second element source, and a third element source to the loaded substrate in the chamber, and the first element source, the second element source, and the third element source are different from one another;,  
 forming a charge storage layer on the tunnel insulating layer; 
 forming a blocking insulating layer on the charge storage layer; and 
 forming a control gate electrode on the blocking insulating layer 
 wherein a charge storage layer, a blocking insulating layer, and a control gate electrode are on the tunnel insulating layer. 
 
     
     
       2. The method as claimed in  claim 1 , wherein one of the first, second, and third element sources is a silicon source, another is a nitrogen source, and the other is an oxygen source. 
     
     
       3. The method as claimed in  claim 2 , wherein the third element source is the oxygen source and one of the first and second element sources is the silicon source and the other is the nitrogen source. 
     
     
       4. The method as claimed in  claim 2 , wherein:
 the multi-element insulating layer includes a silicon oxynitride layer, and 
 an oxygen content of the multi-element insulating layer is about 30 at. % to about 60 at. %. 
 
     
     
       5. The method as claimed in  claim 1 , wherein forming the multi-element insulating layer includes performing a plurality of cycles, each cycle including sequentially supplying the first element source, the second element source, and the third element source to the substrate. 
     
     
       6. The method as claimed in  claim 1 , wherein forming the multi-element insulating layer includes, in sequence:
 adsorbing the first element source onto the substrate; 
 purging a non-adsorbed first element source; 
 supplying the second element source to the substrate to react with the adsorbed first element source; 
 purging an unreacted second element source and a reaction residual; 
 supplying the third element source to the substrate to react with the reacted first and second elements; and 
 purging an unreacted third element source and a reaction residual. 
 
     
     
       7. A method of forming a nonvolatile memory device, comprising:
 forming a tunnel insulating layer on a substrate, wherein forming the tunnel insulating layer includes:
 forming a multi-element insulating layer by a process including sequentially supplying a first element source, a second element source, and a third element source to the substrate, one of the first, second, and third element sources is a silicon source, another is a nitrogen source, and the other is an oxygen source; forming the multi-element insulating layer includes performing a plurality of cycles, each cycle including sequentially supplying the first element source, the second element source, and the third element source to the substrate; an amount of the oxygen source supplied during the first cycle among the cycles is different from an amount of the oxygen source supplied during a last cycle among the cycles; and an energy band gap of a bottom surface of the multi-element insulating layer being different from an energy band gap of a top surface of the multi-element insulating layer; 
 
 forming a charge storage layer on the tunnel insulating layer; 
 forming a blocking insulating layer on the charge storage layer; and 
 forming a control gate electrode on the blocking insulating layer. 
 
     
     
       8. The method as claimed in  claim 7 , wherein the amount of the oxygen source supplied during the first cycle is greater than the amount of the oxygen source supplied during the last cycle. 
     
     
       9. The method as claimed in  claim 8 , wherein:
 the plurality of cycles include at least one middle cycle between the first cycle and the last cycle, and 
 an amount of the oxygen source supplied during the middle cycle is equal to or less than an amount of the oxygen source supplied during a cycle performed just before the middle cycle. 
 
     
     
       10. The method as claimed in  claim 7 , wherein the amount of the oxygen source supplied during the first cycle is less than the amount of the oxygen source supplied during the last cycle. 
     
     
       11. The method as claimed in  claim 10 , wherein:
 the plurality of cycles include at least one middle cycle between the first cycle and the last cycle, and 
 an amount of the oxygen source supplied during the middle cycle is equal to or greater than an amount of the oxygen source supplied during a cycle performed just before the middle cycle. 
 
     
     
       12. The method as claimed in  claim 1 , wherein:
 forming the tunnel insulating layer further includes forming a nitrogen treated interface layer on the substrate prior to forming the multi-element insulating layer, the multi-element insulating layer being formed on the nitrogen treated interface layer; and 
 forming the nitrogen treated interface layer includes performing a thermal oxidation process on the substrate to form an interface layer and performing a nitrogen treatment process on the interface layer to form the nitrogen treated interface layer. 
 
     
     
       13. The method as claimed in  claim 1 , wherein forming the tunnel insulating layer further includes forming an interface layer on the substrate prior to forming the multi-element insulating layer, and the multi-element insulating layer is formed on the interface layer. 
     
     
       14. The method as claimed in  claim 1 , further comprising annealing the multi-element insulating layer prior to forming the charge storage layer. 
     
     
       15. The method as claimed in  claim 14 , wherein a process gas used in the annealing includes at least one of oxygen, ozone, nitrogen, nitric oxide, nitrous oxide, chlorine, and fluorine. 
     
     
       16. The method as claimed in  claim 1 , wherein forming the multi-element insulating layer includes sequentially supplying the first element source to the substrate at a first temperature, the second element source to the substrate at a second temperature, and the third element source to the substrate at a third temperature. 
     
     
       17. The method as claimed in  claim 16 , wherein the first temperature, the second temperature, and the third temperature are all different from each other. 
     
     
       18. The method as claimed in  claim 11 , wherein an energy band gap of the multi-element insulating layer is substantially uniform. 
     
     
       19. The method as claimed in  claim 5 , wherein:
 one of the first, second, and third element sources is a silicon source, another is a nitrogen source, and the other is an oxygen source, and 
 an amount of the nitrogen source supplied during the first cycle among the plurality of cycles is substantially equal to an amount of the nitrogen source supplied during the last cycle among the plurality of cycles. 
 
     
     
       20. The method as claimed in  claim 5 , wherein:
 one of the first, second, and third element sources is a silicon source, another is a nitrogen source, and the other is an oxygen source, and 
 an amount of silicon source supplied during the first cycle among plurality of cycles is substantially equal to an amount of the silicon source supplied during the last cycle among plurality of cycles. 
 
     
     
       21. The method as claimed in  claim 5 , wherein:
 one of the first, second, and third element sources is a silicon source, another is a nitrogen source, and the other is an oxygen source, and 
 forming the multi-element insulating layer includes changing an amount of the oxygen source supplied during each cycle of the plurality of cycles by a predetermined amount such that the energy band gap of the multi-element insulating layer substantially linearly decreases from the bottom surface of the multi-element insulating layer to the top surface of the multi-element insulating layer. 
 
     
     
       22. A method of forming an integrated circuit device, the method comprising:
 forming a nonvolatile memory device comprising a tunnel insulating layer, a charge storage layer, a blocking insulating layer, and a control gate electrode by forming the tunnel insulating layer on a substrate, wherein forming the tunnel insulating layer includes forming a multi-element insulating layer by a process including loading the substrate in a chamber and sequentially supplying a first element source, a second element source, and a third element source to the loaded substrate in the chamber, and the first element source, the second element source, and the third element source are different from one another.    
     
     
       23. A method of forming a nonvolatile memory device, comprising:
 forming a tunnel insulating layer on a substrate, wherein forming the tunnel insulating layer includes forming a multi-element insulating layer by a process including loading the substrate in a chamber and sequentially supplying a first element source, a second element source, and a third element source to the loaded substrate in the chamber, and the first element source, the second element source, and the third element source are different from one another.    
     
     
       24. The method as claimed in claim 23, further comprising:
 forming a charge storage layer on the tunnel insulating layer;   forming a blocking insulating layer on the charge storage layer; and   forming a control gate electrode on the blocking insulating layer.    
     
     
       25. The method as claimed in claim 1, wherein the substrate comprises an active region.