Active pulse positioning modulator

Abstract

An adaptive pulse positioning modulator including a sense circuit which provides a compensation signal indicative of output voltage error, a filter circuit having an input receiving the compensation signal and an output providing an adjust signal, a leading ramp circuit which provides a repetitive first leading edge ramp signal having a slope which is adjusted by the adjust signal, a comparator circuit which provides a first start trigger signal when the first leading edge ramp signal reaches the compensation signal and a first end trigger signal when a first trailing edge ramp signal reaches the compensation signal, a trailing ramp circuit which initiates ramping of the first trailing edge ramp signal when the first start trigger signal is provided, and a pulse control logic which asserts pulses on a PWM signal based on the trigger signals.

What is claimed is: 
     
       1. An adaptive pulse positioning modulator for controlling a regulated output voltage, comprising:
 a sense circuit which provides a compensation signal indicative of output voltage error; 
 a filter circuit having an input receiving said compensation signal and an output providing an adjust signal; 
 a leading ramp circuit which provides a repetitive first leading edge ramp signal having a slope at a nominal level when said compensation signal is steady state and which adjusts said slope based on said adjust signal; 
 a comparator circuit which provides a first start trigger signal when said first leading edge ramp signal reaches said compensation signal and which provides a first end trigger signal when a first trailing edge ramp signal reaches said compensation signal; 
 a trailing ramp circuit which initiates ramping of said first trailing edge ramp signal when said first start trigger signal is provided; and 
 pulse control logic which initiates each pulse on a first pulse-width modulation (PWM) signal when said first start trigger signal is provided and which terminates each said pulse on said first PWM signal when said first end trigger signal is provided. 
 
     
     
       2. The adaptive pulse positioning modulator of  claim 1 , wherein said sense circuit comprises an error amplifier which provides said compensation signal indicative of error of said output voltage. 
     
     
       3. The adaptive pulse positioning modulator of  claim 1 , wherein said leading ramp circuit comprises a down ramp generator and wherein said trailing ramp circuit comprises an up ramp generator. 
     
     
       4. The adaptive pulse positioning modulator of  claim 1 , wherein said filter circuit controls said adjust signal to increase said slope in response to an increase of said compensation signal and to decrease said slope in response to a decrease of said compensation signal. 
     
     
       5. The adaptive pulse positioning modulator of  claim 4 , wherein said filter circuit prevents said slope from falling below a predetermined minimum level. 
     
     
       6. The adaptive pulse positioning modulator of  claim 1 , wherein said leading ramp circuit provides a number N of repetitive leading edge ramp signals each having said slope at said nominal level when said compensation signal is steady state and which adjusts said slope based on said adjust signal, wherein N is an integer greater than one, wherein said leading ramp circuit ramps each of said leading edge ramp signals within a voltage range from a first voltage to a second voltage and then resets each of said leading edge ramp signals back to said first voltage, and wherein said leading ramp circuit resets said N leading edge ramp signals in round-robin order separated by 1/Nth of said voltage range. 
     
     
       7. The adaptive pulse positioning modulator of  claim 6 , further comprising:
 said comparator circuit providing one of N start trigger signals when a corresponding one of said N leading edge ramp signals reaches said compensation signal and providing one of N end trigger signals when a corresponding one of N trailing edge ramp signals reaches said compensation signal; 
 said trailing ramp circuit initiating ramping one of said N trailing edge ramp signals when a corresponding one of said N start trigger signals is provided; 
 said pulse control logic initiating each pulse on a corresponding one of N PWM signals when a corresponding one of said N start trigger signals is provided and terminating each pulse on said corresponding PWM signal when a corresponding one of said N end trigger signals is provided; and 
 wait logic which pauses each of said N leading edge ramp signals when any one of said N PWM signals is not provided between successive resets of a corresponding one of said N leading edge ramp signals. 
 
     
     
       8. The adaptive pulse positioning modulator of  claim 7 , wherein said wait logic resumes ramping of each of said N leading edge ramp signals when said compensation signal rises to a predetermined minimum level. 
     
     
       9. The adaptive pulse positioning modulator of  claim 8 , wherein said pulse control logic maintains said round-robin order. 
     
     
       10. The adaptive pulse positioning modulator of  claim 7 , wherein said filter circuit controls said adjust signal to change said slope in response to a change of said compensation signal and wherein said filter circuit prevents said slope from falling below a predetermined minimum level except when said wait logic pauses each of said N leading edge ramp signals. 
     
     
       11. A power converter for providing a regulated output voltage, comprising:
 a first phase circuit controlled by pulses on a first pulse width modulation (PWM) signal for converting an input voltage to the output voltage via a first inductor; 
 a sense circuit which provides a compensation signal indicative of output voltage error; 
 a filter circuit having an input receiving said compensation signal and an output providing an adjust signal; and 
 an adaptive pulse positioning modulator, comprising:
 a leading ramp circuit which provides a repetitive first leading edge ramp signal having a slope at a nominal level when said compensation signal is steady state and which adjusts said slope based on said adjust signal; 
 a comparator circuit which provides a first start trigger signal when said first leading edge ramp signal reaches said compensation signal and which provides a first end trigger signal when a first trailing edge ramp signal reaches said compensation signal; 
 a trailing ramp circuit which initiates ramping of said first trailing edge ramp signal when said first start trigger signal is provided; and 
 pulse control logic which initiates each pulse on said first PWM signal when said first start trigger signal is provided and which terminates each said pulse on said first PWM signal when said first end trigger signal is provided. 
 
 
     
     
       12. The power converter of  claim 11 , wherein said filter circuit controls said adjust signal to increase said slope in response to an increase of said compensation signal and to decrease said slope in response to a decrease of said compensation signal. 
     
     
       13. The power converter of  claim 12 , wherein said filter circuit prevents said slope from falling below a predetermined minimum level. 
     
     
       14. The power converter of  claim 11 , further comprising:
 a number N of phase circuits, each controlled by pulses on a corresponding one of N PWM signals for converting said input voltage to said output voltage via a corresponding one of N inductors, wherein N is an integer greater than one; and 
 wherein said adaptive pulse positioning modulator comprises:
 said leading ramp circuit providing N repetitive leading edge ramp signals each having said slope at said nominal level when said compensation signal is steady state and which adjusts said slope based on said adjust signal, wherein said leading ramp circuit ramps each of said leading edge ramp signals within a voltage range from a first voltage to a second voltage and then resets each of said leading edge ramp signals back to said first voltage, and wherein said leading ramp circuit resets said N leading edge ramp signals in round-robin order separated by 1/Nth of said voltage range; 
 said comparator circuit providing one of N start trigger signals when a corresponding one of said N leading edge ramp signals reaches said compensation signal and providing one of N end trigger signals when a corresponding one of N trailing edge ramp signals reaches said compensation signal; 
 said trailing ramp circuit initiating ramping one of said N trailing edge ramp signals when a corresponding one of said N start trigger signals is provided; 
 said pulse control logic initiating each pulse on a corresponding one of N PWM signals when a corresponding one of said N start trigger signals is provided and terminating each pulse on said corresponding PWM signal when a corresponding one of said N end trigger signals is provided; and 
 wait logic which pauses each of said N leading edge ramp signals when any one of said N PWM signals is not provided between successive resets of a corresponding one of said N leading edge ramp signals. 
 
 
     
     
       15. The power converter of  claim 14 , wherein said wait logic resumes ramping of each of said N leading edge ramp signals when said compensation signal rises to a predetermined minimum level. 
     
     
       16. The power converter of  claim 15 , wherein said pulse control logic maintains said round-robin order. 
     
     
       17. A method of controlling a DC-DC converter providing a regulated output voltage, comprising:
 providing a compensation signal indicative of the output voltage error; 
 filtering the compensation signal and providing an adjust signal indicative of a changes of the compensation signal; 
 providing a repetitive first leading edge ramp signal having a slope at a nominal level when the compensation signal is steady state; 
 adjusting the slope of the first leading edge ramp signal based on the adjust signal; 
 providing a first start trigger signal when the first leading edge ramp signal reaches the compensation signal; 
 providing a first end trigger signal when a first trailing edge ramp signal reaches the compensation signal; 
 initiating ramping of said the trailing edge ramp signal when the first start trigger signal is provided; 
 initiating each pulse on a first pulse-width modulation (PWM) signal when the first start trigger signal is provided and terminating each pulse on the first PWM signal when the first end trigger signal is provided. 
 
     
     
       18. The method of  claim 17 , wherein said adjusting the slope of the first leading edge ramp signal based on the adjust signal comprises increasing the slope in response to an increase of the compensation signal and decreasing the slope in response to a decrease of the compensation signal. 
     
     
       19. The method of  claim 17 , wherein said adjusting the slope of the first leading edge ramp signal based on the adjust signal comprises changing the slope in response to changes of the compensation signal while preventing the slope from falling below a predetermined minimum level. 
     
     
       20. The method of  claim 17 , further comprising:
 said providing a repetitive first leading edge ramp signal comprising providing N repetitive leading edge ramp signals each having the slope at the nominal level when the compensation signal is steady state, wherein N is a positive integer greater than one; 
 ramping each of the leading edge ramp signals within a voltage range from a first voltage to a second voltage; 
 resetting each of the N leading edge ramp signals back to the first voltage after reaching the second voltage in round-robin order and separated by 1/Nth of the voltage range; 
 said adjusting comprising adjusting the slope of each of the N leading edge ramp signals based on the adjust signal; 
 said providing a first start trigger signal comprising providing one of N start trigger signals when a corresponding one of the N leading edge ramp signals reaches the compensation signal and providing one of N end trigger signals when a corresponding one of N trailing edge ramp signals reaches the compensation signal; 
 said initiating ramping comprising initiating ramping one of the N trailing edge ramp signals when a corresponding one of the N start trigger signals is provided; 
 said initiating each pulse comprising initiating each pulse on a corresponding one of N PWM signals when a corresponding one of the N start trigger signals is provided and terminating each pulse on the corresponding PWM signal when a corresponding one of the N end trigger signals is provided; and 
 pausing each of the N leading edge ramp signals when any one of the N PWM signals is not provided between successive resets of a corresponding one of the N leading edge ramp signals. 
 
     
     
       21. The method of  claim 20 , further comprising resuming ramping of each of the N leading edge ramp signals when the compensation signal rises to a predetermined minimum level. 
     
     
       22. The method of  claim 21 , further comprising maintaining the round-robin ordering. 
     
     
       23. An adaptive pulse positioning modulator, comprising:
 a sense circuit that provides a compensation signal indicative of output voltage error;   a filter circuit having an input receiving said compensation signal and an output providing an adjust signal that changes in response to output load transients;   a leading ramp circuit that provides a repetitive leading edge ramp signal that has a slope with a nominal level used to develop a pulse-width modulation (PWM) signal at a steady state frequency level, and that adjusts said slope of said leading edge ramp signal based on said adjust signal to change a frequency level of said PWM signal in response to said output load transients; and   a comparator circuit that compares said leading edge ramp signal with said compensation signal for initiating pulses on said PWM signal, and that compares a trailing edge ramp signal with said compensation signal for terminating said pulses.   
     
     
       24. The adaptive pulse positioning modulator of claim 23, wherein said leading ramp circuit increases said slope of said leading edge ramp signal to increase said frequency level of said PWM signal in response to an increase of output load, and wherein said leading ramp circuit decreases said slope of said leading edge ramp signal to decrease said frequency level of said PWM signal in response to a decrease of output load. 
     
     
       25. An adaptive pulse positioning multiphase modulator, comprising:
 a sense circuit that provides a compensation signal indicative of output voltage error;   a filter circuit having an input receiving said compensation signal and an output providing an adjust signal that changes in response to output load transients;   a dual ramp circuit that develops a plurality of synchronized leading edge ramp signals for a corresponding plurality of phases, wherein said plurality of synchronized leading edge ramp signals each have a common slope having a nominal level for developing an operating frequency at a steady state level, and wherein said dual ramp circuit adjusts said common slope of each of said plurality of synchronized leading edge ramp signals based on said adjust signal to change said operation frequency in response to said output load transients; and   a comparator circuit that compares each of said plurality of synchronized leading edge ramp signals with said compensation signal for initiating pulses on each of a plurality of pulse-width modulation (PWM) signals, and that compares said compensation signal with each of a plurality of trailing edge ramp signals for terminating said pulses of said plurality of PWM signals.   
     
     
       26. The adaptive pulse positioning multiphase modulator of claim 25, further comprising wait logic that temporarily pauses each of said plurality of synchronized leading edge ramp signals when a pulse does not occur on any one of said plurality of PWM signals during an entire cycle of a corresponding one of said plurality of synchronized leading edge ramp signals.