Nonvolatile memory devices, channel boosting methods thereof, programming methods thereof, and memory systems including the same

Abstract

Non-volatile memory device channel boosting methods in which at least two strings are connected to one bit line, the channel boosting methods including applying an initial channel voltage to channels of strings in a selected memory block, floating inhibit strings each having an un-programmed cell among the strings, and boosting channels of the floated inhibit strings.

What is claimed is: 
     
       1. A channel boosting method of a non-volatile memory device in which at least two strings are connected to one bit line, the channel boosting method comprising:
 applying an initial channel voltage to channels of strings in a selected memory block to match initial channel voltages of inhibit strings of the strings in the selected memory block; 
 floating the inhibit strings of the strings in the selected memory block; 
 boosting channel voltages of the floated inhibit strings; and 
 shutting off program strings of the strings in the selected memory block to float the program strings, wherein 
 at least a portion of two channels in each of the strings in the selected memory block is are connected vertically between a corresponding bit line and on a substrate. 
 
     
     
       2. The channel boosting method of  claim 1 , wherein the applying an initial channel voltage includes applying a bit line program voltage to the channels. 
     
     
       3. The channel boosting method of  claim 1 , wherein the applying an initial channel voltage includes applying a bit line program-inhibit voltage to the channels. 
     
     
       4. A channel boosting method of a non-volatile memory device in which at least two strings are connected to one bit line, the channel boosting method comprising:
 applying an initial channel voltage to channels of strings in a selected memory block to match initial channel voltages of inhibit strings of the string in the selected memory block; 
 floating the inhibit strings of the strings in the selected memory block; and 
 boosting channel voltages of the floated inhibit strings, wherein
 at least a portion of two channels in each of the strings in the selected memory block is are connected vertically between a corresponding bit line and on a substrate, and 
 the floating inhibit strings includes shutting off a first plurality of the inhibit strings corresponding to selected bit lines to float the first plurality of inhibit strings, and electrically isolating a second plurality of the inhibit strings corresponding to unselected bit lines to float the second plurality of inhibit strings. 
 
 
     
     
       5. The channel boosting method of  claim 4 , wherein the applying an initial channel voltage includes applying a bit line program voltage to the channels. 
     
     
       6. The channel boosting method of  claim 4 , wherein the applying an initial channel voltage includes applying a bit line program-inhibit voltage to the channels. 
     
     
       7. A channel boosting method of a non-volatile memory device in which at least two strings are connected to one bit line, the channel boosting method comprising:
 applying an initial channel voltage to channels of strings in a selected memory block to match initial channel voltages of inhibition strings of the strings in the selected memory block; 
 floating inhibit strings of the strings in the selected memory block; and 
 boosting channel voltages of the floated inhibit strings, wherein
 at least a portion of two memory cells in each of the strings in the selected memory block is are connected vertically between a corresponding bit line and on a substrate, and 
 the boosting channel voltages includes applying a pass voltage to unselected word lines for a period of time, and applying the pass voltage to a selected word line during a part of the period of time. 
 
 
     
     
       8. The channel boosting method of  claim 7 , wherein the applying an initial channel voltage includes applying a bit line program-inhibit voltage to the channels. 
     
     
       9. The channel boosting method of  claim 7 , wherein the applying an initial channel voltage includes applying a bit line program voltage to the channels. 
     
     
       10. A method of operating a nonvolatile memory device including a plurality of memory strings that include a first memory string and a second memory string, each of the plurality of memory strings including a plurality of nonvolatile memory cells, the method comprising:
 applying initial channel voltages to channels of the first memory string and the second memory string to match initial channel voltages of inhibit strings of the strings in the selected memory block;   floating the channels of the first memory string and the second memory string; and   boosting the channels of the first memory string and the second memory string, wherein   the first memory string and the second memory string are connected to a first bit-line,   the plurality of nonvolatile memory cells are stacked on or above a substrate at a direction that is vertical to the substrate, and   at least one memory cell of each of the plurality of memory strings is connected to a first word-line.   
     
     
       11. The method of claim 10, wherein the applying the initial channel voltages to the channels of the first memory string and the second memory string includes:
 applying a first voltage to a first string selection line and a second string selection line to electrically connect the first bit-line to the first memory string and the second memory string, the first string selection line being connected to a first string selection transistor included in the first memory string, the second string selection line being connected to a second string selection transistor included in the second memory string; and   applying a program-inhibit voltage to the first bit-line to shut off the first memory string and the second memory string from the first bit-line, the first memory string and the second memory string having the initial channel voltages.   
     
     
       12. The method of claim 11, wherein the floating the channels of the first memory string and the second memory string includes applying a ground voltage to the second string selection line to electrically block the second memory string from the first bit-line. 
     
     
       13. The method of claim 12, wherein the boosting the channels of the first memory string and the second memory string includes
 applying a pass voltage to the first word-line,
 the first voltage is applied to the first string selection line during the applying the pass voltage to the first word-line, and 
 the program-inhibit voltage is applied to the first bit-line during the applying the pass voltage to the first word-line. 
   
     
     
       14. The method of claim 13, wherein the program-inhibit voltage is a power supply voltage. 
     
     
       15. The method of claim 14, wherein the first voltage is the power supply voltage. 
     
     
       16. The method of claim 15, wherein the plurality of memory strings further includes a third memory string and a fourth memory string that are connected to a second bit-line,
 the third memory string includes a third plurality of nonvolatile memory cells and a third string selection transistor that is connected to the first string selection line,   the fourth memory string includes a fourth plurality of nonvolatile memory cells and a fourth string selection transistor that is connected to the second string selection line, and   one of the third plurality of nonvolatile memory cells and one of the fourth plurality of nonvolatile memory cells are connected to the first word-line.   
     
     
       17. The method of claim 16, wherein the applying the initial channel voltages to the channels of the third memory string and the fourth memory string includes applying the power supply voltage to the second bit-line, and
 the ground voltage is applied to the second bit-line during the applying the pass voltage to the first word-line.   
     
     
       18. The method of claim 17, wherein the first memory string includes a first ground selection transistor, the second memory string includes a second ground selection transistor, the third memory string includes a third ground selection transistor and the fourth memory string includes a fourth ground selection transistor, and
 the first, second, third and fourth ground selection transistors are connected to a ground selection line.   
     
     
       19. A channel boosting method of a non-volatile memory device in which at least two strings are connected to one bit line, the channel boosting method comprising:
 applying an initial channel voltage to channels of strings in a selected memory block to match initial channel voltages of inhibit strings of the strings in the selected memory block;   floating at least one inhibit string of the inhibit strings in the selected memory block;   boosting at least one channel voltage of the floated at least one inhibit string; and   shutting off program strings of the strings in the selected memory block to float the program strings, wherein   at least two channels in each of the strings in the selected memory block are connected vertically on a substrate.