USRE47208EActiveUtility

Manufacturing method of solid-state image sensor

72
Assignee: CONVERSANT INTELLECTUAL PROPERTY MAN INCPriority: Mar 18, 2009Filed: Apr 28, 2017Granted: Jan 15, 2019
Est. expiryMar 18, 2029(~2.7 yrs left)· nominal 20-yr term from priority
Inventors:Akira Tsukamoto
H01L 31/1892H01L 31/18H01L 27/14689H10F 71/139H10F 71/00H10F 39/199H10F 39/026H10F 39/18H10F 39/12H10F 39/014Y10S438/977
72
PatentIndex Score
1
Cited by
45
References
6
Claims

Abstract

A single crystal silicon layer is formed on a principal surface of a first wafer by epitaxial growth. A silicon oxide layer is formed on the single crystal silicon layer. Next, a defect layer is formed inside the single crystal silicon layer by ion implantation, and then, the second wafer is bonded to the silicon oxide layer on the first wafer. After that, an SOI wafer including the silicon oxide layer formed on the second wafer and the single crystal silicon layer formed on the silicon oxide layer is formed by separating the first wafer including the single crystal silicon layer from the second wafer including the single crystal silicon layer in the defect layer. Then, a photodiode is formed in the single crystal silicon layer. An interconnect layer is formed on a surface of the single crystal silicon layer which is opposite to the silicon oxide layer.

Claims

exact text as granted — not AI-modified
What is claimed is: 
     
       1. A manufacturing method of a solid-state image sensor comprising:
 forming a first single crystal silicon layer having a first impurity concentration on a principal surface of a first wafer by epitaxial growth; 
 forming a silicon oxide layer on the first single crystal silicon layer; 
 forming a defect layer inside the first single crystal silicon layer by ion implantation; 
 bonding a second wafer to the silicon oxide layer on the first wafer to form a combined wafer; 
 formingseparating the combination wafer at the defect layer to form an SOI wafer including the silicon oxide layer that was formed on the second wafer and a portion of the first single crystal silicon layer that was formed on the silicon oxide layer by separating the first wafer including the first single crystal silicon layer from the second wafer including the first single crystal silicon layer in the defect layer; 
 forming a second single crystal silicon layer having a second impurity concentration on the portion of the first single crystal silicon layer by epitaxial growth; 
 forming a photodiode in the first single crystal silicon layer or the second single crystal silicon layer; and 
 forming an interconnect layer including a photodiode charge read-out structure on a surface of the second single crystal silicon layer which is opposite to the first single crystal silicon layer. 
 
     
     
       2. The method of  claim 1 , further comprising
 after forming the interconnect layer, selectively etching part of or the entire etching the second wafer with respect to the silicon oxide layer, wherein 
 in forming the photodiode, the light-receiving section of the photodiode is formed to face the silicon oxide layer. 
 
     
     
       3. A manufacturing method of a solid-state image sensor comprising:
 forming a first single crystal silicon layer having a first impurity concentration of 1×10 17  cm −3  or more on a principal surface of a first wafer by epitaxial growth; 
 forming a silicon oxide layer on the first single crystal silicon layer; 
 forming a defect layer inside the first single crystal silicon layer by ion implantation; 
 bonding a second wafer to the silicon oxide layer on the first wafer to form a combined wafer; 
 formingseparating the combination wafer at the defect layer to form an SOI wafer including the silicon oxide layer that was formed on the second wafer and a portion of the first single crystal silicon layer that was formed on the silicon oxide layer by separating the first wafer including the first single crystal silicon layer from the second wafer including the first single crystal silicon layer in the defect layer; 
 forming a second single crystal silicon layer on the portion of the first single crystal silicon layer by epitaxial growth, the second single crystal silicon layer having a second impurity concentration lower than the first impurity concentration than the first single crystal silicon layer on the first single crystal silicon layer by epitaxial growth; 
 forming a photodiode in the second single crystal silicon layer so that a light-receiving section faces the silicon oxide layer; 
 forming an interconnect layer including a photodiode charge read-out structure on a surface of the second single crystal silicon layer which is opposite to the first single crystal silicon layer; and 
 selectively etching part of or the entireetching the second wafer with respect to the silicon oxide layer. 
 
     
     
       4. The method of  claim 3 , wherein
 the first single crystal silicon layer is of a first conductivity type, 
 the second single crystal silicon layer is of a second conductivity type, and 
 the photodiode is of the second conductivity type. 
 
     
     
       5. The method of  claim 3 , wherein
 the first single crystal silicon layer is of a first conductivity type, 
 the second single crystal silicon layer is of a second conductivity type, 
 the forming of the photodiode includes forming a well of the first conductivity type in the second single crystal silicon layer, and 
 the photodiode is of the second conductivity type, and is formed in the well. 
 
     
     
       6. A manufacturing method of a solid-state image sensor comprising:
 forming a first single crystal silicon layer having an impurity concentration on a principal surface of a first wafer by epitaxial growth;   forming a silicon oxide layer on the first single crystal silicon layer;   forming a defect layer inside the first single crystal silicon layer by ion implantation;   bonding a second wafer to the silicon oxide layer on the first wafer to form a combined wafer;   separating the combination wafer at the defect layer to form an SOI wafer including the silicon oxide layer that was formed on the second wafer and a portion of the first single crystal silicon layer that was formed on the silicon oxide layer;   forming a well of a first conductivity type in the portion of the first single crystal silicon layer;   forming a photodiode of a second conductivity type in the well of the first conductivity type so that a light-receiving section faces the silicon oxide layer;   forming an interconnect layer including a photodiode charge read-out structure on a surface of the first single crystal silicon layer which is opposite to the first single crystal silicon layer; and   etching the second wafer with respect to the silicon oxide layer.

Cited by (0)

No later patents cite this yet.

References (0)

No backward citations on record.