USRE47390EActiveUtility

Semiconductor device with a protection diode

54
Assignee: TOSHIBA KKPriority: Jun 24, 2009Filed: Sep 10, 2014Granted: May 14, 2019
Est. expiryJun 24, 2029(~3 yrs left)· nominal 20-yr term from priority
Inventors:Tetsuro Nozu
H01L 29/861H01L 27/0255H10D 8/20H10D 8/00H10D 89/611
54
PatentIndex Score
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Cited by
14
References
23
Claims

Abstract

According to one embodiment, a semiconductor device includes a semiconductor substrate, a semiconductor region, a first and second electrodes. The semiconductor region is provided on the semiconductor substrate via an insulating film. The semiconductor region includes a protection diode. An overvoltage causes breakdown of the protection diode. A PN junction of the protection diode is exposed at an end face of the semiconductor region. A first and second electrodes are provided distally to the exposed end face of the PN junction. The first and second electrodes are connected to the semiconductor region to provide a current to the protection diode.

Claims

exact text as granted — not AI-modified
The invention claimed is: 
     
       1. A semiconductor device, comprising:
 a semiconductor region provided on a semiconductor substrate via an insulating film, the semiconductor region having a first surface and an end face that intersects the first surface, the semiconductor region including a protection diode, a PN junction of the protection diode being exposed at the end face; and 
 first and second electrodes connected to the semiconductor region to provide a current to the protection diode, the first electrode contacting the first surface and having a first end proximate to the end face, and the second electrode contacting the first surface and having a second end proximate to the end face, wherein 
 a first distance along the first surface from the first end of the first electrode to the end face is not less than a spacing between the first and second electrodes at the first surface, and a second distance along the first surface from the second end of the second electrode to the end face is 
 a PN junction of the protection diode being exposed at an end face of the semiconductor region, 
 the first and second electrodes being provided distally to the exposed end face of the PN junction, and 
 a distance from each of the first and second electrodes to the end face of the exposed PN junction being not less than a the spacing between the first and second electrodes at the first surface. 
 
     
     
       2. The semiconductor device according to  claim 1 , wherein a planar configuration of the semiconductor region has a bent portion. 
     
     
       3. The semiconductor device according to  claim 1 , further comprising
 an electrode pad provided on the semiconductor substrate via the insulating film, 
 the semiconductor region being provided in a periphery of the electrode pad. 
 
     
     
       4. The semiconductor device according to  claim 3 , wherein an end portion of each of the first end of the first electrode and the second end of the second electrodes electrode has a curvature relaxation portion. 
     
     
       5. The semiconductor device according to  claim 1 , wherein an end portion of each of the first end of the first electrode and the second end of second electrodes electrode has a curvature relaxation portion. 
     
     
       6. The semiconductor device according to  claim 5 , wherein a planar configuration of the curvature relaxation portion is a curved configuration. 
     
     
       7. The semiconductor device according to  claim 5 , wherein a planar configuration of the curvature relaxation portion is an arc-like configuration. 
     
     
       8. The semiconductor device according to  claim 1 , further comprising
 a transistor provided on the semiconductor substrate, 
 the semiconductor region being provided in a periphery of the transistor. 
 
     
     
       9. The semiconductor device according to  claim 8 , further comprising
 an electrode pad provided on the semiconductor substrate via the insulating film, 
 the semiconductor region being provided in a periphery of the electrode pad. 
 
     
     
       10. The semiconductor device according to  claim 8 , wherein a planar configuration of the semiconductor region has a bent portion. 
     
     
       11. The semiconductor device according to  claim 8 , wherein an end portion of each of the first end of the first electrode and the second end of the second electrodes electrode has a curvature relaxation portion. 
     
     
       12. The semiconductor device according to  claim 11 , wherein a planar configuration of the curvature relaxation portion is a curved configuration. 
     
     
       13. The semiconductor device according to  claim 11 , wherein a planar configuration of the curvature relaxation portion is an arc-like configuration. 
     
     
       14. A semiconductor device, comprising:
 a semiconductor substrate having an outer edge;   a semiconductor region disposed on the semiconductor substrate via an insulating film, the semiconductor region extending in a first direction along the outer edge, wherein the semiconductor region includes first semiconductor portions of a first conductivity type each extending in the first direction to an end face of the semiconductor region and a second semiconductor portion of a second conductivity type extending in the first direction to the end face of the semiconductor region, the first semiconductor portions being spaced from each other in a second direction that is perpendicular to the first direction, and the second semiconductor portion being disposed between an adjacent pair of the first semiconductor portions, wherein the second semiconductor portion has a width in the second direction that is wider than a thickness of the semiconductor region in a direction orthogonal to the semiconductor substrate;   a first electrode provided contacting a first surface of the semiconductor region on a first outermost one of the first semiconductor portions along the second direction, the first electrode having a first end proximate to the end face of the semiconductor region, and the first outermost one of the first semiconductor portions having a width in the second direction that is wider than the width of the second semiconductor portion; and   a second electrode provided contacting the first surface of the semiconductor region on a second outermost one of the first semiconductor portions along the second direction, the second electrode having a second end proximate to the end face of the semiconductor region, any other first semiconductor portions being between, in the second direction, the first and second outermost ones of the first semiconductor portions, and the second outermost one of first semiconductor portions having a width in the second direction that is wider than the width of the second semiconductor portion, wherein   a first distance is along the first surface from the first end of the first electrode to the end face and a second distance is from the second end of the second electrode to the end face, and the first distance and the second distance are each not less than a spacing distance at the first surface from the first electrode to the second electrode.   
     
     
       15. The semiconductor device according to claim 14, wherein the semiconductor region has at least one first semiconductor portion between the first and second outermost ones of the first semiconductor portions. 
     
     
       16. The semiconductor device according to claim 14, wherein the semiconductor substrate has a rectangular planar shape having a first outer edge opposite a second outer edge, and a pair of semiconductor regions are provided on the semiconductor substrate such that one of the pair of semiconductor regions is disposed along the first outer edge and the other of the pair of semiconductor regions is disposed along the second outer edge. 
     
     
       17. The semiconductor device according to claim 14, wherein the semiconductor substrate has a rectangular shape having a first outer edge intersecting a second outer edge, and a pair of semiconductor regions are provided on the semiconductor substrate such that one of the pair of semiconductor regions is disposed along the first outer edge and the other of the pair of semiconductor regions is disposed along the second outer edge. 
     
     
       18. The semiconductor device according to claim 14, wherein the semiconductor region has a first end and a second end in the first direction, and a distance along the first direction from each of the first and second electrodes to the first and second ends of the semiconductor region is not less than a spacing between the first and second electrodes in the second direction. 
     
     
       19. The semiconductor device according to claim 14, further comprising
 a transistor on the semiconductor substrate, wherein   the semiconductor region is between the transistor and the outer edge of the semiconductor substrate.   
     
     
       20. The semiconductor device according to claim 14, further comprising:
 an electrode pad on the semiconductor substrate via the insulating film, wherein   the semiconductor region is between the electrode pad and the outer edge of the semiconductor substrate.   
     
     
       21. The semiconductor device according to claim 14, wherein each of the first end of the first electrode and the second end of second electrode have a curvature relaxation portion. 
     
     
       22. The semiconductor device according to claim 14, wherein each of the first semiconductor portions and the second semiconductor portion has a width equal to or larger than 2 micrometer in the second direction. 
     
     
       23. The semiconductor device according to claim 14, further comprising an insulating film covering the semiconductor region.

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