Liquid crystal display

Abstract

A liquid crystal display includes first and second gate lines and first and second data lines, on a first substrate, a first thin film transistor connected to the first gate and data lines and including a first source and drain electrode, a second thin film transistor connected to the second gate and data lines and including a second source and drain electrode, first and second pixel electrodes contacting a portion of the first and second drain electrodes, respectively, a passivation layer on the first and second pixel electrodes and the first and second thin film transistors, and a reference electrode on a passivation layer and overlapping the first pixel electrode and the second pixel electrode. The reference electrode includes a plurality of branch electrodes. The first thin film transistor is right of the first data line and the second thin film transistor is left of the second data line.

What is claimed is: 
     
       1. A liquid crystal display, comprising:
 a first substrate, 
 a first gate line, a second gate line, a first data line, and a second data line, and a reference voltage line on the first substrate; 
 a first thin film transistor connected to the first gate line and the first data line, and including a first gate electrode, a first source electrode, a first drain electrode, and a first semiconductor; 
 a second thin film transistor connected to the second gate line and the second data line, and including a second gate electrode, a second source electrode, a second drain electrode, and a second semiconductor; 
 a first pixel electrode which contacts a portion of the first drain electrode, and a second pixel electrode which contacts a portion of the second drain electrode; 
 a passivation layer on the first pixel electrode, the second pixel electrode, the first thin film transistor, and the second thin film transistor; and 
 a reference electrode on the passivation layer, and overlapping the first pixel electrode and the second pixel electrode, 
 wherein the reference electrode includes a plurality of branch electrodes, 
 wherein the first thin film transistor is right of the first data line, and the second thin film transistor is left of the second data line, in a plan view of the liquid crystal display, 
 wherein the first drain electrode is formed in parallel to the first data line, and the second drain electrode is formed in parallel to the second data line, 
 wherein the first gate electrode overlaps the first semiconductor and the first data line, and 
 wherein the second gate electrode overlaps the second semiconductor and the second data line. 
 
     
     
       2. The liquid crystal display of  claim 1 , wherein:
 the first data line and the second data line each include a curved portion. 
 
     
     
       3. The liquid crystal display of  claim 2 , wherein:
 the first data line intersects with the first gate line forming a first tilt angle; and 
 the second data line intersects with the second gate line forming a second tilt angle. 
 
     
     
       4. The liquid crystal display of  claim 3 , wherein:
 the first thin film transistor is between the first gate line and the first data line forming the first tilt angle; and 
 the second thin film transistor is between the second gate line and the second data line forming the second tilt angle, 
 both of the first tilt angle and the second tilt angle being an acute angle. 
 
     
     
       5. The liquid crystal display of  claim 4 , wherein:
 the first thin film transistor is in a first pixel area of the liquid crystal display, and the second thin film transistor is in a second pixel area of the liquid crystal display, and 
 the first pixel area and the second pixel area are adjacent to each other in a first direction. 
 
     
     
       6. The liquid crystal display of  claim 5 , wherein:
 the first pixel area and the second pixel area are alternately disposed in the first direction. 
 
     
     
       7. The liquid crystal display of  claim 6 , wherein:
 a first unit in which the first pixel area is repeated at least twice, and a second unit in which the second pixel area is repeated at feast twice, are alternately disposed in the first direction. 
 
     
     
       8. The liquid crystal display of  claim 3 , wherein:
 the first thin film transistor is between the first gate line and the first data line forming the first tilt angle; and 
 the second thin film transistor is between the second gate line and the second data line forming the second tilt angle, 
 the first tilt angle being an obtuse angle and the second tilt angle being an acute angle. 
 
     
     
       9. The liquid crystal display of  claim 8 , wherein:
 the first thin film transistor is in a first pixel area of the liquid crystal display, and the second thin film transistor is in a second pixel area of the liquid crystal display, and 
 the first pixel area and the second pixel area are adjacent to each other in a first direction. 
 
     
     
       10. The liquid crystal display of  claim 9 , wherein:
 the first pixel area and the second pixel area are alternately disposed in the first direction. 
 
     
     
       11. The liquid crystal display of  claim 10 , wherein:
 a first unit in which the first pixel area is repeated at least twice, and a second unit in which the second pixel area is repeated at least twice, are alternately disposed in the first direction. 
 
     
     
       12. The liquid crystal display of  claim 2 , wherein:
 the plurality of branch electrodes of the reference electrode extend parallel to the first data line and the second data line. 
 
     
     
       13. The liquid crystal display of  claim 12 , wherein:
 the reference electrode further includes: 
 horizontal connection units which connect the branch electrodes to each other, and 
 vertical connection units which connect the horizontal connection units to each other, 
 the vertical connection units overlapping with at least one of the first data line and the second data line. 
 
     
     
       14. The liquid crystal display of  claim 1 , wherein:
 the reference electrode includes an opening unit exposing the first thin film transistor and a portion of the first data line, or exposing the second thin film transistor and a portion of the second data line. 
 
     
     
       15. The liquid crystal display of  claim 1 , wherein:
 the reference voltage line comprises a connection unit contacting the reference electrode through the contact hole and extended from the reference voltage line. 
 
     
     
       16. The liquid crystal display of  claim 15 , wherein:
 an array of the connection unit in pixel areas of the liquid crystal display, are alternately disposed at the left and right of the first data line or the second data line, respectively. 
 
     
     
       17. The liquid crystal display of  claim 15 , wherein:
 the reference voltage line is at a central portion of a pixel area of the liquid crystal display. 
 
     
     
       18. The liquid crystal display of  claim 17 , wherein:
 the reference electrode comprises a reference electrode extending portion extending to the connection unit of the reference voltage line, 
 the first pixel electrode or the second pixel electrode does not overlap contact portions in which the connection unit of the reference voltage line and the reference electrode extending portion contact. 
 
     
     
       19. The liquid crystal display of  claim 15 , wherein:
 reference electrodes in pixel areas adjacent to each other, are connected to each other. 
 
     
     
       20. The liquid crystal display of  claim 1 , wherein:
 the first source electrode is a portion of the first data line, and the second source electrode is a portion of second data line, the first and second data lines being single unitary indivisible members, and 
 the first drain electrode extends parallel to the first source electrode, and the second drain electrode extends parallel to the second source electrode. 
 
     
     
       21. The liquid crystal display of  claim 1 , further comprising:
 a reference voltage line on the first substrate, 
 wherein the reference voltage contacts the reference electrode through a contact hole extending through the passivation layer, and 
 the reference voltage line is adjacent to the first gate line or the second gate line. 
 
     
     
       22. The liquid crystal display of  claim 1 , wherein:
 the first pixel electrode overlaps a portion of the first drain electrode and is connected to the first drain electrode, and 
 the second pixel electrode overlaps a portion of the second drain electrode and is connected to the second drain electrode. 
 
     
     
       23. The liquid crystal display of  claim 1 , further comprising:
 a second substrate opposite to the first substrate; and 
 a liquid crystal layer between the first substrate and the second substrate, and having positive dielectric anisotropy. 
 
     
     
       24. A liquid crystal display, comprising:
 a first substrate, 
 a first gate line, a second gate line, a first data line, and a second data line, and a reference voltage line on the first substrate; 
 a first thin film transistor connected to the first gate line and the first data line, and including a first gate electrode, a first source electrode, a first drain electrode, and a first semiconductor; 
 a second thin film transistor connected to the second gate line and the second data line, and including a second gate electrode, a second source electrode, a second drain electrode, and a second semiconductor; 
 a first pixel electrode which contacts a portion of the first drain electrode, and a second pixel electrode which contacts a portion of the second drain electrode; 
 a passivation layer on the first pixel electrode, the second pixel electrode, the first thin film transistor, and the second thin film transistor; and 
 a reference electrode on the passivation layer, and overlapping the first pixel electrode and the second pixel electrode, 
 wherein the reference electrode includes a plurality of branch electrodes, 
 wherein the first thin film transistor is right of the first data line, and the second thin film transistor is left of the second data line, in a plan view of the liquid crystal display, 
 the first drain electrode directly contacts the first pixel electrode, and the second drain electrode directly contacts the second pixel electrode, 
 wherein the first gate electrode overlaps the first semiconductor and the first data line, and 
 wherein the second gate electrode overlaps the second semiconductor and the second data line. 
 
     
     
       25. The liquid crystal display of  claim 24 , wherein:
 the first data line and the second data line each include a curved portion. 
 
     
     
       26. The liquid crystal display of  claim 25 , wherein:
 the first data line intersects with the first gate line forming a first tilt angle; and 
 the second data line intersects with the second gate line forming a second tilt angle. 
 
     
     
       27. The liquid crystal display of  claim 26 , wherein:
 the first thin film transistor is between the first gate line and the first data line forming the first tilt angle; and 
 the second thin film transistor is between the second gate line and the second data line funning the second tilt angle, 
 both of the first tilt angle and the second tilt angle being an acute angle. 
 
     
     
       28. The liquid crystal display of  claim 27 , wherein:
 the first thin film transistor is in a first pixel area of the liquid crystal display, and the second thin film transistor is in a second pixel area of the liquid crystal display, and 
 the first pixel area and the second pixel area are adjacent to each other in a first direction. 
 
     
     
       29. The liquid crystal display of  claim 28 , wherein:
 the first pixel area and the second pixel area are alternately disposed in the first direction. 
 
     
     
       30. The liquid crystal display of  claim 29 , wherein:
 a first unit in which the first pixel area is repeated at least twice, and a second unit in which the second pixel area is repeated at least twice, are alternately disposed in the first direction. 
 
     
     
       31. The liquid crystal display of  claim 26 , wherein:
 the first thin film transistor is between the first gate line and the first data line forming the first tilt angle; and 
 the second thin film transistor is between the second gate line and the second data line forming the second tilt angle, 
 the first tilt angle being an obtuse angle and the second tilt angle being an acute angle. 
 
     
     
       32. The liquid crystal display of  claim 31 , wherein:
 the first thin film transistor is in a first pixel area of the liquid crystal display, and the second thin film transistor is in a second pixel area of the liquid crystal display, and 
 the first pixel area and the second pixel area are adjacent to each other in a first direction. 
 
     
     
       33. The liquid crystal display of  claim 32 , wherein:
 the first pixel area and the second pixel area are alternately disposed in the first direction. 
 
     
     
       34. The liquid crystal display of  claim 33 , wherein:
 a first unit in which the first pixel area is repeated at least twice, and a second unit in which the second pixel area is repeated at least twice, are alternately disposed in the first direction. 
 
     
     
       35. The liquid crystal display of  claim 25 , wherein:
 the plurality of branch electrodes of the reference electrode extend parallel to the first data line and the second data line. 
 
     
     
       36. The liquid crystal display of  claim 35 , wherein:
 the reference electrode further includes: 
 horizontal connection units which connect the branch electrodes to each other, and 
 vertical connection units which connect the horizontal connection units to each other, 
 the vertical connection units overlapping with at least one of the first data line and the second data line. 
 
     
     
       37. The liquid crystal display of  claim 24 , wherein:
 the reference electrode includes an opening unit exposing the first thin film transistor and a portion of the first data line, or exposing the second thin film transistor and a portion of the second data line. 
 
     
     
       38. The liquid crystal display of  claim 24 , wherein:
 the reference voltage line comprises a connection unit contacting the reference electrode through the contact hole and extended from the reference voltage line. 
 
     
     
       39. The liquid crystal display of  claim 38 , wherein:
 an array of the connection unit in pixel areas of the liquid crystal display, are alternately disposed at the left and right of the first data line or the second data line, respectively. 
 
     
     
       40. The liquid crystal display of  claim 38 , wherein:
 the reference voltage line is at a central portion of a pixel area of the liquid crystal display. 
 
     
     
       41. The liquid crystal display of  claim 40 , wherein:
 the reference electrode comprises a reference electrode extending portion extending to the connection unit of the reference voltage line, 
 the first pixel electrode or the second pixel electrode does not overlap contact portions in which the connection unit of the reference voltage line and the reference electrode extending portion contact. 
 
     
     
       42. The liquid crystal display of  claim 38 , wherein:
 reference electrodes in pixel areas adjacent to each other, are connected to each other. 
 
     
     
       43. The liquid crystal display of  claim 24 , wherein:
 the first source electrode is a portion of the first data line, and the second source electrode is a portion of the second data line, the first and second data lines being single unitary indivisible members, and 
 the first drain electrode extends parallel to the first source electrode, and the second drain electrode extends parallel to the second source electrode. 
 
     
     
       44. The liquid crystal display of  claim 24 , further comprising:
 a reference voltage line on the first substrate, 
 wherein the reference voltage contacts the reference electrode through a contact hole extending through the passivation layer, and 
 the reference voltage line is adjacent to the first gate line or the second gate line. 
 
     
     
       45. The liquid crystal display of  claim 24 , wherein:
 the first pixel electrode overlaps a portion of the first drain electrode and is connected to the first drain electrode, and 
 the second pixel electrode overlaps a portion of the second drain electrode and is connected to the second drain electrode. 
 
     
     
       46. The liquid crystal display of  claim 24 , further comprising:
 a second substrate opposite to the first substrate; and 
 a liquid crystal layer between the first substrate and the second substrate, and having positive dielectric anisotropy. 
 
     
     
       47. A liquid crystal display, comprising:
 a first substrate;   a first gate line and a second gate line adjacent to each other and extending in a first direction, and a first data line and a second data line adjacent to each other on the first substrate;   a first thin film transistor connected to the first gate line and the first data line, and including a first gate electrode, a first source electrode, a first drain electrode, and a first semiconductor;   a second thin film transistor connected to the second gate line and the second data line, and including a second gate electrode, a second source electrode, a second drain electrode, and a second semiconductor;   a first pixel electrode contacting a portion of the first drain electrode and a second pixel electrode contacting a portion of the second drain electrode; and   a reference electrode overlapping the first pixel electrode and the second pixel electrode on the first substrate,   wherein the first thin film transistor and the second thin film transistor are disposed between the first data line and the second data line adjacent to each other,   wherein the first semiconductor overlaps the first data line, and   wherein the second semiconductor overlaps the second data line.   
     
     
       48. The liquid crystal display of claim 47, further comprising:
 a first reference voltage line and a second reference voltage line adjacent to each other on the first substrate; and   a passivation layer between the reference electrode and the first pixel electrode and the second pixel electrode on the first substrate, and   wherein the first reference voltage line includes a first connection portion adjacent to the first thin film transistor and the second reference voltage line includes a second connection portion adjacent to the second thin film transistor,   wherein the first connection portion and the second connection portion are disposed between the first data line and the second data line,   wherein the first pixel electrode and the second pixel electrode are disposed between the first data line and the second data line, and   wherein the reference electrode contacts the first reference voltage line through the first connection portion and the second connection portion.   
     
     
       49. The liquid crystal display of claim 48,
 wherein a first distance being a shortest distance between the first data line and the first connection portion in the first direction is different from a second distance being a shortest distance between the second data line and the second connection portion in the first direction.   
     
     
       50. The liquid crystal display of claim 48,
 wherein the first connection portion is extended from the first reference voltage line and the second connection portion is extended from the second reference voltage line.   
     
     
       51. The liquid crystal display of claim 47,
 wherein the first drain electrode and the second drain electrode are disposed between the first data line and the second data line.   
     
     
       52. The liquid crystal display of claim 47,
 wherein the reference electrode includes a plurality of branch electrodes.   
     
     
       53. The liquid crystal display of claim 47,
 wherein the first data line and the second data line each include a curved portion, respectively, and   wherein the plurality of branch electrodes of the reference electrode extend substantially parallel to the first data line and the second data line.   
     
     
       54. The liquid crystal display of claim 53,
 wherein the first data line intersects with the first gate line forming a first tilt angle and the second data line intersects with the second gate line forming a second tilt angle.   
     
     
       55. The liquid crystal display of claim 54,
 wherein the first thin film transistor is between the first gate line and the first data line forming the first tilt angle,   wherein the second thin film transistor is between the second gate line and the second data line forming the second tilt angle, and   wherein both the first tilt angle and the second tilt angle are acute angles.   
     
     
       56. The liquid crystal display of claim 55,
 wherein the first thin film transistor is in a first pixel area of the liquid crystal display, and the second thin film transistor is in a second pixel area of the liquid crystal display, and   wherein the first pixel area and the second pixel area are adjacent to each other in a first direction.   
     
     
       57. The liquid crystal display of claim 56,
 wherein the first pixel area and the second pixel area are alternately disposed in the first direction.   
     
     
       58. The liquid crystal display of claim 57,
 wherein a first unit in which the first pixel area is repeated at least twice, and a second unit in which the second pixel area is repeated at least twice, are alternately disposed in the first direction.   
     
     
       59. The liquid crystal display of claim 48,
 wherein the first connection portion is extended from the first reference voltage line and the second connection portion is extended from the second reference voltage line.   
     
     
       60. The liquid crystal display of claim 47, further comprising:
 a second substrate opposite the first substrate; and   a liquid crystal layer between the first substrate and the second substrate, and having positive dielectric anisotropy.