Semiconductor integrated circuit

Abstract

A semiconductor integrated circuit includes: a main-interconnect to which supply voltage or reference voltage is applied; a plurality of sub-interconnects; a plurality of circuit cells configured to be connected to the plurality of sub-interconnects; a power supply switch cell configured to control, in accordance with an input control signal, connection and disconnection between the main-interconnect and the sub-interconnect to which a predetermined one of the circuit cells is connected, of the plurality of sub-interconnects; and an auxiliary interconnect configured to connect the plurality of sub-interconnects to each other.

What is claimed is: 
     
       1. A semiconductor integrated circuit, comprising:
 a plurality of circuit cells;   a plurality of sub wiring lines disposed in a first direction and individually shared by predetermined ones of the plural circuit cells, a plurality of the predetermined ones of the plural circuit cells being juxtaposed in the first direction;   a plurality of power supply switch cells for controlling connection and disconnection between individual sub wiring lines and said main wiring line in response to a control signal inputted thereto; and   an auxiliary wiring line for connecting the plural sub wiring lines to each other, the auxiliary wiring line extending in a second direction that is perpendicular to the first direction,   wherein the predetermined ones of the plural circuit cells include a first circuit cell that is located at a left side of one of the sub wiring lines and a second circuit cell that is located at a right side of said one of the sub wiring lines.   
     
     
       2. A semiconductor integrated circuit as set forth in  claim 1 , wherein said one of the power supply switch cells and said second one of the power supply switch cells are simultaneously controllable by a control signal on the control line. 
     
     
       3. A semiconductor integrated circuit as set forth in  claim 1 , wherein said first direction differs from said second direction. 
     
     
       4. A semiconductor integrated circuit as set forth in  claim 1 , wherein said first direction is perpendicular to said second direction. 
     
     
       5. A semiconductor integrated circuit as set forth in  claim 1 , wherein said main line crosses said branch lines. 
     
     
       6. A semiconductor integrated circuit as set forth in  claim 1 , wherein said control line crosses said branch lines. 
     
     
       7. A semiconductor integrated circuit as set forth in  claim 1 , wherein a portion of the interconnect layer is between said main line and said row of the power supply switch cells. 
     
     
       8. A semiconductor integrated circuit as set forth in  claim 1 , further comprising:
 a contact directly electrically connecting said main line to one of the branch lines, said one of the branch lines being directly electrically connected to said one of the power supply switch cells.   
     
     
       9. A semiconductor integrated circuit as set forth in  claim 8 , wherein said contact is between said main line and said one of the branch lines. 
     
     
       10. A semiconductor integrated circuit as set forth in  claim 8 , further comprising:
 an auxiliary line directly electrically connected to a second one of the branch lines, said auxiliary line extending along said first direction.   
     
     
       11. A semiconductor integrated circuit as set forth in  claim 10 , wherein said auxiliary line is in said upper layer. 
     
     
       12. A semiconductor integrated circuit as set forth in  claim 10 , wherein said main line is between said control line and said auxiliary line. 
     
     
       13. A semiconductor integrated circuit as set forth in  claim 10 , further comprising:
 a circuit cell directly electrically connected said one of the branch lines and another of the branch lines, said auxiliary wiring line being between said main line and said circuit cell.   
     
     
       14. A semiconductor integrated circuit as set forth in  claim 13 , wherein a threshold voltage for a transistor in one of the circuit cells is higher than a threshold voltage for a transistor in said one of the power supply switch cells. 
     
     
       15. A semiconductor integrated circuit as set forth in  claim 10 , wherein said one of the power supply switch cells is controllable to provide electrical connection and disconnection between said one of the branch lines and said second one of the branch lines. 
     
     
       16. A semiconductor integrated circuit as set forth in  claim 15 , wherein said second one of the power supply switch cells is controllable to provide electrical connection and disconnection between said one of the branch lines and a third one of the branch lines. 
     
     
       17. A semiconductor integrated circuit as set forth in  claim 1 , further comprising:
 a third one of the power supply switch cells directly electrically connected to said control line, said third one of the power supply switch cells being controllable to provide electrical connection and disconnection between said main line and another of the branch lines.   
     
     
       18. A semiconductor integrated circuit as set forth in  claim 17 , wherein said one of the power supply switch cells is between said second one of the power supply switch cells being and said third one of the power supply switch cells. 
     
     
       19. A semiconductor integrated circuit as set forth in  claim 1 , further comprising:
 a different control line extending along said first direction, a different one of the power supply switch cells being directly electrically connected to said different control line.   
     
     
       20. A semiconductor integrated circuit comprising:
 an interconnect layer of the semiconductor integrated circuit between a substrate region of the semiconductor integrated circuit and an upper layer of the semiconductor integrated circuit;   a main line in said upper layer, said main line extending along a first direction;   branch lines in said interconnect layer, said branch lines extending along a second direction;   a row of power supply switch cells in said substrate region, said row of the power supply switch cells extending along said first direction;   a control line extending along said first direction, one of the power supply switch cells and a second one of the power supply switch cells being directly electrically connected to said control line.   
     
     
       21. A semiconductor integrated circuit, comprising:
 branch lines that extend in parallel along a first direction;   a main line that extends along the first direction in parallel to the branch lines;   an auxiliary interconnect that extends along a second direction so as to cross the branch lines and the main line;   a contact that electrically connects a first one of the branch lines with the auxiliary interconnect; and   a first switch cell that is electrically connected to the main line and the first one of the branch lines,   wherein the first switch cell is controllable by a control signal to electrically disconnect the main line from the first one of the branch lines.    
     
     
       22. A semiconductor integrated circuit as set forth in claim 21, wherein the first direction differs from the second direction.  
     
     
       23. A semiconductor integrated circuit as set forth in claim 21, wherein the first direction is perpendicular to the second direction.  
     
     
       24. A semiconductor integrated circuit as set forth in claim 21, wherein the first switch cell is controllable by the control signal to electrically connect the first one of the branch lines with the main line.  
     
     
       25. A semiconductor integrated circuit as set forth in claim 21, further comprising:
 a first circuit cell that is electrically connected to the first one of the branch lines.    
     
     
       26. A semiconductor integrated circuit as set forth in claim 25, wherein a threshold voltage for a transistor in the first switch cell is higher than a threshold voltage for a transistor in the first circuit cell.  
     
     
       27. A semiconductor integrated circuit as set forth in claim 25, further comprising:
 a second switch cell that is electrically connected to the main line and a second one of the branch lines.    
     
     
       28. A semiconductor integrated circuit as set forth in claim 27, wherein the main line is between the first one of the branch lines and the second one of the branch lines.  
     
     
       29. A semiconductor integrated circuit as set forth in claim 27, wherein the second switch cell is controllable by the control signal to electrically disconnect the main line from the second one of the branch lines.  
     
     
       30. A semiconductor integrated circuit as set forth in claim 27, wherein the second switch cell is controllable by the control signal to electrically connect the second one of the branch lines with the main line.  
     
     
       31. A semiconductor integrated circuit as set forth in claim 27, further comprising:
 a second circuit cell that is electrically connected to the second one of the branch lines.    
     
     
       32. A semiconductor integrated circuit as set forth in claim 27, further comprising:
 another contact that electrically connects the second one of the branch lines with the auxiliary interconnect.    
     
     
       33. A semiconductor integrated circuit as set forth in claim 21, further comprising:
 a control line that crosses the branch lines.    
     
     
       34. A semiconductor integrated circuit as set forth in claim 33, wherein the control line is configured to supply the control signal to the first switch cell.  
     
     
       35. A semiconductor integrated circuit as set forth in claim 21, wherein the auxiliary interconnect is electrically connected to each of the branch lines.  
     
     
       36. A semiconductor integrated circuit as set forth in claim 21, wherein the auxiliary interconnect is electrically connected directly to each of the branch lines.