Semiconductor device

Abstract

In a semiconductor device including a semiconductor element and a wiring substrate on which the semiconductor element is mounted. The wiring substrate includes an insulating substrate and conductive wiring formed in the insulating substrate and electrically connected to the semiconductor element. The conductive wiring includes an underlying layer formed on the insulating substrate, a main conductive layer formed on the underlying layer, and an electrode layer covering side surfaces of the underlying layer and side surfaces and an upper surface of the main conductive layer. The underlying layer includes an adhesion layer being formed in contact with the insulating substrate and containing an alloy of Ti.

What is claimed is: 
     
       1. A semiconductor device comprising:
 a semiconductor element; and 
 a wiring substrate on which the semiconductor element is mounted, wherein the wiring substrate includes, 
 an insulating substrate, and 
 a conductive wiring disposed in the insulating substrate and electrically connected to the semiconductor element, and 
 a vertically-through conductive wiring disposed inside the insulating substrate, the vertically-through conductive wiring extending through an entire thickness direction of the insulating substrate; 
 the conductive wiring includes, 
 an underlying layer disposed on the insulating substrate, 
 a main conductive layer formed on the underlying layer, and 
 an electrode layer covering side surfaces of the underlying layer and side surfaces and an upper surface of the main conductive layer, 
 wherein the underlying layer includes an adhesion layer in contact with the insulating substrate, and an auxiliary conductive layer, wherein the adhesion layer contains an alloy of one of W and Mo, and wherein the alloy contains Ti, 
 wherein the main conductive layer and the auxiliary conductive layer contain copper metal, 
 wherein the main conductive layer is in direct contact with an upper surface of the auxiliary conductive layer, and a bottom surface of the auxiliary conductive layer that is opposite the upper surface of the auxiliary conductive layer is in direct contact with an upper surface of the adhesion layer, 
 wherein the electrode layer comprises a first plating layer and a second plating layer, 
 wherein the first plating layer and the second plating layer cover the side surfaces of the underlying layer, and the side surfaces and the upper surface of the main conductive layer, 
 wherein one side of the first plating layer is in direct contact with the side surfaces of the underlying layer and the side surfaces of the main conductive layer, 
 wherein one side of the adhesion layer directly covers an end of the vertically-through conductive wiring, 
 wherein the semiconductor element is a semiconductor light-emitting element, 
 wherein an area of the conductive wiring disposed on an upper side surface of the insulating substrate is greater than a mount area on which the semiconductor light-emitting element is mounted, and 
 wherein a filler having a white-based color is disposed by electrophoretic deposition over a portion of the conductive wiring disposed on the upper side surface of the insulating substrate, the portion being arranged outside the mount area. 
 
     
     
       2. The semiconductor device according to  claim 1 , wherein the underlying layer further includes an auxiliary conductive layer in contact with the main conductive layer. 
     
     
       3. The semiconductor device according to  claim 2 , wherein at least one of the main conductive layer and the auxiliary conductive layer comprises Cu. 
     
     
       4. The semiconductor device according to claim  2  1, wherein the main conductive layer has a thickness greater than a thickness of the auxiliary conductive layer. 
     
     
       5. The semiconductor device according to  claim 4 , wherein the thickness of the main conductive layer is 20 to 80 micrometers. 
     
     
       6. The semiconductor device according to  claim 4 , wherein the thickness of the auxiliary conductive layer is 0.1 to 3 micrometers. 
     
     
       7. The semiconductor device according to  claim 1 , wherein the main conductive layer comprises Cu. 
     
     
       8. The semiconductor device according to  claim 1 , wherein the electrode layer contains Ni or Au. 
     
     
       9. The semiconductor device according to  claim 1 , wherein the adhesion layer comprises an alloy containing 1 to 30 weight percent of Ti, the alloy including W. 
     
     
       10. A semiconductor device, comprising:
 a semiconductor element; and 
 a wiring substrate on which the semiconductor element is mounted, 
 wherein the wiring substrate includes
 an insulating substrate, 
 an upper-side conductive wiring disposed on a surface on a first side of the insulating substrate and electrically connected to the semiconductor element, 
 a back-side conductive wiring disposed on a surface on a second side of the insulating substrate, and 
 a vertically-through conductive wiring which is disposed inside the insulating substrate and electrically connects the upper-side conductive wiring and the back-side conductive wiring, the vertically-through conductive wiring further extending through an entire thickness direction of the insulating substrate; 
 
 wherein each of the upper-side conductive wiring and the back-side conductive wiring includes, 
 an underlying layer disposed on the insulating substrate, 
 a main conductive layer disposed on the underlying layer and containing a conductive metal, and 
 an electrode layer disposed on an area extending from an upper surface of the main conductive layer to a surface of the insulating substrate to cover side surfaces and an upper surface of the main conductive layer and side surfaces of the underlying layer; and 
 wherein the underlying layer includes, an adhesion layer in contact with the insulating substrate, the adhesion layer including TiW, and includes an auxiliary conductive layer being formed in contact with the main conductive layer and containing the conductive metal, 
 wherein the main conductive layer and the auxiliary conductive layer contain copper metal, 
 wherein the main conductive layer is in direct contact with an upper surface of the auxiliary conductive layer, and a bottom surface of the auxiliary conductive layer that is opposite the upper surface of the auxiliary conductive layer is in direct contact with an upper surface of the adhesion layer, 
 wherein the electrode layer comprises a first plating layer and a second plating layer, 
 wherein the first plating layer and the second plating layer cover the side surfaces of the underlying layer, and the side surfaces and the upper surface of the main conductive layer, 
 wherein one side of the first plating layer is in direct contact with the side surfaces of the underlying layer and the side surfaces of the main conductive layer, 
 wherein one side of the adhesion layer directly covers an end of the vertically-through conductive wiring, and 
 wherein the semiconductor element is a semiconductor light-emitting element, 
 wherein an area of the conductive wiring disposed on an upper side surface of the insulating substrate is greater than a mount area on which the semiconductor light-emitting element is mounted, and 
 wherein a filler having a white-based color is disposed by electrophoretic deposition over a portion of the conductive wiring disposed on the upper side surface of the insulating substrate, the portion being arranged outside the mount area. 
 
     
     
       11. The semiconductor device according to  claim 10 , wherein the conductive metal comprises Cu. 
     
     
       12. The semiconductor device according to  claim 10 , wherein the electrode layer comprises Ni and Au. 
     
     
       13. The semiconductor device according to  claim 10 , wherein TiW contained in the adhesion layer comprises 1 to 30 weight percent of Ti. 
     
     
       14. A semiconductor device including comprising: 
 a semiconductor element; and 
 a wiring substrate on which the semiconductor element is mounted, wherein: the wiring substrate includes, 
 an insulating substrate, and 
 a conductive wiring disposed in the insulating substrate and electrically connected to the semiconductor element, and 
 a vertically-through conductive wiring disposed inside the insulating substrate, the vertically-through conductive wiring extending through an entire thickness direction of the insulating substrate; 
 
 the conductive wiring includes,
 an underlying layer disposed on the insulating substrate, 
 a main conductive layer disposed on the underlying layer, and 
 an electrode layer covering side surfaces of the underlying layer and side surfaces and an upper surface of the main conductive layer; and 
 
 wherein the underlying layer includes an adhesion layer in contact with the insulating substrate and containing an alloy of Ti, and includes an auxiliary conductive layer, 
 wherein the main conductive layer and the auxiliary conductive layer contain copper metal, 
 wherein the main conductive layer is in direct contact with an upper surface of the auxiliary conductive layer, and a bottom surface of the auxiliary conductive layer that is opposite the upper surface of the auxiliary conductive layer is in direct contact with an upper surface of the adhesion layer, 
 wherein the electrode layer comprises a first plating layer and a second plating layer, 
 wherein the first plating layer and the second plating layer cover the side surfaces of the underlying layer, and the side surfaces and the upper surface of the main conductive layer, 
 wherein one side of the first plating layer is in direct contact with the side surfaces of the underlying layer and the side surfaces of the main conductive layer, 
 wherein one side of the adhesion layer directly covers an end of the vertically-through conductive wiring, and 
 wherein the semiconductor element is a semiconductor light-emitting element, 
 wherein an area of the conductive wiring disposed on an upper side surface of the insulating substrate is greater than a mount area on which the semiconductor light-emitting element is mounted, and 
 wherein a filler having a white-based color is disposed by electrophoretic deposition over a portion of the conductive wiring disposed on the upper side surface of the insulating substrate, the portion being arranged outside the mount area. 
 
     
     
       15. The semiconductor device according to  claim 14 , wherein the alloy of Ti contains a group 6 transition metal element as a main component. 
     
     
       16. A semiconductor device, comprising:
 semiconductor means for responding to electrical signals input thereto;   wiring means for conducting the electrical signals to and from the semiconductor means, wherein the wiring means includes insulating means for providing an insulating surface and for supporting the semiconductor means thereupon, and conductive wiring means disposed in the insulating means for being electrically connected to the semiconductor means, the conductive wiring means including underlying means formed on the insulating means, main conductive means disposed on the underlying means, and electrode means covering side surfaces of the underlying means and side surfaces and an upper surface of the main conductive means, wherein the underlying means includes adhesion means for contacting the insulating means, wherein the adhesion means contains an alloy of one of W and Mo, and wherein the alloy contains Ti.   
     
     
       17. A semiconductor device, comprising:
 semiconductor means for responding to electrical signals input thereto;   wiring means for supporting the semiconductor means, wherein the wiring means includes an insulating means, upper-side conductive wiring means formed on a surface on a first side of the insulating means, for being electrically connected to the semiconductor means, back-side conductive wiring means formed on a surface on a second side of the insulating substrate, and vertically-through conductive wiring means disposed inside the insulating means for electrically connecting the upper-side conductive wiring means and the back-side conductive wiring means,   wherein each of the upper-side conductive wiring means and the back-side conductive wiring means includes underlying means formed on the insulating substrate, and main conductive means formed on the underlying means and containing a conductive metal, and electrode means formed on an area extending from an upper surface of the main conductive means to a surface of the insulating means for covering side surfaces and an upper surface of the main conductive means and side surfaces of the underlying means,   adhesion means in contact with the insulating means, the adhesion means including TiW, and auxiliary conductive means in contact with the main conductive means, and containing the conductive metal.   
     
     
       18. The semiconductor device according to claim 14, wherein the adhesion layer comprises a material containing an alloy of Mo, the alloy containing Ti.  
     
     
       19. The semiconductor device according to claim 1,
 wherein one side of the adhesion layer of the conductive wiring disposed on a surface on a first side of the insulating substrate directly covers an end of the vertically-through conductive wiring, and   wherein one side of another adhesion layer of the conductive wiring disposed on a surface on a second side of the insulating substrate directly covers another end of the vertically-through conductive wiring.