Liquid crystal display

Abstract

A liquid crystal display includes a plurality of pixels arranged in a matrix, each pixel having a first sub-pixel electrode and a second sub-pixel electrode. A first thin film transistor is connected to the first sub-pixel electrode. A second thin film transistor is connected to the second sub-pixel electrode. A third thin film transistor is connected to the second sub-pixel electrode. A fourth thin film transistor is connected to a drain electrode of the third thin film transistor. A first gate line is connected to the first thin film transistor and the second thin film transistor. A data line is connected to the first thin film transistor and the second thin film transistor. A second gate line is connected to the third thin film transistor. A third gate line is connected to the fourth thin film transistor.

What is claimed is: 
     
       1. A liquid crystal display including a plurality of pixels having a first sub-pixel electrode and a second sub-pixel electrode and arranged in a matrix, comprising:
 a first thin film transistor connected to the first sub-pixel electrode; 
 a second thin film transistor connected to the second sub-pixel electrode; 
 a third thin film transistor connected to the second sub-pixel electrode; 
 a fourth thin film transistor connected to a drain electrode of the third thin film transistor; 
 a first gate line connected to the first thin film transistor and the second thin film transistor; 
 a data line connected to the first thin film transistor and the second thin film transistor; 
 a second gate line connected to the third thin film transistor; and 
 a third gate line connected to the fourth thin film transistor,; and  
 wherein the fourth thin film transistor is not connected to the first gate line 
 a step-down capacitor connected between the third thin film transistor and a capacitor electrode line, 
 wherein the fourth thin film transistor is connected to the first gate line. 
 
     
     
       2. The liquid crystal display of claim , wherein: the source electrode of the thin film transistor is connected to the drain electrode of the third thin film transistor, and the drain electrode of the fourth thin film transistor overlaps the first gate line. 
     
     
       3. The liquid crystal display of  claim 2 , wherein the third gate line is applied with a gate-on signal after the first gate line and the second gate line are applied with a gate-off signal. 
     
     
       4. The liquid crystal display of  claim 3 , wherein the third gate line is applied with the gate-on signal during a vertical blank period. 
     
     
       5. The liquid crystal display of  claim 4 , further comprising wherein the step-down capacitor comprises a capacitor electrode configured to overlap the drain electrode of the third thin film transistor. 
     
     
       6. The liquid crystal display of  claim 1 , wherein the third gate line is applied with the gate-on signal after the first gate line and the second gate line are applied with the gate-off signal. 
     
     
       7. The liquid crystal display of  claim 6 , wherein the third gate line is applied with the gate-on signal during the vertical blank period. 
     
     
       8. The liquid crystal display of  claim 7 , further comprising wherein the step-down capacitor comprises a capacitor electrode overlapping the drain electrode of the third thin film transistor. 
     
     
       9. The liquid crystal display of  claim 1  further comprising wherein the step-down capacitor comprises a capacitor electrode configured to overlap the drain electrode of the third thin film transistor. 
     
     
       10. The liquid crystal display of  claim 1 , wherein the third gate line is applied with the gate-on signal during the vertical blank period. 
     
     
       11. The liquid crystal display of  claim 1 , wherein the first sub-pixel electrode and the second sub-pixel electrode include a plurality of branches, and a plurality of regions having different directions of edges of the branches. 
     
     
       12. The liquid crystal display of  claim 11 , wherein the edges of the branches form an angle of 45° or 135° with the first gate line. 
     
     
       13. A pixel for a liquid crystal display, the pixel comprising
 a pair of sub-pixels, the pair of sub-pixels having a first sub-pixel switching element, a second sub-pixel switching element, a third switching element, a fourth switching element, a first liquid crystal capacitor, a second liquid crystal capacitor, a step-down capacitor, and a refresh capacitor, 
 wherein the first sub-pixel switching element and the second sub-pixel switching element are connected to a first gate line and a data line, and the third switching element is connected to a second gate line, 
 wherein the first sub-pixel switching element and the second sub-pixel switching element each include a control terminal connected to the first gate line, an input terminal connected to the data line, and an output terminal respectively connected to the first liquid crystal capacitor and the second liquid crystal capacitor, 
 wherein the third switching element includes a control terminal connected to the second gate line, an input terminal connected to the second liquid crystal capacitor and the output terminal connected to the step-down capacitor that is connected to the output terminal of the third switching element and a capacitor electrode line, 
 wherein the fourth switching element includes a control terminal connected to a refresh signal line, an input terminal connected to the step-down capacitor, and an output terminal connected to the refresh capacitor that is connected to the output terminal of the fourth switching element and the second first gate line, 
 wherein when the first gate line is applied with a gate-on signal, the first liquid crystal capacitor and the second liquid crystal capacitor become equally charged, and when the gate signal applied to the first gate line is changed from the gate-on voltage to a gate-off voltage and the gate signal applied to the second gate line is changed from the gate-off voltage to the gate-on voltage, charges charged to the second liquid crystal capacitor are partially moved to the step-down capacitor, the charged voltage of the second liquid crystal capacitor being decreased and the step-down capacitor being charged, such that the charged voltage of the second liquid crystal capacitor is lower than the charged voltage of the first liquid crystal capacitor, and 
 wherein the fourth switching element is not connected to the first gate line 
 wherein the fourth switching element is connected to the first gate line, and 
 wherein the refresh signal line and the first gate line are different. 
 
     
     
       14. A pixel for a liquid crystal display of  claim 13 , wherein after one frame image is displayed, a refresh signal line is applied with the gate-on signal during a vertical blank period in which the data signal is not applied, and when the refresh signal line is applied with the gate-on signal such that the fourth switching element is turned on, charges charged to the step-down capacitor are moved to the refresh capacitor.