Electronic device with serial ATA interface and power saving method for serial ATA buses

Abstract

In an electronic device with a serial ATA interface, upon detection of the issue or reception of a preset command, a confirmation device, such as a CPU, confirms the completion of execution of the command. Upon confirming the completion of execution of the command, a controller, which may also be the CPU, controls shifting of the serial ATA interface to a power saving mode.

What is claimed is: 
     
       1. An electronic device with a serial ATA interface connectable to a host via a serial ATA bus, comprising:
 an execution module configured to execute a command which is configured to designate a portion of the electronic being output from the host, the specific power saving mode being one of power saving modes which differ in type from a power saving mode for the serial ATA interface;   a reporting module configured to report completion of execution of the command to the host; and   a control module configured to control setting of a slumber mode or a partial mode as the power saving mode for the serial ATA interface after the reporting, the slumber mode or the partial mode being related to the specific power saving mode, and   wherein:   the control module comprises a timing module configured to determine a period required from the time of the reporting to the time when the slumber mode or the partial mode is set; and   the control module is configured to control setting of the slumber mode or the partial mode after the determined period elapses from the time of the reporting.   
     
     
       2. The electronic device of  claim 1 , wherein the timing module is configured to determine the period based on a frequency of reception of a command. 
     
     
       3. The electronic device of  claim 2 , further comprising:
 a memory configured to store reception time information indicating a time at which a command is received; and   a calculation module configured to calculate the frequency of reception based on the reception time information stored in the memory.   
     
     
       4. The electronic device of  claim 1 , wherein:
 the command is a sleep command; and   the control module is configured to control setting of the slumber mode for the serial ATA interface after the reporting of the completion of the execution of the sleep command, the slumber mode being related to the specific power saving mode.   
     
     
       5. The electronic device of  claim 1 , wherein the control module is configured to control setting of the electronic device in an idle mode and setting of the partial mode for the serial ATA interface after a read/write operation commanded by a read/write command is performed in a read/write mode, the partial mode being related to the idle mode. 
     
     
       6. The electronic device of  claim 1 , further comprising:
 a detection module configured to detect that the host does not support a power saving function of the serial ATA interface, when the host returns a response indicating that the host does not adapt to setting of the power saving mode for the serial ATA interface, the response being made to the control of the control module; and   a storing device configured to store flag information indicating the detection result, and   wherein the control module is configured
 (a) to refer to the flag information before the control, and 
 (b) to inhibit the control if the flag information indicates that the host does not support the power saving function of the serial ATA interface. 
   
     
     
       7. The electronic device of  claim 1 , further comprising a disk drive. 
     
     
       8. An information apparatus comprising:
 the electronic device of  claim 1 ;   a host configured to use the electronic device; and   a serial ATA bus configured to connect the electronic device and the host.   
     
     
       9. A controller comprising:
 a reporting module configured to report completion of execution of a command to a host, the command being configured to designate a portion of an electronic device with a serial ATA interface in a specific power saving mode and being output from the host, the specific power saving mode being one of power saving modes which differ in type from a power saving mode for the serial ATA interface, the electronic device being connectable to the host via a serial ATA bus; and   a control module configured to control setting of a slumber mode or a partial mode as the power saving mode for the serial ATA interface after the reporting, the slumber mode or the partial mode being related to the specific power saving mode, and   wherein:   the control module comprises a timing module configured to determine a period required from the time of the reporting to the time when the slumber mode or the partial mode is set; and   the control module is configured to control setting of the slumber mode or the partial mode after the determined period elapses from the time of the reporting.   
     
     
       10. The controller of  claim 9 , wherein the timing module is configured to determine the period based on a frequency of reception of a command. 
     
     
       11. The controller of  claim 10 , further comprising:
 a memory configured to store reception time information indicating a time at which a command is received; and   a calculation module configured to calculate the frequency of reception based on the reception time information stored in the memory.   
     
     
       12. The controller of  claim 9 , wherein:
 the command is a sleep command; and   the control module is configured to control setting of the slumber mode for the serial ATA interface after the reporting of the completion of the execution of the sleep command, the slumber mode being related to the specific power saving mode.   
     
     
       13. The controller of  claim 9 , wherein the control module is configured to control setting of the electronic device in an idle mode and setting of the partial mode for the serial ATA interface after a read/write operation commanded by a read/write command is performed in a read/write mode, the partial mode being related to the idle mode. 
     
     
       14. The controller of  claim 9 , further comprising:
 a detection module configured to detect that the host does not support a power saving function of the serial ATA interface, when the host returns a response indicating that the host does not adapt to setting of the power saving mode for the serial ATA interface, the response being made to the control of the control module; and   a storing device configured to store flag information indicating the detection result, and   wherein the control module is configured
 (a) to refer to the flag information before the control, and 
 (b) to inhibit the control if the flag information indicates that the host does not support the power saving function of the serial ATA interface. 
   
     
     
       15. A method for saving power in an electronic device with a serial ATA interface connectable to a host via a serial ATA bus, comprising:
 executing a command which is configured to designate a portion of the electronic device in a specific power saving mode, the command being output from the host, the specific power saving mode being one of power saving modes which differ in type from a power saving mode for the serial ATA interface;   reporting completion of execution of the command to the host;   controlling setting of a slumber mode or a partial mode as the power saving mode for the serial ATA interface after the reporting, the slumber mode or the partial mode being related to the specific power saving mode; and   determining a period required from the time of the reporting to the time when the slumber mode or the partial mode is set, and   wherein the slumber mode or the partial mode is set after the determined period elapses from the time of the reporting.   
     
     
       16. The method of  claim 15 , wherein:
 the command is a sleep command; and   the slumber mode for the serial ATA interface is set after the reporting of the completion of the execution of the sleep command, the slumber mode being related to the specific power saving mode.   
     
     
       17. The method of  claim 15 , further comprising:
 setting the electronic device in an idle mode after a read/write operation commanded by a read/write command is performed in a read/write mode; and   setting the partial mode for the serial ATA interface when the electronic device is set in the idle mode, the partial mode being related to the idle mode.   
     
     
       18. The method of  claim 15 , further comprising:
 detecting that the host does not support a power saving function of the serial ATA interface, when the host returns a response indicating that the host does not adapt to setting of the power saving mode for the serial ATA interface, the response being made to the controlling;   storing flag information in a storing device, the flag information indicating the detection result;   referring to the flag information before the controlling; and   inhibiting the controlling if the flag information indicates that the host does not support the power saving function of the serial ATA interface.   
     
     
       19. An electronic device comprising:
 a nonvolatile memory; and   a controller;   the controller comprising a first interface circuit and a second interface circuit;   the first interface circuit being adapted to interface with a second electronic device via a serial interface using a first standard for a serial ATA interface;   the controller being coupled with the nonvolatile memory via the second interface circuit:   wherein the controller is configured to:
 receive a first indicator from the second electronic device via the serial interface, the first indicator being an indicator associated with a second standard for an ATA interface being adapted to cause a reduction of a power consumption of the electronic device; 
 responsive to receiving the first indicator, transmit a first response to the second electronic device via the serial interface; and 
 cause the serial interface of the electronic device to enter into one mode of power saving modes associated with the first standard, after a first time period following the transmission of the first response.  
   
     
     
       20. The electronic device of claim 19, wherein the controller is configured to:
 cause the serial interface of the electronic device to transition from the one mode of the power save modes associated with the first standard to a second mode of the power save modes associated with the first standard, after the transmission of the first response.    
     
     
       21. The electronic device of claim 20, wherein the transition from the one mode of the power save modes to the second mode of the power save modes is performed after a second time period following the transmission of the first response.  
     
     
       22. The electronic device of claim 21, wherein a duration of the second time period relates to the transitioning from the one mode of the power save modes associated with the first standard to the second mode of the power save modes associated with the first standard.  
     
     
       23. The electronic device of claim 20, wherein the controller is further configured to:
 receive a second indicator from the second electronic device via the serial interface;   after receiving the second indicator, cause the electronic device to transition from the second mode of the power save modes associated with the first standard to the one mode of the power save modes associated with the first standard, after a second time period following the receipt of the second indicator.    
     
     
       24. The electronic device of claim 23, wherein a duration of the second time period relates to the transitioning from the second mode of the power save modes associated with the first standard to the one mode of the power save modes associated with the first standard.  
     
     
       25. The electronic device of claim 23, wherein the second indicator relates to a check power command.  
     
     
       26. The electronic device of claim 19, wherein the first indicator relates to a first power-save command.  
     
     
       27. The electronic device of claim 26, wherein the first power-save command comprises at least one of: a Sleep command, an Idle command, a Standby command, and a Standby Immediate command under an ATA Standard;
 wherein the first standard comprises a Serial ATA standard; and   wherein the one mode of the power saving modes comprises Slumber Mode, Partial Mode, or Idle Mode under the Serial ATA standard.    
     
     
       28. The electronic device of claim 27, wherein the one mode of the power saving modes comprises Slumber Mode, Partial Mode, or Idle Mode under the Serial ATA standard if the first power-save command comprises at least one of: a Sleep command, an Idle command, a Standby command, and a Standby Immediate command under an ATA Standard.  
     
     
       29. The electronic device of claim 27, wherein the electronic device enters into the one mode of the power saving modes after the first time period following the transmission of the response if the first power-save command comprises at least one of: a Sleep command, an Idle command, a Standby command, and a Standby Immediate command under an ATA Standard.  
     
     
       30. The electronic device according to the claim 26, wherein the first standard comprises a Serial ATA standard, the second standard comprises an ATA standard, and the first power-save command comprises a command under the ATA Standard.  
     
     
       31. The electronic device of claim 26, wherein the one mode of the power saving modes is based on information included in the first power-save command.  
     
     
       32. The electronic device of claim 19, wherein the process of receiving an indicator is repeated in response to a second indicator.  
     
     
       33. The electronic device of claim 19, wherein the electronic device further comprises a register to store the first indicator.  
     
     
       34. The electronic device of claim 19, wherein a duration of the first time period relates to a frequency of receiving a plurality of indicators including the first indicator.  
     
     
       35. The electronic device of claim 19, wherein the controller is configured to:
 without receiving a second indicator subsequent to the first indicator within the first time period, cause the electronic device to transition from the one mode of the power save modes associated with the first standard to a second mode of the power save modes associated with the first standard.    
     
     
       36. The electronic device of claim 19, wherein the controller is configured to cause the electronic device to enter into the one mode of power saving modes associated with the first standard after the first time period following the transmission of the first response and without receiving another indicator from the second electronic device during the first time period.  
     
     
       37. The electronic device of claim 19, wherein the controller is configured to: without receiving a second indicator associated with the first standard and subsequent to the first indicator within the first time period, cause the electronic device to transition from the one mode of the power save modes associated with the first standard to a second mode of the power save modes associated with the first standard.  
     
     
       38. The electronic device according to the claim 19, further comprising a volatile memory to store data received from the second electronic device via the serial interface.  
     
     
       39. The electronic device according to the claim 19, wherein the first standard comprises a Serial ATA standard.  
     
     
       40. The electronic device according to the claim 19, wherein the one mode of the power saving modes comprises a Slumber Mode under a Serial ATA standard.  
     
     
       41. The electronic device of claim 19, wherein the first interface circuit comprises an interface circuit that communicates using a Serial ATA standard.  
     
     
       42. The electronic device of claim 19, wherein the second standard comprises a peripheral component interconnect (PCI) standard.  
     
     
       43. The electronic device of claim 19, wherein the controller is further configured to determine whether the electronic device is capable of entering into the one mode of the power saving modes associated with the first standard.  
     
     
       44. The electronic device of claim 19, wherein the first standard comprises a standard that is compatible with the second standard.  
     
     
       45. A method of controlling a power consumption of an electronic device, the method being performed by a controller comprising a first interface circuit and a second interface circuit, the first interface circuit being adapted to interface with a second electronic device via a serial interface using a first standard for a serial ATA interface, the controller being coupled with the nonvolatile memory via the second interface circuit, the method comprising:
 receiving a first indicator from the second electronic device via the serial interface, the first indicator being an indicator associated with a second standard for an ATA interface being adapted to cause a reduction of a power consumption of the electronic device;   responsive to receiving the first indicator, transmitting a first response to the second electronic device via the serial interface; and   causing the serial interface of the electronic device to enter into one mode of power saving modes associated with the first standard, after a first time period following the transmission of the first response.    
     
     
       46. The method of claim 45, further comprising:
 causing the serial interface of the electronic device to transition from the one mode of the power save modes associated with the first standard to a second mode of the power save modes associated with the first standard, after a second time period following the transmission of the first response.    
     
     
       47. The method of claim 46, further comprising:
 receiving a second indicator from the second electronic device via the serial interface;   after receiving the second indicator, causing the electronic device to transition from the second mode of the power save modes associated with the first standard to the one mode of the power save modes associated with the first standard, after a second time period following the receipt of the second indicator.    
     
     
       48. The method of claim 47, wherein a duration of the second time period relates to the transitioning from the second mode of the power save modes associated with the first standard to the one mode of the power save modes associated with the first standard.  
     
     
       49. The method of claim 47, wherein the second indicator relates to a check power command.  
     
     
       50. The method of claim 46, wherein a duration of the second time period relates to the transitioning from the one mode of the power save modes associated with the first standard to the second mode of the power save modes associated with the first standard.  
     
     
       51. The method of claim 45, wherein the first indicator relates to a first power-save command.  
     
     
       52. The method of claim 51, wherein the first power-save command comprises at least one of: a Sleep command, an Idle command, a Standby command, and a Standby Immediate command under an ATA Standard;
 wherein the first standard comprises a Serial ATA standard; and   wherein the one mode of the power saving modes comprises Slumber Mode, Partial Mode, or Idle Mode under the Serial ATA standard.    
     
     
       53. The method of claim 52, wherein the one mode of the power saving modes comprises Slumber Mode, Partial Mode, or Idle Mode under the Serial ATA standard if the first power-save command comprises at least one of: a Sleep command, an Idle command, a Standby command, and a Standby Immediate command under an ATA Standard.  
     
     
       54. The method of claim 52, wherein the electronic device enters into the one mode of the power saving modes after the first time period following the transmission of the response if the first power-save command comprises at least one of: a Sleep command, an Idle command, a Standby command, and a Standby Immediate command under an ATA Standard.  
     
     
       55. The method of claim 52, wherein the process of receiving an indicator is repeated in response to a second indicator.  
     
     
       56. The method of claim 51, wherein the first standard comprises a Serial ATA standard, the second standard comprises an ATA standard, and the first power-save command comprises a command under the ATA Standard.  
     
     
       57. The method of claim 51, wherein the one mode of the power saving modes is based on information included in the first power-save command.  
     
     
       58. The method of claim 45, wherein a duration of the first time period relates to a frequency of receiving a plurality of indicators including the first indicator.  
     
     
       59. The method of claim 45 further comprising:
 without receiving a second indicator subsequent to the first indicator within the first time period, causing the electronic device to transition from the one mode of the power save modes associated with the first standard to a second mode of the power save modes associated with the first standard.    
     
     
       60. The method of claim 45, wherein the electronic device is caused to enter into the one mode of power saving modes associated with the first standard after the first time period following the transmission of the first response and without receiving another indicator from the second electronic device during the first time period.  
     
     
       61. The method of claim 45, further comprising:
 without receiving a second indicator associated with the first standard and subsequent to the first indicator within the first time period, causing the electronic device to transition from the one mode of the power save modes associated with the first standard to a second mode of the rower save modes associated with the first standard.    
     
     
       62. The method of claim 45, wherein the first standard comprises a Serial ATA standard.  
     
     
       63. The method of claim 45, wherein the one mode of the power saving modes comprises a Slumber Mode under a Serial ATA standard.  
     
     
       64. The method of claim 45, wherein the second standard comprises a peripheral component interconnect (PCI) standard.  
     
     
       65. The method of claim 45, further comprising:
 determining whether the electronic device is capable of entering into the one mode of the power saving modes associated with the first standard.    
     
     
       66. The method of claim 45, wherein the first standard comprises a standard that is compatible with the second standard.  
     
     
       67. A non-transitory computer-readable storage medium having stored therein a set of instructions that, when executed by at least one processor of a controller, causes the controller to perform a method for controlling a power consumption of an electronic device, the controller comprising a first interface circuit and a second interface circuit, the first interface circuit being adapted to interface with a second electronic device via a serial interface using a first standard for a serial ATA interface, the controller being coupled with the nonvolatile memory via the second interface circuit, the method comprising:
 responsive to determining that a first indicator is received from the second electronic device via the serial interface, the first indicator being an indicator associated with a second standard for an ATA interface being adapted to cause a reduction of a power consumption of the electronic device, transmitting a first response to the second electronic device via the serial interface; and   causing the serial interface of the electronic device to enter into one mode of power saving modes associated with the first standard, after a first time period following the transmission of the first response.    
     
     
       68. The medium of claim 67, wherein the set of instructions that is executable by the at least one processor of the controller causes the controller to further perform:
 causing the serial interface of the electronic device to transition from the one mode of the power save modes associated with the first standard to a second mode of the power save modes associated with the first standard, after a second time period following the transmission of the first response.    
     
     
       69. The medium of claim 68, wherein the set of instructions that is executable by the at least one processor of the controller causes the controller to further perform:
 receiving a second indicator from the second electronic device via the serial interface;   after receiving the second indicator, causing the electronic device to transition from the second mode of the power save modes associated with the first standard to the one mode of the power save modes associated with the first standard, after a second time period following the receipt of the second indicator.    
     
     
       70. The medium of claim 69, wherein a duration of the second time period relates to the transitioning from the second mode of the power save modes associated with the first standard to the one mode of the power save modes associated with the first standard.  
     
     
       71. The medium of claim 68, wherein a duration of the second time period relates to the transitioning from the one mode of the power save modes associated with the first standard to the second mode of the power save modes associated with the first standard.  
     
     
       72. The medium of claim 67, wherein the first indicator relates to a first power-save command.  
     
     
       73. The medium of claim 72, wherein the first power-save command comprises at least one of: a Sleep command, an Idle command, a Standby command, and a Standby Immediate command under an ATA Standard;
 wherein the first standard comprises a Serial ATA standard; and   wherein the one mode of the power saving modes comprises Slumber Mode, Partial Mode, or Idle Mode under the Serial ATA standard.    
     
     
       74. The medium of claim 73, wherein the one mode of the power saving modes comprises Slumber Mode, Partial Mode, or Idle Mode under the Serial ATA standard if the first power-save command comprises at least one of: a Sleep command, an Idle command, a Standby command, and a Standby Immediate command under an ATA Standard.  
     
     
       75. The medium of claim 73, wherein the electronic device enters into the one mode of the power saving modes after the first time period following the transmission of the response if the first power-save command comprises at least one of: a Sleep command, an Idle command, a Standby command, and a Standby Immediate command under an ATA Standard.  
     
     
       76. The medium of claim 67, wherein the set of instructions that is executable by the at least one processor of the controller to cause the controller to further perform:
 repeat the process of receiving an indicator in response to a second indicator.    
     
     
       77. The medium of claim 67, wherein a duration of the first time period relates to a frequency of receiving a plurality of indicators including the first indicator.  
     
     
       78. The medium of claim 65, wherein the set of instructions that is executable by the at least one processor of the controller causes the controller to further perform:
 without receiving a second indicator associated with the first standard and subsequent to the first indicator within the first time period, causing the electronic device to transition from the one mode of the power save modes associated with the first standard to a second mode of the power save modes associated with the first standard.    
     
     
       79. The medium of claim 67, wherein the electronic device is caused to enter into the one mode of power saving modes associated with the first standard after the first time period following the transmission of the first response and without receiving another indicator from the second electronic device during the first time period.  
     
     
       80. The medium of claim 67, wherein the set of instructions that is executable by the at least one processor of the controller causes the controller to further perform:
 without receiving a second indicator associated with the first standard and subsequent to the first indicator within the first dine period, causing the electronic device to transition from the one mode of the power save modes associated with the first standard to a second mode of the power save modes associated with the first standard.