P
USRE48997EActiveUtilityPatentIndex 73

Memory system in which extended function can easily be set

Assignee: KIOXIA CORPPriority: Feb 4, 2011Filed: Jun 25, 2019Granted: Mar 29, 2022
Est. expiryFeb 4, 2031(~4.6 yrs left)· nominal 20-yr term from priority
Inventors:FUJIMOTO AKIHISASAKAMOTO HIROYUKI
G06F 9/30134G06F 12/00G06F 3/0604G06F 12/0238G06F 13/14G06F 3/0679G06F 3/0659G11C 5/00
73
PatentIndex Score
1
Cited by
47
References
27
Claims

Abstract

According to one embodiment, a memory system, such as a SDIO card, includes a nonvolatile semiconductor memory device, a control section, a memory, an extended function section, and an extension register. The extended function section is controlled by the control section. A first command reads data from the extension register in units of given data lengths. A second command writes data to the extension register in units of given data lengths. A extension register includes a first area, and second area different from the first area, information configured to specify a type of the extended function and controllable driver, and address information indicating a place to which the extended function is assigned, the place being on the extension register, are recorded in the first area, and the second area includes the extended function.

Claims

exact text as granted — not AI-modified
What is claimed is: 
     
       1. A memory system, comprising:
 a memory device comprising:
 a nonvolatile semiconductor memory device; and 
 a control section configured to control circuit that controls the nonvolatile semiconductor memory device and an extension register space, the extension register space being capable of defining an interface controlling an extended function functions through an extended function section, wherein 
 
 wherein the extension register space stores information, the information is configured to specify a typespecifies one of the extended functionfunctions and a controllable driver, and to includeincludes address information indicating a place where aan extension register for controlling the one of the extended functionfunctions is stored, and  
 the control section circuit is arranged to process a first command to read data from the extension register space in accordance with designations of the address information and data length, and a second command to write data to the extension register space in accordance with designations of the address information and data length; and 
 a host device, which comprises a host driver and a device memory, and that is accessible to a memory space and the extension register space of the nonvolatile memory device and controls the extended function section through an extension register set which is placed in the extension resister space, wherein
 the host driver issues the first command to read a function identification code, a manufacturer identification information, and function identification information from the information that is described in an information register in the extension register space and specifies a usable general-purpose function driver or a dedicated function driver, and 
 
 when a particular function driver, being either the specified general-purpose function driver or the dedicated function driver, is present on the host device, the host driver loads the particular function driver into the device memory, and execution of the particular function driver initializes the one of the extended functions in the memory device.  
 
     
     
       2. The device according to  claim 1 , wherein
 each of the first and second commands comprises an address field and a length field in an argument of either of the first and second commands used to access data in one page of the extension register space constituted of a plurality of pages,   a value of a mode field in the argument of each of the first and second commands selects a first operation mode,   the first operation mode of the first command corresponds to a read operation of reading data including an effective data indicated by the length field from a position of the register indicated by the address field, and   the first operation mode of the second command corresponds to a write operation of writing data including an effective data indicated by the length field to a position of the register indicated by the address field.   
     
     
       3. The device according to  claim 2 , wherein
 in the first operation mode of the first command, data items placed a location in a designated page of the register, a top of the data items location is designated by the address field, are arranged to transfer the data items from a head of a read data block, the length field indicating an effective data length from head of read data block, and in the first operation mode of the second command, data items transferred from the head of a write data block are written to a page of the register, the top of write position in a designated page of the register is specified by the address field and data length to be written is specified by the length filed.   
     
     
       4. The device according to  claim 2 , wherein
 the argument of the second command includes a bit used to select whether or not mask write is to be carried out, when mask write is not carried out, the length field indicates an effective write data length, and when mask write is carried out, the length field becomes a fixed value, the length field indicates mask information used to select whether write is to be carried out in units of one bit or original data is to be held, and the mask information and write data length are the same length as the fixed value.   
     
     
       5. The device according to  claim 2 , further comprising a function which is controlled by multiple methods using an extension register set configured by multiple of registers, multiple of functions are controlled by singly extension register set, wherein
 function identification information in the extension register space includes common information for all functions and multiple of information to identify a location of each extension register set in the extension register space.   
     
     
       6. The device according to  claim 2 , further comprising a third command used as a read command supporting fixed-length block transfer and multi-block transfer, and a fourth command used as a write command supporting fixed-length block transfer and multi-block transfer, wherein
 each of the third and fourth commands includes an address field as an argument thereof, data transfer is executed when the address field designates a data port of the register, and data length transfer is specified by a block count.   
     
     
       7. The device according to  claim 2 , further comprising:
 a fifth command which enables read/write supporting variable-length block transfer, and multi-block transfer;   a sixth command which enables read/write of 1-byte data by the argument and the response; and   a function register set which can be accessed by the fifth and sixth commands, wherein   the function register set which can be accessed by the fifth and sixth commands can also be accessed by the first and second commands.   
     
     
       8. The device according to  claim 2 , wherein
 each of the first and second commands comprises an address field and a length field in the argument of the first and second commands used to access data in one page of the extension register space constituted of a plurality of pages,   a value of the a mode field in the argument of each of the first and second commands selects a second operation mode,   in the second operation mode of each the first and second commands, a specific address indicated by the address field is interpreted as a data port of the register,   the first command reads data from the extended function section through the data port which is associated with the extended function, and   the second command writes data to the extended function section through the data port which is associated with the extended function.   
     
     
       9. The device according to  claim 1 , wherein
 the information which is placed in the extension register space includes any one of a function identification codes configured to recognize a standard extended function, manufacturer identification information configured to recognize a manufacturer, and a function identification information for identifying classification for the extended function, wherein the information is used as an information for selecting a general-purpose driver or a dedicated driver.   
     
     
       10. A host system to use a memory device, the memory device including a nonvolatile semiconductor memory device, the host system is accessible to a memory space and an extension register space of the nonvolatile semiconductor memory device, and the host system can control an extended function section through extension register set which is placed in the extension register space,
 wherein an information register in the extension register space indicates information which is configured to specify a type of the extended function and a controllable driver, and address information indicating a place where a register for controlling the extended function is stored,   the control section is arranged to process a first command to read data from the extension register space in accordance with designations of the address information and data length, and a second command to write data to the extension register space in accordance with designations of the address information and data length,   the host system comprising a host driver and a system memory,   wherein the host driver uses the first command to read a function identification code, a manufacturer identification information, and a function identification information from the information which is described in the information register in the extension register space, and specify a usable general-purpose function driver or a dedicated function driver and, when a driver exists, the host driver loads the driver into the system memory, and execution of the function driver initializes the extended function in the memory device.   
     
     
       11. The host system according to  claim 10 , wherein
 the host driver delivers position information about the register assigned to the extended function to the loaded function driver from the information, thereby making the extended function controllable even when the register is arranged at an arbitrary position.   
     
     
       12. The host system according to  claim 10 , wherein
 each of the first and second commands comprises an address field and a length field in an argument of either of the first and second commands used to access data in any one page of the extension register space constituted of a plurality of pages,   a first operation mode of the first command corresponds to a read operation of reading data including an effective data indicated by the length field from a position of the register indicated by the address field, and   the first operation mode of the second command corresponds to a write operation of writing data including an effective data indicated by the length field to a position of the register indicated by the address field.   
     
     
       13. The host system according to  claim 12 , further comprising a third command used as a read command supporting multi-block transfer, and a fourth command used as a write command supporting multi-block transfer, wherein
 each of the third and fourth commands includes an address field as an argument thereof, multi-block data transfer is executed when the address field designates a data port of at least one byte register in a second operation mode, in the second operation mode of each the first, second, third and fourth commands, a specific address indicated by the address field is interpreted as a data port of the register.   
     
     
       14. The host system according to  claim 13 , wherein
 the host driver accesses the register of the memory device by the first and second commands or by the third and fourth commands in the first operation mode, and carries out data transfer between the host system and the extended function section of the memory device in the second operation mode.   
     
     
       15. The host system according to  claim 10 , wherein
 the host driver recognizes a certain function from a plurality of multi-function devices by the information including function identification code, manufacturer identification information, and a function identification information which are singly assigned to each function, and location of the register is determined by address field of the information which is corresponded with the specified function, and length of the register is specified in the register of the function.   
     
     
       16. The system according to claim 1, wherein
 each of the first and second commands comprises an address field and a length field in an argument of either of the first and second commands used to access data in one page of the extension register space constituted of a plurality of pages,   a value of a mode field in the argument of each of the first and second commands selects a first operation mode,   the first operation mode of the first command corresponds to a read operation of reading data including an effective data indicated by the length field from a position of the extension register indicated by the address field, and   the first operation mode of the second command corresponds to a write operation of writing data including an effective data indicated by the length field to a position of the extension register indicated by the address field.    
     
     
       17. The system according to claim 16, wherein
 in the first operation mode of the first command, data items placed a location in a designated page of the extension register, a top of the data items location is designated by the address field, are arranged to transfer the data items from a head of a read data block, the length field indicating an effective data length from head of read data block, and   in the first operation mode of the second command, data items transferred from the head of a write data block are written to a page of the extension register, the top of write position in a designated page of the extension register is specified by the address field and data length to be written is specified by the length field.    
     
     
       18. The system according to claim 16, wherein the argument of the second command includes a bit used to select whether or not mask write is to be carried out, when mask write is not carried out, the length field indicates an effective write data length, and when mask write is carried out, the length field becomes a fixed value, the length field indicates mask information used to select whether write is to be carried out in units of one bit or original data is to be held, and the mask information and write data length are the same length as the fixed value.  
     
     
       19. The system according to claim 16, further comprising a function which is controlled by multiple methods using the extension register set configured by multiple of extension registers, multiple of functions are controlled by singly extension register set, wherein
 function identification information in the extension register space includes common information for all functions and multiple of information to identify a location of each extension register set in the extension register space.    
     
     
       20. The system according to claim 16, further comprising a third command used as a read command supporting fixed-length block transfer and multi-block transfer, and a fourth command used as a write command supporting fixed-length block transfer and multi-block transfer, wherein
 each of the third and fourth commands includes an address field as an argument thereof, data transfer is executed when the address field designates a data port of the extension register, and data length transfer is specified by a block count.    
     
     
       21. The system according to claim 16, further comprising:
 a fifth command which enables read/write supporting variable-length block transfer, and multi-block transfer;   a sixth command which enables read/write of 1-byte data by the argument and the response; and   a function register set which can be accessed by the fifth and sixth commands, wherein the function register set which can be accessed by the fifth and sixth commands can also be accessed by the first and second commands.    
     
     
       22. The system according to claim 16, wherein
 each of the first and second commands comprises an address field and a length field in the argument of the first and second commands used to access data in one page of the extension register space constituted of a plurality of pages,   a value of the mode field in the argument of each of the first and second commands selects a second operation mode,   in the second operation mode of each the first and second commands, a specific address indicated by the address field is interpreted as a data port of the extension register,   the first command reads data from the extended function section through the data port which is associated with the one of the extended functions, and   the second command writes data to the extended function section through the data port which is associated with the one of the extended functions.    
     
     
       23. The system according to claim 16, further comprising a third command used as a read command supporting multi-block transfer, and a fourth command used as a write command supporting multi-block transfer, wherein
 each of the third and fourth commands includes an address field as an argument thereof, multi-block data transfer is executed when the address field designates a data port of at least one byte register in a second operation mode, in the second operation mode of each the first, second, third and fourth commands, a specific address indicated by the address field is interpreted as a data port of the extension register.    
     
     
       24. The system according to claim 23, wherein the host driver accesses the extension register of the memory device by the first and second commands or by the third and fourth commands in the first operation mode, and carries out data transfer between the host system and the extended function section of the memory device in the second operation mode.  
     
     
       25. The system according to claim 1, wherein the information that is placed in the extension register space includes any one of function identification codes configured to recognize a standard extended function, the manufacturer identification information to recognize a manufacturer, and the function identification information for identifying classification for the standard extended function, wherein the information is used as information for selecting the general-purpose function driver or the dedicated function driver.  
     
     
       26. The system according to claim 1, wherein the host driver delivers position information about the extension register assigned to the one of the extended functions to the loaded function driver from the information, thereby making the one of the extended functions controllable even when the extension register is arranged at an arbitrary position.  
     
     
       27. The system according to claim 1, wherein the host driver recognizes the one of the extended functions from a plurality of multi-function devices by the information including function identification code, manufacturer identification information, and a function identification information which are singly assigned to each function, and location of the extension register is determined by address field of the information which is corresponded with the one of the extended functions, and length of the extension register is specified in the extension register of the one of the extended functions.

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