P
USRE49166EActiveUtilityPatentIndex 62

Displays with silicon and semiconducting-oxide top-gate thin-film transistors

Assignee: APPLE INCPriority: Mar 24, 2017Filed: Apr 10, 2020Granted: Aug 9, 2022
Est. expiryMar 24, 2037(~10.7 yrs left)· nominal 20-yr term from priority
Inventors:ONO SHINYALIN CHIN-WEICHUANG CHING-SANGCHANG JIUN-JYEOMOTO KEISUKELIN SHANG-CHIHCHANG TING-KUOISHII TAKAHIDE
H10D 30/6745H10D 30/6731H10D 86/481H10D 86/451H10D 86/423H10D 86/421H10D 86/60H10D 30/6755H01L 27/3276H01L 27/1225H01L 27/3258H01L 27/1222H01L 27/3262H01L 27/3265H01L 27/1255H01L 27/3248H01L 29/7869H01L 27/1248H01L 29/78675H10K 59/1213H10K 59/124H10K 59/123H10K 59/131H10K 59/1216
62
PatentIndex Score
0
Cited by
17
References
23
Claims

Abstract

An electronic device may include a display having an array of display pixels on a substrate. The display pixels may be organic light-emitting diode display pixels, that include hybrid thin-film transistor structures formed using semiconducting-oxide thin-film transistors, silicon thin-film transistors, and capacitor structures. A drive transistor in the display pixel may be a top-gate semiconducting-oxide thin-film transistor and a switching transistor in the display pixel may be a top-gate silicon thin-film transistor. A storage capacitor in the display may include a conductive semiconducting-oxide electrode.

Claims

exact text as granted — not AI-modified
What is claimed is: 
     
       1. A display comprising:
 a semiconducting-oxide drive transistor, wherein the semiconducting-oxide drive transistor is a top-gate transistor; 
 a storage capacitor coupled to the drive transistor, wherein the storage capacitor comprises conductive oxide, and wherein the storage capacitor is formed in the same layer in the display as the semiconducting-oxide drive transistor; 
 a silicon switching transistor coupled to the semiconducting-oxide drive transistor, wherein the silicon switching transistor is formed on a substrate, and wherein the semiconducting-oxide drive transistor is formed above the silicon switching transistor; 
 an organic layer formed on the semiconducting-oxide drive transistor; 
 a metal layer laterally coupling a source-drain terminal of the semiconducting-oxide drive transistor to a source-drain terminal of the silicon switching transistor, wherein the metal layer is not formed through the organic layer; and 
 a conductive structure electrically coupled to a gate conductor of the top-gate transistor, wherein the conductive structure is not formed through the organic layer. 
 
     
     
       2. The display of  claim 1 , further comprising:
 a light-emitting diode coupled in series with the drive transistor. 
 
     
     
       3. The display of  claim 2 , wherein the silicon switching transistor is configured to selectively pass current through the drive transistor to the light-emitting diode. 
     
     
       4. The display of  claim 2 , further comprising:
 a first power supply line; and 
 a second power supply line, wherein the semiconducting-oxide drive transistor, the silicon switching transistor, and the light-emitting diode are coupled in series between the first and second power supply lines. 
 
     
     
       5. The display of  claim 1 , further comprising:
 a light-emitting diode coupled in series with the drive transistor; and 
 an additional organic layer formed on the organic layer, wherein the light-emitting diode has an anode layer that is formed on the additional organic layer. 
 
     
     
       6. The display of  claim 1 , further comprising:
 a conductive segment formed in a bending region of the display, the conductive segment and the metal layer are at least partially formed in the same gate metal layer. 
 
     
     
       7. The display of  claim 1 , further comprising:
 a conductive structure formed directly below the semiconducting-oxide drive transistor in a given metal layer; and 
 a storage capacitor coupled to the drive transistor, the storage capacitor comprises a capacitor plate in the given metal layer. 
 
     
     
       8. The display of  claim 1 , wherein the silicon switching transistor comprises a gate structure formed in a given metal layer, the display further comprising:
 a storage capacitor coupled to the drive transistor, the storage capacitor comprises a capacitor plate in the given metal layer. 
 
     
     
       9. The display of  claim 1 , wherein the semiconducting-oxide drive transistor does not include a bottom gate. 
     
     
       10. A display comprising:
 a drive transistor having a gate terminal and a source terminal; 
 a metal segment formed directly below the drive transistor; 
 a capacitor coupled to the drive transistor, wherein the capacitor comprises a first terminal formed from conductive oxide and a second terminal formed from an additional metal segment separate from the metal segment, wherein the additional metal segment is formed in the same layer as the metal segment, and wherein the capacitor is configured to store a voltage across the gate and source terminals of the drive transistor. 
 
     
     
       11. The display of  claim 10 , further comprising:
 a light-emitting diode coupled in series between the drive transistor. 
 
     
     
       12. The display of  claim 10 , further comprising:
 a dielectric layer formed below the drive transistor, wherein the drive transistor comprises semiconducting-oxide material, and wherein the conductive oxide of the capacitor and the semiconducting-oxide material of the drive transistor are formed on the dielectric layer. 
 
     
     
       13. The display of  claim 10 , further comprising:
 a switching transistor coupled to the drive transistor, wherein the switching transistor has a gate formed below the metal segment. 
 
     
     
       14. The display of  claim 10 , further comprising:
 a capacitor; and 
 an additional routing path coupling the capacitor to the switching transistor, wherein the routing path and the additional routing path include lateral routing portions that are formed in the same layer. 
 
     
     
       15. A display comprising:
 a drive transistor having a source-drain terminal; 
 a switching transistor coupled to the drive transistor; 
 a conductive routing path having a first terminal contact that is coupled to the drive transistor and a second terminal contact that is coupled to the switching transistor; and 
 a conductive etch-stop liner interposed between the source-drain terminal of the drive transistor and the first terminal contact. 
 
     
     
       16. The display of  claim 15 , wherein the drive transistor comprises semiconducting-oxide and the switching transistor is a silicon transistor. 
     
     
       17. The display of  claim 16 , wherein the drive transistor is a top-gate transistor. 
     
     
       18. The display of  claim 15 , wherein the second terminal contact of the conductive routing path comprises only one via. 
     
     
       19. A display comprising:
 a semiconducting-oxide transistor having a semiconducting-oxide layer;   a conductor formed directly below the semiconducting-oxide layer of the semiconducting-oxide transistor; and   a capacitor coupled to the semiconducting-oxide transistor, wherein the capacitor comprises a first terminal and a second terminal that is formed from an additional conductor separate from the conductor, and wherein the additional conductor is formed in the same layer as the conductor.    
     
     
       20. The display of claim 19, further comprising:
 a light-emitting diode coupled to the semiconducting-oxide transistor.    
     
     
       21. The display of claim 19, further comprising:
 a switching transistor coupled to the semiconducting-oxide transistor, wherein the switching transistor has a gate formed in a layer below the conductor.    
     
     
       22. The display of claim 20, wherein the semiconducting-oxide transistor comprises a metal layer that includes molybdenum.  
     
     
       23. The display of claim 21, further comprising:
 a first planarization layer formed over the semiconducting-oxide transistor; and   a second planarization layer formed on the first planarization layer.

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