Switch and memory device

Abstract

A switch according to an embodiment includes a first PCIe interface that can be connected to a host on the basis of a PCIe standard. In addition, the switch includes a plurality of second PCIe interfaces that can be connected to a plurality of storage devices, respectively, on the basis of the PCIe standard. The switch further includes a control unit that distributes an access request which is comply with an NVMe standard and is transmitted from the host to any one of the plurality of second PCIe interfaces. The distribution includes a process of constructing an NVMe command of the access request and a process of constructing a data transmission descriptor list of the access request.

What is claimed is: 
     
       1. A switch module comprising:
 a first interface configured to be connected to a host in accordance with Peripheral Component Interconnect Express/Non-Volatile Memory Express (PCIe/NVMe) standard; 
 a plurality of second interfaces configured to be connected to a plurality of storage devices solid state drives (SSDs), respectively, in accordance with the PCIe/NVMe standard; and 
 a controller outside of the plurality of SSDs, the controller being configured to make the host recognize the plurality of storage devices SSDs as a single storage device by:
 obtaining a command issued by the host, the command designating a logical address range and designating access target data on a logical-block-address (LBA) basis; and 
 on the basis of the logical address range, determining which one of the plurality of SSDs performs a process corresponding to the command; and  
 distributing the command to at least the determined one of the plurality of storage devices SSDs. 
 
 
     
     
       2. The switch module according to  claim 1 , wherein
 the controller is further configured to: 
 divide the command issued by the host into a first command and a second command; 
 distribute the first command to a first storage device SSD among the plurality of storage devices SSDs; and 
 distribute the second command to a second storage device SSD among the plurality of storage devices SSDs. 
 
     
     
       3. The switch module according to  claim 1 , wherein
 the controller is configured to: 
 in a case that the command issued by the host designates a first logical address range, distribute the command as a first command to a first storage device SSD among the plurality of storage devices SSDs; and 
 in a case that the command issued by the host designates a second logical address range, distribute the command as a second command to a second storage device SSD among the plurality of storage devices SSDs. 
 
     
     
       4. The switch nodule module according to  claim 3 , wherein
 the controller is further configured to: 
 receive a first completion notification from the first storage device SSD when the first storage device SSD completes executing the first command; 
 receive a second completion notification from the second storage device SSD when the second storage device SSD completes executing the second command; and 
 after receiving both of the first completion notification and the second completion notification, 
 transmit, to the host, a completion notification to notify that the command issued by the host is completed. 
 
     
     
       5. The switch module according to  claim 3 , further comprising:
 an NVMe register that stores a door bell; and 
 a memory, wherein 
 the controller is further configured to: 
 when the host updates the door bell, fetch the command issued by the host and store the fetched command into the memory. 
 
     
     
       6. The switch module according to  claim 5 , wherein
 the controller is further configured to: 
 after storing the command into the memory, update a door bell of the at least determined one of the plurality of storage devices SSDs so that the at least determined one of the plurality of storage devices SSDs fetches the command from the memory. 
 
     
     
       7. The switch nodule module according to  claim 1 , wherein
 the command issued by the host is accompanied with a data transmission descriptor, wherein 
 the controller is further configured to: 
 on the basis of the data transmission descriptor, inform the at least determined one of the plurality of storage devices SSDs of a location in a memory of the host to which the at least determined one of the plurality of storage devices SSDs is to access in accordance with the command. 
 
     
     
       8. The switch module according to  claim 7 , wherein
 in a case that the command issued by the host is a read command, the location in the memory of the host is a location into which the at least determined one of the plurality of storage devices SSDs is to write a piece of read data in accordance with the read command. 
 
     
     
       9. The switch module according to  claim 7 , wherein
 in a case that the command issued by the host is a write command, the location in the memory of the host is a location from which the at least determined one of the plurality of storage devices SSDs is to read a piece of write data in accordance with the write command. 
 
     
     
       10. The switch module according to  claim 7 , wherein
 the data transmission descriptor includes a plurality of entries, wherein 
 the controller is configured to: 
 on the basis of an identifier to identify each of the plurality of entries, determine a storage device an SSD among the plurality of storage devices SSDs that the controller is to inform the location. 
 
     
     
       11. A method of controlling a plurality of storage devices solid state drives SSDs, each of the plurality of storage devices SSDs conforming to Peripheral Component Interconnect Express/Non-Volatile Memory Express (PCIe/NVMe) standard, the method comprising:
 making, by a controller outside of the plurality of SSDs, a host recognize the plurality of SSDs as a single storage device by:  obtaining a command issued by a the host that conforms to the PCIe/NVMe standard, the command designating a logical address range and designating access target data on a logical-block-address (LBA) basis;   on the basis of the logical address range, determining which one of the plurality of SSDs performs a process corresponding to the command; and    distributing the command to at least the determined one of the plurality of storage devices SSDs; and   allowing the host to recognize the plurality of storage devices SSDs as a the single storage device.   
 
     
     
       12. The method according to  claim 11 , further comprising:
 dividing the command issued by the host into a first command and a second command; 
 distributing the first command to a first storage device SSD among the plurality of storage devices SSDs; and 
 distributing the second command to a second storage device SSD among the plurality of storage devices SSDs. 
 
     
     
       13. The method according to  claim 11 , wherein
 distributing the command includes: 
 in a case that the command issued by the host designates a first logical address range, distributing the command as a first command to a first storage device SSD among the plurality of storage devices SSDs; and 
 in a case that the command issued by the host designates a second logical address range, distributing the command as a second command to a second storage device SSD among the plurality of storage devices SSDs. 
 
     
     
       14. The method according to  claim 13 , further comprising:
 receiving a first completion notification from the first storage device SSD when the first storage device SSD completes executing the first command; 
 receiving a second completion notification from the second storage device SSD when the second storage device SSD completes executing the second command; and 
 after receiving both of the first completion notification and the second completion notification, 
 transmitting, to the host, a completion notification to notify that the command issued by the host is completed. 
 
     
     
       15. The method according to  claim 13 , further comprising:
 receiving, from the host, a request to update a door bell; 
 fetching, from a first memory of the host, the command issued by the host; and 
 storing the fetched command into a second memory. 
 
     
     
       16. The method according to  claim 15 , further comprising:
 after storing the command into the second memory, 
 updating a door bell of the at least determined one of the plurality of storage devices SSDs so that the at least determined one of the plurality of storage devices SSDs fetches the command from the second memory. 
 
     
     
       17. The method according to  claim 11 , the command issued by the host being accompanied with a data transmission descriptor, the method further comprising:
 on the basis of the data transmission descriptor, 
 informing the at least determined one of the plurality of storage devices SSDs of a location in a memory of the host to which the at least determined one of the plurality of storage devices SSDs is to access in accordance with the command. 
 
     
     
       18. The method according to  claim 17 , wherein
 in a case that the command issued by the host is a read command, the location in the memory of the host is a location into which the at least determined one of the plurality of storage devices SSDs is to write a piece of read data in accordance with the read command. 
 
     
     
       19. The method according to  claim 17 , wherein
 in a case that the command issued by the host is a write command, the location in the memory of the host is a location from which the at least determined one of the plurality of storage devices SSDs is to read a piece of write data in accordance with the write command. 
 
     
     
       20. The method according to  claim 17 , the data transmission descriptor including a plurality of entries, the method further comprising:
 on the basis of an identifier to identify each of the plurality of entries, 
 determining a storage device an SSD among the plurality of storage devices SSDs that is to be informed of the location. 
 
     
     
       21. A storage system comprising:
 a plurality of solid state drives (SSDs); and   a controller outside of the plurality of SSDs, the controller including:
 a first interface configured to be connected to a host, the host being configured to issue Non-Volatile Memory Express (NVMe) commands, the NVMe commands being commands based on NVMe standard; and 
 a plurality of second interfaces configured to be connected to the plurality of SSDs respectively, wherein 
   the controller is configured to allow the host to recognize the plurality of SSDs as a single storage device by:
 obtaining a first NVMe command issued by the host, the first NVMe command indicating a logical address range; 
   on the basis of the logical address range, determining which one of the plurality of SSDs performs a process corresponding to the first NVMe command; and   issuing a second NVMe command that is based on the first NVMe command to the determined one of the plurality of SSDs, the second NVMe command designating the access target data on the LBA basis.   
     
     
       22. The storage system of claim 21, wherein
 the controller is configured to allow the host to recognize the plurality of SSDs as a single SSD.   
     
     
       23. The storage system of claim 21, wherein
 at least one of the plurality of SSDs includes a Peripheral Component Interconnect Express (PCIe) endpoint.   
     
     
       24. The storage system of claim 21, wherein
 the controller is configured to:   in a case where the first NVMe command issued by the host indicates a first logical address range, issue the second NVMe command to a first SSD among the plurality of SSDs; and   in a case where the first NVMe command issued by the host indicates a second logical address range, issue the second NVMe command to a second SSD among the plurality of SSDs.   
     
     
       25. The storage system of claim 21, wherein
 the controller is further configured to:   generate a first NVMe sub-command and a second NVMe sub-command on the basis of the first NVMe command issued by the host;   issue, as the second NVMe command, the first NVMe sub-command to a first SSD among the plurality of SSDs; and   issue, as the second NVMe command, the second NVMe sub-command to a second SSD among the plurality of SSDs.   
     
     
       26. The storage system of claim 25, wherein
 the controller is further configured to,   upon completion of the first NVMe sub-command and completion of the second NVMe sub-command, transmit, to the host, a completion notification indicating that the first NVMe command issued by the host is completed.   
     
     
       27. The storage system of claim 26, wherein
 the controller is configured to:   recognize the completion of the first NVMe sub-command by receiving a first completion notification from the first SSD, and   recognize the completion of the second NVMe sub-command by receiving a second completion notification from the second SSD.   
     
     
       28. The storage system of claim 21, wherein
 the controller further includes:   an NVMe register configured to store a door bell; and   a memory, wherein   the controller is further configured to:   in response to the host updating the door bell, fetch the first NVMe command issued by the host and store the second NVMe command into the memory.   
     
     
       29. The storage system of claim 28, wherein
 the controller is further configured to:   after storing the second NVMe command into the memory, update a door bell of the determined one of the plurality of SSDs so that the determined one of the plurality of SSDs fetches the second NVMe command from the memory.   
     
     
       30. The storage system of claim 21, wherein
 the first NVMe command issued by the host is accompanied with a data transmission descriptor, wherein   the controller is further configured to:   on the basis of the data transmission descriptor, inform the determined one of the plurality of SSDs of a location in a memory of the host to which the determined one of the plurality of SSDs is to access in accordance with the second NVMe command.   
     
     
       31. The storage system of claim 30, wherein,
 in a case where the first NVMe command issued by the host is a read command, the location in the memory of the host is a location into which the determined one of the plurality of SSDs is to transmit a piece of read data in accordance with the read command.   
     
     
       32. The storage system of claim 30, wherein,
 in a case where the first NVMe command issued by the host is a write command, the location in the memory of the host is a location from which the determined one of the plurality of SSDs is to transmit a piece of write data in accordance with the write command.   
     
     
       33. The storage system of claim 30, wherein
 the data transmission descriptor includes a plurality of entries, wherein   the controller is configured to:   on the basis of an identifier to identify each of the plurality of entries, determine an SSD among the plurality of SSDs to inform the location.   
     
     
       34. The storage system of claim 21, wherein
 the controller further includes a central processing unit (CPU).   
     
     
       35. A controller outside of a plurality of solid state drives (SSDs), the controller comprising:
 a first interface configured to be connected to a host, the host being configured to issue Non-Volatile Memory Express (NVMe) commands, the NVMe commands being commands based on NVMe standard;   a plurality of second interfaces configured to be connected to the plurality of SSDs respectively; and   a circuit configured to allow the host to recognize the plurality of SSDs as a single storage device by:
 obtaining a first NVMe command issued by the host, the first NVMe command indicating a logical address range and designating access target data on a logical-block-address (LBA) basis; 
 on the basis of the logical address range, determining which one of the plurality of SSDs performs a process corresponding to the first NVMe command; and 
 issuing a second NVMe command that is based on the first NVMe command to the determined one of the plurality of SSDs, the second NVMe command designating the access target data on the LBA basis. 
   
     
     
       36. The controller of claim 35, wherein
 the circuit is configured to allow the host to recognize the plurality of SSDs as a single SSD.   
     
     
       37. The controller of claim 35, wherein
 at least one of the plurality of SSDs includes a Peripheral Component Interconnect Express (PCIe) endpoint.   
     
     
       38. The controller of claim 35, wherein
 the circuit is configured to:   in a case where the first NVMe command issued by the host indicates a first logical address range, issue the second NVMe command to a first SSD among the plurality of SSDs; and   in a case where the first NVMe command issued by the host indicates a second logical address range, issue the second NVMe command to a second SSD among the plurality of SSDs.   
     
     
       39. The controller of claim 35, wherein
 the circuit is further configured to:   generate a first NVMe sub-command and a second NVMe sub-command on the basis of the first NVMe command issued by the host;   issue, as the second NVMe command, the first NVMe sub-command to a first SSD among the plurality of SSDs; and   issue, as the second NVMe command, the second NVMe sub-command to a second SSD among the plurality of SSDs.   
     
     
       40. The controller of claim 39, wherein
 the circuit is further configured to:   upon completion of the first NVMe sub-command and completion of the second NVMe sub-command, transmit, to the host a completion notification indicating that the first NVMe command issued by the host is completed.   
     
     
       41. The controller of claim 40, wherein
 the circuit is configured to:   recognize the completion of the first NVMe sub-command by receiving a first completion notification from the first SSD, and   recognize the completion of the second NVMe sub-command by receiving a second completion notification from the second SSD.   
     
     
       42. The controller of claim 35, further comprising:
 an NVMe register configured to store a door bell; and   a memory, wherein   the circuit is further configured to:   in response to the host updating the door bell fetch the first NVMe command issued by the host and store the second NVMe command into the memory.   
     
     
       43. The controller of claim 42, wherein
 the circuit is further configured to:   after storing the second NVMe command into the memory, update a door bell of the determined one of the plurality of SSDs so that the determined one of the plurality of SSDs fetches the second NVMe command from the memory.   
     
     
       44. The controller of claim 35, wherein
 the first NVMe command issued by the host is accompanied with a data transmission descriptor, wherein   the circuit is further configured to:   on the basis of the data transmission descriptor, inform the determined one of the plurality of SSDs of a location in a memory of the host to which the determined one of the plurality of SSDs is to access in accordance with the second NVMe command.   
     
     
       45. The controller of claim 44, wherein,
 in a case where the first NVMe command issued by the host is a read command, the location in the memory of the host is a location into which the determined one of the plurality of SSDs is to transmit a piece of read data in accordance with the read command.   
     
     
       46. The controller of claim 44, wherein,
 in a case where the first NVMe command issued by the host is a write command, the location in the memory of the host is a location from which the determined one of the plurality of SSDs is to transmit a piece of write data in accordance with the write command.   
     
     
       47. The controller of claim 44, wherein
 the data transmission descriptor includes a plurality of entries, wherein   the circuit is configured to:   on the basis of an identifier to identify each of the plurality of entries, determine an SSD among the plurality of SSDs to inform the location.   
     
     
       48. The controller of claim 35, wherein
 the circuit comprises a central processing (CPU).   
     
     
       49. A computer program product comprising:
 a non-transitory computer-readable medium in which a computer program is stored, the computer program being to be executed by a computer outside of a plurality of solid state devices (SSDs),   the computer including:
 a first interface configured to be connected to a host, the host being configured to issue Non-Volatile Memory Express (NVMe) commands, the NVMe commands being commands based on NVMe standard; 
 a plurality of second interfaces configured to be connected to the plurality of SSDs respectively; and 
   a central processing unit (CPU) configured to execute the computer program,   the computer program being configured to cause the computer to allow the host to recognize the plurality of SSDs as a single storage device by:
 obtaining a first NVMe command issued by the host, the first NVMe command indicating a logical address range and designating access target data on a logical-block-address (LBA) basis; 
 on the basis of the logical address range, determining which one of the plurality of SSDs performs a process corresponding to the first NVMe command; and 
 issuing a second NVMe command that is based on the first NVMe command to the determined one of the plurality of SSDs, the second NVMe command designating the access target data on the LBA basis. 
   
     
     
       50. The computer program product of claim 49, wherein
 the computer program is configured to cause the computer to allow the host to recognize the plurality of SSDs as a single SSD.   
     
     
       51. The computer program product of claim 49, wherein
 at least one of the plurality of SSDs includes a Peripheral Component Interconnect Express (PCIe) endpoint.   
     
     
       52. The computer program product of claim 49, wherein
 the computer program is configured to cause the computer to:   in a case where the first NVMe command issued by the host indicates a first logical address range, issue the second NVMe command to a first SSD among the plurality of SSDs; and   in a case where the first NVMe command issued by the host indicates a second logical address range, issue the second NVMe command to a second SSD among the plurality of SSDs.   
     
     
       53. The computer program product of claim 49, wherein
 the computer program is further configured to cause the computer to:   generate a first NVMe sub-command and a second NVMe sub-command on the basis of the first NVMe command issued by the host;   issue, as the second NVMe command, the first NVMe sub-command to a first SSD among the plurality of SSDs; and   issue, as the second NVMe command, the second NVMe sub-command to a second SSD among the plurality of SSDs.   
     
     
       54. The computer program product of claim 53, wherein
 the computer program is further configured to cause the computer to:   upon completion of the first NVMe sub-command and completion of the second NVMe sub-command, transmit, to the host, a completion notification indicating that the first NVMe command issued by the host is completed.   
     
     
       55. The computer program product of claim 54, wherein
 the computer program is configured to cause the computer to:   recognize the completion of the first NVMe sub-command by receiving a first completion notification from the first SSD, and   recognize the completion of the second NVMe sub-command by receiving a second completion notification from the second SSD.   
     
     
       56. The computer program product of claim 49, wherein
 the computer further includes:   an NVMe register configured to store a door bell; and   a memory, wherein   the computer program is further configured to cause the computer to:   in response to the host updating the door bell, fetch the first NVMe command issued by the host and store the second NVMe command into the memory.   
     
     
       57. The computer program product of claim 56, wherein
 the computer program is further configured to cause the computer to:   after storing the second NVMe command into the memory, update a door bell of the determined one of the plurality of SSDs so that the determined one of the plurality of SSDs fetches the second NVMe command from the memory.   
     
     
       58. The computer program product of claim 49, wherein
 the first NVMe command issued by the host is accompanied with a data transmission descriptor, wherein   the computer program is further configured to cause the computer to:   on the basis of the data transmission descriptor, inform the determined one of the plurality of SSDs of a location in a memory of the host to which the determined one of the plurality of SSDs is to access in accordance with the second NVMe command.   
     
     
       59. The computer program product of claim 58, wherein,
 in a case where the first NVMe command issued by the host is a read command, the location in the memory of the host is a location into which the determined one of the plurality of SSDs is to transmit a piece of read data in accordance with the read command.   
     
     
       60. The computer program product of claim 58, wherein,
 in a case where the first NVMe command issued by the host is a write command, the location in the memory of the host is a location from which the determined one of the plurality of SSDs is to transmit a piece of write data in accordance with the write command.   
     
     
       61. The computer program product of claim 58, wherein
 the data transmission descriptor includes a plurality of entries, wherein   the computer program is further configured to cause the computer to:   on the basis of an identifier to identify each of the plurality of entries, determine an SSD among the plurality of SSDs to inform the location.   
     
     
       62. A method of controlling a plurality of solid state drives (SSDs), comprising:
 making, by a controller outside of the plurality of SSDs, a host configured to issue Non-Volatile Memory Express (NVMe) commands that are commands based on NVMe standard recognize the plurality of SSDs as a single storage device by:
 obtaining a first NVMe command issued by the host, the first NVMe command indicating a logical address range and designating access target data on a logical-block-address (LBA) basis; 
 on the basis of the logical address range determining which one of the plurality of SSDs performs a process corresponding to the first NVMe command; and 
   issuing a second NVMe command that is based on the first NVMe command to the determined one of the plurality of SSDs, the second NVMe command designating the access target data on the LBA basis.   
     
     
       63. The method of claim 62, wherein
 the host recognizes the plurality of SSDs as a single SSD.   
     
     
       64. The method of claim 62, wherein
 at least one of the plurality of SSDs includes a Peripheral Component Interconnect Express (PCIe) endpoint.   
     
     
       65. The method of claim 62, wherein
 in a case where the first NVMe command issued by the host indicates a first logical address range, the second NVMe command is issued to a first SSD among the plurality of SSDs; and   in a case where the first NVMe command issued by the host indicates a second logical address range, the second NVMe command is issued to a second SSD among the plurality of SSDs.   
     
     
       66. The method of claim 62, further comprising:
 generating a first NVMe sub-command and a second NVMe sub-command on the basis of the first NVMe command issued by the host;   issuing, as the second NVMe command, the first NVMe sub-command to a first SSD among the plurality of SSDs; and   issuing, as the second NVMe command, the second NVMe sub-command to a second SSD among the plurality of SSDs.   
     
     
       67. The method of claim 66, further comprising:
 upon completion of the first NVMe sub-command and completion of the second NVMe sub-command, transmitting, to the host, a completion notification indicating that the first NVMe command issued by the host is completed.   
     
     
       68. The method of claim 67, further comprising:
 recognizing the completion of the first NVMe sub-command by receiving a first completion notification from the first SSD, and   recognizing the completion of the second NVMe sub-command by receiving a second completion notification from the second SSD.   
     
     
       69. The method of claim 62, further comprising:
 in response to the host updating a door bell stored in an NVMe register,
 fetching the first NVMe command issued by the host, and 
 storing the second NVMe command into a memory. 
   
     
     
       70. The method of claim 69, further comprising:
 after storing the second NVMe command into the memory, updating a door bell of the determined one of the plurality of SSDs so that the determined one of the plurality of SSDs fetches the second NVMe command from the memory.   
     
     
       71. The method of claim 62, wherein
 the first NVMe command issued by the host is accompanied with a data transmission descriptor, wherein the method further comprises:   on the basis of the data transmission descriptor, informing the determined one of the plurality of SSDs of a location in a memory of the host to which the determined one of the plurality of SSDs is to access in accordance with the second NVMe command.   
     
     
       72. The method of claim 71, wherein,
 in a case where the first NVMe command issued by the host is a read command, the location in the memory of the host is a location into which the determined one of the plurality of SSDs is to transmit a piece of read data in accordance with the read command.   
     
     
       73. The method of claim 71, wherein,
 in a case where the first NVMe command issued by the host is a write command, the location in the memory of the host is a location from which the determined one of the plurality of SSDs is to transmit a piece of write data in accordance with the write command.   
     
     
       74. The method of claim 71, wherein
 the data transmission descriptor includes a plurality of entries, wherein the method further comprises:   on the basis of an identifier to identify each of the plurality of entries, determining an SSD among the plurality of SSDs to inform the location.