USRE49365EActiveUtility
Structure for radio-frequency applications
Est. expiryAug 1, 2034(~8.1 yrs left)· nominal 20-yr term from priority
H03H 3/02H03H 3/08H10P 36/07H10W 10/181H10P 90/1914H10P 50/00H10P 90/1918H10W 44/20H01L 21/3226H01L 21/76251H01L 21/306H01L 23/66H01L 41/042H10N 30/802
48
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Cited by
25
References
44
Claims
Abstract
A structure for radiofrequency applications includes: a support substrate of high-resistivity silicon comprising a lower part and an upper part having undergone a p-type doping to a depth D; a mesoporous trapping layer of silicon formed in the doped upper part of the support substrate. The depth D is less than 1 micron and the trapping layer has a porosity rate of between 20% and 60%.
Claims
exact text as granted — not AI-modifiedThe invention claimed is:
1. A structure for radiofrequency applications comprising:
a support substrate of high-resistivity silicon comprising a non-doped lower part and a p-type doped upper part, the p-typed p-type doped upper part formed to a depth D of less than 1 micro micron in the support substrate; and
a mesoporous trapping layer of silicon formed in the p-type doped upper part of the support substrate, the mesoporous trapping layer having a porosity rate of between 20% and 60% such that the mesoporous trapping layer traps inversion charges susceptible to be generated in the non-doped lower part and the non-doped lower part retains a high and stable resistivity level.
2. The structure of claim 1 , wherein the mesoporous trapping layer has pores with a diameter of between 2 nm and 50 nm.
3. The structure of claim 2 , wherein the resistivity of the non-doped lower part of the support substrate is greater than 1000 ohm·cm.
4. The structure of claim 1 , wherein an active layer is disposed over the mesoporous trapping layer.
5. The structure of claim 4 , wherein the active layer compromises comprises a semiconductive material.
6. The structure of claim 4 , wherein the active layer compromises comprises a piezoelectric material.
7. The structure of claim 4 , wherein the active layer comprises at least one material selected from the group consisting of: silicon, silicon carbide, silicon germanium, lithium niobate, lithium tantalate, quartz, and aluminum nitride.
8. The structure of claim 4 , wherein the a thickness of the active layer is between 10 nm and 50 μm.
9. The structure of claim 4 , wherein a dielectric layer is disposed between the mesoporous trapping layer and the active layer.
10. The structure of claim 9 , wherein the dielectric layer comprises at least one material selected from the group consisting of: silicon dioxide, silicon nitride, and aluminum oxide.
11. The structure of claim 10 , wherein the dielectric layer is between 10 nm and 6 μm.
12. The structure of claim 4 , wherein at least one microelectronic device is present on or in the active layer, the microelectronic device being a switching circuit or an antenna tuning circuit or a radiofrequency power amplification circuit.
13. The structure of claim 4 , wherein at least one microelectronic device is present on or in the active layer, the microelectronic device comprising a plurality of active components and a plurality of passive components.
14. The structure of claim 4 , wherein at least one microelectronic device is present on or in the active layer, the microelectronic device comprising at least one control element and one MEMS switching element comprising a microswitch with ohmic contact or a capacitive microswitch.
15. The structure of claim 4 , wherein at least one microelectronic device is present on or in the active layer, the microelectronic device comprising a radiofrequency filter operating by bulk or surface acoustic wave propagation.
16. The structure of claim 1 , wherein the resistivity of the non-doped lower part of the support substrate is greater than 1000 ohm·cm.
17. The structure of claim 1 , wherein an active layer is arranged disposed on the mesoporous trapping layer.
18. The structure of claim 9 , wherein the dielectric layer is between 10 nm and 6 μm.
19. A surface acoustic wave device, comprising:
a support substrate of high-resistivity silicon comprising a lower portion and an upper portion, wherein silicon in the upper portion of the support substrate has been modified to form a charge trapping layer; a piezoelectric material bonded over a top surface of the support substrate, and having a thickness between 10 nm and 50 microns; and an electrode comb disposed on a surface of the piezoelectric material; wherein the charge trapping layer traps mobile charges generated in the upper portion of the support substrate in order to maintain a high and stable resistivity level in the upper portion of the support substrate.
20. The surface acoustic wave device of claim 19, wherein the piezoelectric material comprises at least one material selected from the group consisting of: silicon, silicon carbide, silicon germanium, lithium niobate, lithium tantalate, quartz, and aluminum nitride.
21. The surface acoustic wave device of claim 20, wherein the piezoelectric material is lithium tantalate.
22. The surface acoustic wave device of claim 21, wherein the lithium tantalate has a thickness between 200 nm and 20 μm.
23. The surface acoustic wave device of claim 19, wherein the charge trapping layer has a thickness below 1 μm.
24. The surface acoustic wave device of claim 19, wherein the charge trapping layer comprises high-resistivity silicon having p-type doping.
25. The surface acoustic wave device of claim 19, wherein the charge trapping layer comprises high-resistivity silicon having a porous layer.
26. The surface acoustic wave device of claim 25, wherein the porous layer comprises pores having a pore diameter less than 50 nm.
27. The surface acoustic wave device of claim 25, wherein the porous layer comprises pores having a pore diameter between 2 nm and 50 nm.
28. The surface acoustic wave device of claim 25, wherein the porous layer comprises pores having a pore diameter greater than 2 nm.
29. The surface acoustic wave device of claim 19, wherein at least one microelectronic device is present on or in the piezoelectric material.
30. The surface acoustic wave device of claim 29, wherein the at least one microelectronic device comprises at least one component selected from the group consisting of: a switching circuit, an antenna tuning circuit, and a radiofrequency power amplification circuit.
31. The surface acoustic wave device of claim 19, further comprising a dielectric disposed between the piezoelectric material and the charge trapping layer.
32. The surface acoustic wave device of claim 31, wherein the dielectric comprises silicon oxide.
33. The surface acoustic wave device of claim 19, wherein a resistivity of the support substrate is greater than 4000 ohm-cm.
34. A surface acoustic wave device, comprising:
a high-resistivity silicon support substrate; a charge trapping material disposed on the support substrate; a dielectric material disposed on the charge trapping material; a piezoelectric material disposed on the dielectric material and having a thickness between 10 nm and 50 microns; and electrode comb elements configured to propagate an acoustic wave between them, and disposed on a surface of the piezoelectric material; wherein the charge trapping layer is configured to trap mobile charges generated in a portion of the support substrate during operation of the surface acoustic wave device.
35. The surface acoustic wave device of claim 34, wherein the piezoelectric material is lithium tantalate.
36. The surface acoustic wave device of claim 34, wherein the dielectric material has a thickness between 10 nm and 6 μm.
37. A method of manufacturing a surface acoustic wave device, comprising:
providing a support substrate; modifying a top portion of the support substrate to form a charge trapping layer, the charge trapping layer configured to trap mobile charges generated in a portion of the support substrate during operation of the surface acoustic wave device; disposing a dielectric layer on the charge trapping layer; direct bonding a piezoelectric layer on the dielectric layer by disposing a donor substrate by molecular adhesion directly on the charge trapping layer, and thinning the donor substrate to a desired thickness of the piezoelectric layer of between 10 nm and 50 microns; and disposing an electrode comb on a surface of the piezoelectric material.
38. The method of claim 37, wherein direct bonding the piezoelectric layer on the dielectric layer comprises direct bonding lithium tantalate on the dielectric layer.
39. The method of claim 38, wherein direct bonding the lithium tantalate on the dielectric layer comprises direct bonding the lithium tantalate at a thickness between 200 nm and 20 μm on the dielectric layer.
40. The method of claim 37, wherein modifying the top portion of the support substrate to form the charge trapping layer comprises rendering the top portion of the support substrate a porous layer.
41. The method of claim 40, wherein rendering the top portion of the support substrate the porous layer comprises forming pores having a pore diameter between 2 nm and 50 nm.
42. The method of claim 37, wherein the dielectric layer comprises at least one material selected from the group consisting of: silicon dioxide, silicon nitride, and aluminum oxide.
43. The method of claim 37, wherein the dielectric layer is between 10 nm and 6 μm.
44. The method of claim 37, further comprising disposing another dielectric layer on the piezoelectric layer before direct bonding the piezoelectric layer on the dielectric layer.Cited by (0)
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