Image processor and display system having adaptive operational frequency range

Abstract

An image processor includes a frame buffer configured to collect an image data of pixels and configured to generate frame data, a display controller configured to generate the frame update command based on a vertical synchronizing signal and a frame per second signal representing a number of activating of the frame update signal in a second and an operating part configured to generate the vertical synchronizing signal and the image data. When the frame data is generated, the frame buffer activates a frame update signal in response to a frame update command and outputs the frame data. When the frame per second signal is less than a predetermined threshold voltage, the operating part sets a lower limit of a range of a frequency to a predetermined minimum frequency.

What is claimed is: 
     
       1. An image processor comprising:
 a frame buffer that collects image data of pixels and generates frame data, wherein when if the frame data is generated, the frame buffer activates a frame update signal and outputs the frame data in response to a frame update commandand outputs the frame data; 
 a display controller that generates the frame update command based on a vertical synchronizing signal and a frame per second signalindicating a number, wherein the frame per second signal represents a number of activations per second of the frame update signalactivations; and 
 a central processing unit (CPU)an operating processor that generates the vertical synchronizing signal and collects the image data, 
 wherein when if the frame per second signal is less than a predetermined threshold value, the CPU identifies a first a lower limit of a range of a first frequency at which the CPU operates but does not bound the first is set to a predetermined minimum frequency by the first range until operating processor, and 
 wherein if the frame per second signal equals is greater than or exceeds equal to the predetermined threshold value, the operating processor resets the lower limit of the range of frequency back to an original value. 
 
     
     
       2. The image processor of  claim 1 , wherein the CPU varies the first frequency based on a number of instructions processed predetermined threshold value is determined by the CPU a user. 
     
     
       3. The image processor of  claim 1 , wherein: the operating processor comprises a central processing unit (CPU) comprising comprises a frequency controller, a graphics processing unit (GPU) and a multiplexer,
 wherein the multiplexer outputs first data orand second data as the image data based on a control signal, the first data and the control signal being generated by the CPU, and the second data being generated by the GPU, 
 wherein the frequency controller generates a first frequency control signal and a second frequency control signal based on the frame per second signal, and 
 wherein the CPU varies theadjusts a first frequency according to the first frequency control signal and the GPU variesadjusts a second frequency at which the GPU operates according to the second frequency control signal. 
 
     
     
       4. The image processor of  claim 3 , wherein the frequency controller varies adjusts the first frequency control signal based on a number of instructions processed by the CPU and varies the second frequency control signal based on a number of instructions processed by the GPU first instruction processing rate, and adjusts the second frequency control signal based on a second instruction processing rate, wherein the first instruction processing rate is an instruction processing rate of the CPU and the second instruction processing rate is an instruction processing rate of the GPU. 
     
     
       5. The image processor of  claim 3 , wherein the frequency controller establishes a lower limit of the first a range of the first frequency based on the second frequency. 
     
     
       6. The image processor of  claim 5 , wherein when if the frame per second signal is less than the predetermined threshold value, the lower limit of the first range of the first frequency is set to a the predetermined minimum frequency. 
     
     
       7. The image processor of  claim 3 , wherein the multiplexer outputs the first data as the image data when the control signal is activated and outputs the second data as the image data when the control signal is deactivated. 
     
     
       8. The image processor of  claim 3 , wherein the CPU activates the vertical synchronizing signal in a cycle cyclic manner. 
     
     
       9. The image processor of  claim 8 , wherein the a cycle is of the vertical synchronizing signal activated by the CPU has a period of  1/60 second. 
     
     
       10. The image processor of  claim 1 , wherein when the frame update command is applied and the frame data is generated, the frame buffer activates the frame update signal and the display controller increases the frame per second signal. 
     
     
       11. The image processor of  claim 1 , wherein when the frame update command is applied and the frame data is not generated, the frame buffer deactivates the frame update signal and the display controller does not increase the frame per second signal. 
     
     
       12. The image processor of  claim 1 , wherein the first range has a greater lower bound for the first frequency than does a second range which bounds the first frequency at the time the first range is identified. 
     
     
       13. A display system comprising:
 an image processor that generates frame data and identifies, when a frequency for updating frame data is less than a predetermined threshold, a first range of a first frequency at which the image processor operates but does not bound the first frequency by the first range until the frequency for updating the frame data equals or exceeds the predetermined threshold, and 
 the image processor sets a lower limit of range of a frequency at which the image processor operates to a predetermined minimum frequency when the frequency for updating frame data is less than the predetermined threshold; 
 a timing controller that generates a data driver control signal and a scan driver control signal based on the frame data; 
 a display panel comprising a plurality of pixels; 
 a data driver that generates a plurality of data signals based on the data driver control signal and outputs the plurality of data signals to the plurality of pixels through a plurality of data signal lines; and 
 a scan driver that generates a plurality of scan signals based on the scan driver control signal and outputs the scan signals to the plurality of pixels through a plurality of scan signal lines. 
 
     
     
       14. The display system of  claim 13 , wherein the image processor comprises:
 a frame buffer that collects image data of pixels and generates the frame data, wherein when generation of the frame data is generated completed, the frame buffer activates a frame update signal and outputs the frame data in response to a frame update command and outputs the frame data; 
 a display controller that generates the frame update command based on a vertical synchronizing signal, and a frame per second signal indicating, wherein the frame per second signal represents a number of updates per second of the frame update signal activations, and the frequency for updating the frame data; and 
 a central processing unit (CPU)an operating processor that generates the vertical synchronizing signal and the image data, 
 wherein when the frame per second signal is less than a predetermined threshold value, the lower limit of the range of the frequency is set to the predetermined minimum frequency by the operating processor, and 
 wherein when the frame per second signal is greater than or equal to the predetermined threshold value, the operating processor resets the lower limit of the range of the frequency back to an original value. 
 
     
     
       15. The display system of  claim 13 , wherein the first range has a greater lower bound for the first frequency than does a second range which bounds the first frequency at the time the first range is identified. 
     
     
       16. A system comprising:
 a Central Processing Unit (CPU) that receives a frame per second signal indicating a number per second of frame update signal activations, operates in response to a first frequency, and generates a vertical synchronizing signal, a control signal, and a first data signal, wherein the frame per second signal represents a number of activations per second of the frame update signal; 
 a Graphics Processing Unit (GPU) that operates in response to a second frequency and generates a second data signal; and 
 a multiplexer that receives the first data signal, the second data signal, and the control signal,. and selectively outputs either the first data signal or the second data signal in response to the control signal, 
 wherein: the CPU comprises:
 a frame buffer that activates a frame update signal in response to a frame update command and outputs frame data; and 
 a display controller that generates the frame update command based on the vertical synchronizing signal and the frame per second signal, and 
 
 wherein when the frame per second signal is less than a predetermined threshold value, the CPU identifies a first range of the first frequency but does not bound the first frequency by the first range until the frame per second signal equals or exceeds the predetermined thresholda lower limit of a range of a frequency is set to a predetermined minimum frequency by the CPU, and 
 wherein when the frame per second signal is greater than or equal to the predetermined threshold value, the CPU resets the lower limit of the range of the frequency back to an original value. 
 
     
     
       17. The system of  claim 16 , wherein the second frequency is selected from a plurality of second frequencies, and the first frequency falls within a plurality of ranges for the first frequency respectively corresponding to each one of the plurality of second frequencies. 
     
     
       18. The system of  claim 16 , wherein: the first frequency is based on a number of instructions processed an instruction processing rate by the CPU, and the second frequency is based on a number of instructions processed an instruction processing rate by the GPU. 
     
     
       19. The system of  claim 16 , wherein the CPU comprises a frequency controller providing a first frequency control signal to the CPU that defines the first frequency and providing a second frequency control signal to the GPU that defines the second frequency. 
     
     
       20. The system of  claim 16 , wherein the first range has a greater lower bound for the first frequency than does a second range which bounds the first frequency at the time the first range is identified. 
     
     
       21. The image processor of claim 1, wherein the operating processor adjusts frequency based on an instruction processing rate of the operating processor.  
     
     
       22. The image processor of claim 5, wherein if the frame per second signal is greater than or equal to the predetermined threshold value, the lower limit of the range of the first frequency is reset back to an original value.  
     
     
       23. The system of claim 16, wherein the predetermined threshold value is determined by a user.