Card and host device
Abstract
A host device is configured to read and write information from and into a card and to supply a supply voltage that belongs to a first voltage range or a second voltage range which is lower than the first voltage range, and issues a voltage identification command to the card. The voltage identification command includes a voltage range identification section, an error detection section, and a check pattern section. The voltage range identification section includes information indicating which one of the first voltage range and the second voltage range the supply voltage belongs. The error detection section has a pattern configured to enable the card which has received the voltage identification command to detect errors in the voltage identification command. The check pattern section has a preset pattern.
Claims
exact text as granted — not AI-modifiedWhat is claimed is:
1. A memory card comprising:
a memory; and a controller which
controls the memory,
receives from a host device a first command which includes a voltage identification section which has a bit pattern selected from two bit patterns, the bit pattern indicating voltages which the host device supports,
determines whether the memory card supports the voltages indicated by the bit pattern in the voltage identification section of the first command, and
issues a response which includes a voltage identification section which has the same bit pattern as the bit pattern in the voltage identification section of the first command when the memory card determines that the memory card supports the voltages indicated by the bit pattern in the voltage identification section of the first command.
2. The card of claim 1 , wherein
the memory card does not issue a response when the memory card determines that the memory card does not support the voltages indicated by the bit pattern in the voltage identification section of the first command.
3. The card of claim 1 , wherein:
the first command further includes an error detection code section which has an error detection code and a check pattern section which has a bit pattern, and the memory card issues the response which further includes an error detection section which has an error detection code and a check pattern section which has the same bit pattern as the bit pattern in the check pattern section of the first command.
4. A host device which:
reads and writes data from and into a memory card, issues a first command which includes a voltage identification section which has a bit pattern selected from two bit patterns, the bit pattern indicating voltages which the host device supports, performs initialization of the memory card when the host device receives a response which includes a voltage identification section which has the same bit pattern as the bit pattern in the voltage identification section of the first command, and terminates initialization of the memory card when the host device does not receive a response to the first command.
5. The device of claim 4 , wherein:
the first command further includes an error detection code section which has an error detection code and a check pattern section which has a bit pattern, and the host device performs initialization of the memory card when the host device receives the response which further includes an error detection section which has an error detection code which indicates no error and a check pattern section which has the same bit pattern as the bit pattern in the check pattern section of the first command.
6. The device of claim 4 , wherein:
the host device issues an initialization command which instructs the memory card to perform initialization when the host device receives a response which includes a voltage identification section which has the same bit pattern as the bit pattern in the voltage identification section of the first command, and the host device does not issue an initialization command which instructs the memory card to perform initialization when the host device does not receive a response which includes a voltage identification section which has the same bit pattern as the bit pattern in the voltage identification section of the first command.
7. A method of controlling a memory device connectable to a host device, the method comprising:
receiving a first command issued from the host device, the first command including an argument which indicates a range of voltage supplied by the host device; returning a response to the first command to the host device when a range of voltage supported by the memory device matches the range of voltage indicated in the argument. and not returning the response to the first command to the host device when a range of voltage supported by the memory device does not match the range of voltage indicated in the argument; receiving a second command with a first definition issued from the host device and returning a response of the second command with the first definition, receiving a second command with a second definition issued from the host device and returning a response of the second command with the second definition; performing initialization according to either the first definition or the second definition; and returning a result of the initialization with a response to the second command with the first definition or the second command with the second definition.
8. The method of claim 7, wherein the second definition in the response to the second command corresponds to the second definition in the second command.
9. The method of claim 8, wherein the second command with the second definition includes a capacity support section; and the response to the second command with the second definition includes a capacity identification section.
10. The method of claim 9, wherein:
the capacity support section in the second command with the second definition indicates whether the host device supports a small capacity or supports both a small capacity and a large capacity; and the capacity identification section in the response to the second command with the second definition indicates which one of a small capacity memory device and a large capacity memory device the memory device has been initialized as.Cited by (0)
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