USRE49662EActiveUtility

Semiconductor integrated circuit and power-supply control method

56
Assignee: SONY CORPPriority: Jan 16, 2008Filed: Jul 24, 2018Granted: Sep 19, 2023
Est. expiryJan 16, 2028(~1.5 yrs left)· nominal 20-yr term from priority
H03K 17/164H03K 17/102H03K 19/0016
56
PatentIndex Score
0
Cited by
23
References
28
Claims

Abstract

A semiconductor integrated circuit includes: a first voltage line on which a specific one of a power-supply voltage and a reference voltage appears; a second voltage line; a plurality of circuit cells each receiving power generated as a difference between a voltage appearing on the second voltage line and the other one of the power-supply voltage and the reference voltage; a plurality of switch transistors connected in parallel between the first and second voltage lines to serve as switch transistors including switch transistors each having different conducting-state resistances; and a switch conduction control section for controlling a transition of each of the switch transistors from a non-conducting state to a conducting state by turning on the switch transistors at separate points of time.

Claims

exact text as granted — not AI-modified
What is claimed is: 
     
       1. A semiconductor integrated circuit comprising:
 a first voltage line on which a specific one of a power-supply voltage and a reference voltage appears;   a second voltage line;   a plurality of circuit cells each receiving power generated as a difference between a voltage appearing on said second voltage line and the other one of said power-supply voltage and said reference voltage;   a plurality of switch transistors connected in parallel between said first and second voltage lines to serve as switch transistors including switch transistors having conducting-state resistances which are different from each other; and   a switch conduction control section configured to control a transition of each of said switch transistors from a non-conducting state to a conducting state at separate points of time while abiding by a rule stating: any specific one of said switch transistors shall be put in a conducting state only after all said switch transistors each having a conducting-state resistance greater than the conducting-state resistance of said specific switch transistor have been put in a conducting state.   
     
     
       2. The semiconductor integrated circuit according to  claim 1  wherein each of said switch transistors employs a plurality of unit transistors which are controlled by said switch conduction control section to be turned on or turned off at the same time and have a uniform conducting-state resistance. 
     
     
       3. The semiconductor integrated circuit according to  claim 1  wherein, when controlling a transition of each of said switch transistors from a non-conducting state to a conducting state at separate points of time, said switch conduction control section fixes the number of said switch transistors to be controlled at the same point of time for each of said points of time. 
     
     
       4. The semiconductor integrated circuit according to  claim 1  wherein, when controlling a transition of each of said switch transistors from a non-conducting state to a conducting state at separate points of time, said switch conduction control section gradually increases the number of said switch transistors to be controlled at the same point of time. 
     
     
       5. The semiconductor integrated circuit according to  claim 1  wherein, when controlling a transition of each of said switch transistors from a non-conducting state to a conducting state at separate points of time, said switch conduction control section gradually decreases time intervals of conduction controls. 
     
     
       6. A semiconductor integrated circuit comprising:
 a first voltage line on which one of a power-supply voltage and a reference voltage appears;   a second voltage line;   a plurality of circuit cells each receiving power generated as a difference between a voltage appearing on said second voltage line and the other one of said power-supply voltage and said reference voltage;   a plurality of switch transistors connected in parallel between said first and second voltage lines; and   a switch conduction control section configured to control a transition of each of said switch transistors from a non-conducting state to a conducting state by turning on said switch transistors at a plurality of time intervals, each time interval of said plurality of time intervals beginning with a turning on of one of said switch transistors and ending with a turning on of a subsequent other transistor of said switch transistors,   wherein the plurality of time intervals includes a specific time interval that is shorter than a preceding time interval.   
     
     
       7. A power-supply control method to be adopted by a semiconductor integrated circuit including:
 a first voltage line on which a specific one of a power-supply voltage and a reference voltage appears;   a second voltage line;   a plurality of switch transistors connected in parallel between said first and second voltage lines to serve as switch transistors including switch transistors having conducting-state resistances which are different from each other; and   a plurality of circuit cells each receiving power generated as a difference between a voltage appearing on said second voltage line and the other one of said power-supply voltage and said reference voltage,   said power-supply control method comprising the step of   controlling an operation to supply power to said circuit cells by putting each of said switch transistors in a turned-off state or a turned-on state, through a conduction control of a transition of each of said switch transistors from a non-conducting state to a conducting state at separate points of time while abiding by a rule stating: any specific one of said switch transistors shall be put in a conducting state only after all said switch transistors each having a conducting-state resistance greater than said conducting-state resistance of said specific switch transistor have been put in a conducting state.   
     
     
       8. The power-supply control method to be adopted by a semiconductor integrated circuit, according to  claim 7 , wherein
 each of said switch transistors is configured to include a plurality of unit transistors having uniform conducting-state resistances, controlled through the conduction control to be turned off and turned on at the same point of time; and   during the conduction control, the number of said unit transistors to be controlled simultaneously at the same point of time is made gradually greater.   
     
     
       9. A semiconductor integrated circuit comprising:
 a first voltage line including one of a power-supply voltage and a reference voltage;   a second voltage line;   a plurality of circuit cells each receiving power generated as a difference between a voltage included in said second voltage line and the other one of said power-supply voltage and said reference voltage;   a plurality of switch transistors connected in parallel between said first and second voltage lines to serve as switch transistors, the plurality of switch transistors including switch transistors having conducting-state resistances that are different from each other; and   a switch conduction control section configured to control a transition of each of said switch transistors from a non-conducting state to a conducting state at separate points of time,   wherein a switch transistor of said plurality of switch transistors is put in a conducting state only after other switch transistors of said plurality of switch transistors having a conducting-state resistance greater than the conducting-state resistance of the switch transistor have been put in a conducting state.   
     
     
       10. The semiconductor integrated circuit according to  claim 9 , wherein each of said switch transistors employs a plurality of unit transistors that are controlled by said switch conduction control section to be turned on or turned off at the same time and have a uniform conducting-state resistance. 
     
     
       11. The semiconductor integrated circuit according to  claim 9 , wherein, when controlling a transition of each of said switch transistors from a non-conducting state to a conducting state at separate points of time, said switch conduction control section fixes the number of said switch transistors to be controlled at the same point of time for each of said points of time. 
     
     
       12. The semiconductor integrated circuit according to  claim 9 , wherein, when controlling a transition of each of said switch transistors from a non-conducting state to a conducting state at separate points of time, said switch conduction control section gradually increases the number of said switch transistors to be controlled at the same point of time. 
     
     
       13. The semiconductor integrated circuit according to  claim 9 , wherein, when controlling a transition of each of said switch transistors from a non-conducting state to a conducting state at separate points of time, said switch conduction control section gradually decreases time intervals of conduction controls. 
     
     
       14. A semiconductor integrated circuit comprising:
 a first voltage line on which, as a first voltage, a specific one of a power-supply voltage and a reference voltage may appear;   a second voltage line on which a second voltage may appear;   a plurality of circuit cells each configured to receive power generated as a difference between the first voltage on the first voltage line and the second voltage on the second voltage line;   a plurality of switch transistors electrically connected in parallel between the first voltage line and the second voltage line; and   a switch conduction control section configured to control, for each of the plurality of switch transistors, a transition from a non-conducting state to a conducting state,   wherein the switch conduction control section is configured to place any specific one of the plurality of switch transistors in the conducting state only after the switch conduction control section places, in the conducting state, all of the plurality of switch transistors having a conducting-state resistance greater than a conducting-state resistance for the specific one of the plurality of switch transistors,   wherein a conducting-state resistance for a first one of the plurality of switch transistors is greater than a conducting-state resistance for a second one of the plurality of switch transistors,   wherein a conducting-state resistance for the second one of the plurality of switch transistors is greater than a conducting-state resistance for a third one of the plurality of switch transistors, and   wherein the second one of the plurality of switch transistors is between the first one of the plurality of switch transistors and the third one of the plurality of switch transistors.   
     
     
       15. The semiconductor integrated circuit according to claim 14, wherein the switch conduction control section is configured to place the second one of the plurality of switch transistors in the conducting state only after the switch conduction control section places the first one of the plurality of switch transistors in the conducting state. 
     
     
       16. The semiconductor integrated circuit according to claim 14, wherein the switch conduction control section is configured to place the third one of the plurality of switch transistors in the conducting state only after the switch conduction control section places the second one of the plurality of switch transistors in the conducting state. 
     
     
       17. The semiconductor integrated circuit according to claim 14, wherein the first voltage line and the second voltage line are electrically connected directly to the plurality of switch transistors. 
     
     
       18. The semiconductor integrated circuit according to claim 14, further comprising:
 circuit cells that are in a functional circuit cell layout area of the semiconductor integrated circuit.   
     
     
       19. The semiconductor integrated circuit according to claim 18, wherein the first one of the plurality of switch transistors is outside the functional circuit cell layout area of the semiconductor integrated circuit. 
     
     
       20. The semiconductor integrated circuit according to claim 18, wherein the second one of the plurality of switch transistors is outside the functional circuit cell layout area of the semiconductor integrated circuit. 
     
     
       21. The semiconductor integrated circuit according to claim 18, wherein each of the circuit cells is configured to receive the power. 
     
     
       22. The semiconductor integrated circuit according to claim 14, wherein a first source/drain region of the first one of the plurality of switch transistors is wired directly to a first node, wherein a second source/drain region of the second one of the plurality of switch transistors is wired directly to a second node, and wherein a third source/drain region of the third one of the plurality of switch transistors is wired directly to a third node. 
     
     
       23. The semiconductor integrated circuit according to claim 22, wherein the first source/drain region is wired directly to the first voltage line at the first node. 
     
     
       24. The semiconductor integrated circuit according to claim 22, wherein a fourth source/drain region of the first one of the plurality of switch transistors is wired directly to a fourth node, a fifth source/drain region of the second one of the plurality of switch transistors is wired directly to a fifth node, and a sixth source/drain region of the third one of the plurality of switch transistors is wired directly to a sixth node. 
     
     
       25. The semiconductor integrated circuit according to claim 24, wherein the fourth source/drain region of the first one of the plurality of switch transistors is wired directly to the second voltage line at the fourth node. 
     
     
       26. The semiconductor integrated circuit according to claim 14, wherein the switch conduction control section is wired directly to a gate electrode of the third one of the plurality of switch transistors. 
     
     
       27. The semiconductor integrated circuit according to claim 14, wherein the switch conduction control section is wired directly to a gate electrode of the first one of the plurality of switch transistors. 
     
     
       28. The semiconductor integrated circuit according to claim 14, wherein the switch conduction control section is wired directly to a gate electrode of the second one of the plurality of switch transistors.

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