Image sensor and light source driver integrated in a same semiconductor package

Abstract

An apparatus is described that includes an image sensor and a light source driver circuit integrated in a same semiconductor chip package. The image sensor includes visible light pixels and depth pixels. The depth pixels are to sense light generated with a light source drive signal. The light source drive signal is generated with the light source driver circuit.

The invention claimed is: 
     
       1. An apparatus, comprising:
 an image sensor, a light source driver circuit and a timing circuit integrated in a same semiconductor chip package, said image sensor comprising visible light pixels and depth pixels, said depth pixels to sense light generated with a light source drive signal, said light source driver circuit comprising an output to provide said light source drive signal, said image sensor comprising an input to receive a first clock signal for said depth pixels, said timing circuit comprising a first output to provide said first clock signal, said light source driver circuit comprising an input to receive a second clock signal for said light source drive signal, said timing circuit comprising an output to provide said second clock signal.   
     
     
       2. The apparatus of  claim 1  wherein said timing circuit is to be programmed from configuration registers that reside within said semiconductor chip package. 
     
     
       3. The apparatus of  claim 1  wherein said image sensor is disposed on a first semiconductor chip and at least one of said light source driver circuit and said timing circuit are disposed on a second semiconductor chip. 
     
     
       4. The apparatus of  claim 3  wherein said first semiconductor chip is stacked on said second semiconductor chip. 
     
     
       5. The apparatus of  claim 4  wherein said second semiconductor chip further comprises conductive vias within its substrate coupled to conductive balls and/or bumps on a bottom surface of said semiconductor chip package. 
     
     
       6. The apparatus of  claim 1  wherein said apparatus further comprises analog-to-digital conversion circuitry integrated within said semiconductor chip package, said analog-to-digital conversion circuitry to digitize analog signals generated by said depth pixels. 
     
     
       7. The apparatus of  claim 1  wherein said timing circuit is to generate quadrature clock signals for said image sensor. 
     
     
       8. A method, comprising:
 generating a first clock signal and a second clock signal with a timing circuit that is within a semiconductor chip package;   generating a light source drive signal from the first clock signal with a light source driver circuit that is integrated within the semiconductor chip package;   sensing visible light with visible light pixels of an image sensor that is integrated within the semiconductor chip package; and,   generating depth information with depth pixels of the image sensor, the generating of the depth information comprising the image sensor receiving the second clock signal and receiving light generated with the light source drive signal.   
     
     
       9. The method of  claim 8  further comprising programming configuration registers for said timing circuit that reside within said semiconductor chip package. 
     
     
       10. The method of  claim 8  wherein said image sensor is disposed on a first semiconductor chip and at least one of said light source driver circuit and said timing circuit are disposed on a second semiconductor chip. 
     
     
       11. The method of  claim 10  wherein said first semiconductor chip is stacked on said second semiconductor chip. 
     
     
       12. The method of  claim 11  wherein said second semiconductor chip further comprises conductive vias within its substrate coupled to conductive balls and/or bumps on a bottom surface of said semiconductor chip package. 
     
     
       13. The method of  claim 8  further comprising performing analog-to-digital conversion within said semiconductor chip package to digitize analog signals generated by said depth pixels. 
     
     
       14. A computing system, comprising:
 a plurality of general purpose processors;   a system memory;   a memory controller coupled between the system memory and the general purpose processors;   an image sensor, a light source driver circuit and a timing circuit integrated in a same semiconductor chip package, said image sensor comprising visible light pixels and depth pixels, said depth pixels to sense light generated with a light source drive signal, said light source driver circuit comprising an output to provide said light source drive signal, said image sensor comprising an input to receive a first clock signal for said depth pixels, said timing circuit comprising a first output to provide said first clock signal, said light source driver circuit comprising an input to receive a second clock signal for said light source drive signal, said timing circuit comprising an output to provide said second clock signal.   
     
     
       15. The computing system of  claim 14  wherein said timing circuit is to be programmed from configuration registers that reside within said semiconductor chip package. 
     
     
       16. The computing system of  claim 14  wherein said image sensor is disposed on a first semiconductor chip and at least one of said light source driver circuit and said timing circuit are disposed on a second semiconductor chip. 
     
     
       17. The computing system of  claim 16  wherein said first semiconductor chip is stacked on said second semiconductor chip. 
     
     
       18. The computing system of  claim 17  wherein said second semiconductor chip further comprises conductive vias within its substrate coupled to conductive balls and/or bumps on a bottom surface of said semiconductor chip package. 
     
     
       19. The computing system of  claim 14  wherein said apparatus further comprises analog-to-digital conversion circuitry integrated within said semiconductor chip package, said analog-to-digital conversion circuitry to digitize analog signals generated by said depth pixels. 
     
     
       20. The computing system of  claim 14  wherein said timing circuit is to generate quadrature clock signals for said image sensor. 
     
     
       21. An apparatus comprising:
 a semiconductor chip package comprising:
 a package substrate; 
 a first semiconductor chip comprising an image sensor having pixels to sense infrared (IR) light based on a light source drive signal; 
 a second semiconductor chip disposed at the package substrate, the second semiconductor chip comprising a light source driver circuit comprising an output to provide the light source drive signal; 
 an aperture at an external surface of the semiconductor chip package opposite the package substrate; and 
 a set of lenses to focus light received through the aperture on the image sensor. 
   
     
     
       22. The apparatus of claim 21, further comprising:
 a light source coupled to the second semiconductor chip, the light source to emit IR light based on the light source drive signal.   
     
     
       23. The apparatus of claim 22, wherein the light source comprises at least one vertical cavity side emitting laser (VCSEL) diode. 
     
     
       24. The apparatus of claim 21, wherein the second semiconductor chip is connected to the package substrate by conductive balls and/or bumps on an underside surface of the second semiconductor chip. 
     
     
       25. The apparatus of claim 21, further comprising:
 a filter disposed between the lens module and the image sensor, the filter to block visible light.   
     
     
       26. The apparatus of claim 21, further comprising:
 a flex cable; and   wherein the semiconductor chip package is disposed at one end of the flex cable.   
     
     
       27. The apparatus of claim 26, further comprising:
 a connector disposed at a second end of the flex cable, the connector to connect to a system/mother board.   
     
     
       28. The apparatus of claim 27, further comprising a light source coupled to the second semiconductor chip, the light source comprising at least one vertical cavity side emitting laser (VCSEL) diode to emit IR light based on the light source drive signal. 
     
     
       29. The apparatus of claim 27, further comprising:
 the system/mother board; and   at least one processor disposed at the system/mother board.   
     
     
       30. The apparatus of claim 29, further comprising:
 a memory coupled to the at least one processor and storing instructions to cause the at least one processor to at least one of: control a configuration setting of the semiconductor chip package, perform depth capture using the semiconductor chip package, or perform facial recognition based on the depth capture.   
     
     
       31. The apparatus of claim 21, further comprising:
 a timing circuit to generate a plurality of clock signals for the image sensor, each clock signal of the plurality of clock signals synchronized to the light source drive signal with a different phase relationship.   
     
     
       32. The apparatus of claim 31, wherein the plurality of clock signals comprises a clock signal with a 0 degree phase relationship, a clock signal with a 90 degree phase relationship, a clock signal with a 180 degree phase relationship, and a clock signal with a 270 degree phase relationship. 
     
     
       33. The apparatus of claim 21, wherein the apparatus comprises one of a tablet computer or a smartphone. 
     
     
       34. An apparatus comprising:
 a flex cable;   a semiconductor chip package disposed at a first end of the flex cable and comprising:
 a ceramic package substrate; 
 a first semiconductor chip comprising an image sensor having pixels to sense infrared (IR) light based on a light source drive signal; and 
 a second semiconductor chip disposed at the ceramic package substrate, the second semiconductor chip comprising a light source driver circuit comprising an output to provide the light source drive signal; 
   a set of lenses positioned over the image sensor;   a light source comprising at least one vertical cavity side emitting laser (VCSEL) diode to emit IR light based on the light source drive signal; and   a connector disposed at a second end of the flex cable and configured to couple to another board.   
     
     
       35. The apparatus of claim 34, further comprising:
 a system/mother board connected to the connector;   at least one processor disposed at the system/mother board; and   system memory connected to the at least one processor and storing instructions to be executed by the processor.   
     
     
       36. The apparatus of claim 35, wherein the instructions are to cause the at least one processor to at least one of: control a configuration setting of the semiconductor chip package, perform depth capture using the semiconductor chip package, or perform facial recognition based on the depth capture. 
     
     
       37. The apparatus of claim 34, further comprising:
 a timing circuit to generate a plurality of clock signals for the image sensor, each clock signal of the plurality of clock signals synchronized to the light source drive signal with a different phase relationship.   
     
     
       38. The apparatus of claim 37, wherein the plurality of clock signals comprises a clock signal with a 0 degree phase relationship, a clock signal with a 90 degree phase relationship, a clock signal with a 180 degree phase relationship, and a clock signal with a 270 degree phase relationship. 
     
     
       39. A tablet computer comprising the apparatus of claim 34. 
     
     
       40. A smartphone comprising the apparatus of claim 34.