Image sensor and light source driver integrated in a same semiconductor package

Abstract

An apparatus is described that includes an image sensor and a light source driver circuit integrated in a same semiconductor chip package. The image sensor includes visible light pixels and depth pixels. The depth pixels are to sense light generated with a light source drive signal. The light source drive signal is generated with the light source driver circuit.

The invention claimed is: 
     
       1. An apparatus, comprising:
 a semiconductor chip package comprising an image sensor, a light source driver circuit and a timing circuit integrated in a same semiconductor chip package, said image sensor comprising visible light pixels and depth pixels, said depth pixels to sense light generated with a light source drive signal, said light source driver circuit comprising an output to provide said light source drive signal, said image sensor comprising an input to receive a first clock signal for said depth pixels, said timing circuit comprising a first output to provide said first clock signal, said light source driver circuit comprising an input to receive a second clock signal for said light source drive signal, and said timing circuit comprising an output to provide said second clock signal. 
 
     
     
       2. The apparatus of  claim 1  wherein said semiconductor chip package further comprises configuration registers to program said timing circuit is to be programmed from configuration registers that reside within said semiconductor chip package. 
     
     
       3. The apparatus of  claim 1  wherein said semiconductor chip package comprises a first semiconductor chip and a second semiconductor chip, and wherein said image sensor is disposed on a said first semiconductor chip and at least one of said light source driver circuit and said timing circuit are disposed on a said second semiconductor chip. 
     
     
       4. The apparatus of  claim 3  wherein said first semiconductor chip is stacked on said second semiconductor chip. 
     
     
       5. The apparatus of  claim 4  wherein said second semiconductor chip further comprises conductive vias within its substrate coupled to conductive balls and/or bumps on a bottom surface of said semiconductor chip package. 
     
     
       6. The apparatus of  claim 1  wherein said apparatus further comprises analog-to-digital conversion circuitry integrated within said semiconductor chip package, said analog-to-digital conversion circuitry to digitize analog signals generated by said depth pixels. 
     
     
       7. The apparatus of  claim 1  wherein said timing circuit is to generate quadrature clock signals for said image sensor. 
     
     
       8. A method, comprising:
 generating a first clock signal and a second clock signal with a timing circuit that is within a semiconductor chip package; 
 generating a light source drive signal from the first clock signal with a light source driver circuit that is integrated within the semiconductor chip package; and  
 sensing visible light with visible light pixels of an image sensor that is integrated within the semiconductor chip package; and, 
 generating depth information with depth pixels of the an image sensor that is integrated within the semiconductor chip package, the generating of the depth information comprising the image sensor receiving the second clock signal and receiving light generated with the light source drive signal. 
 
     
     
       9. The method of  claim 8  further comprising programming configuration registers for said timing circuit that reside within said semiconductor chip package. 
     
     
       10. The method of  claim 8  wherein said image sensor is disposed on a first semiconductor chip and at least one of said light source driver circuit and said timing circuit is disposed on a second semiconductor chip and the method further comprises transmitting said first clock signal and said second clock signal from the second semiconductor chip to the first semiconductor chip. 
     
     
       11. The method of  claim 10  wherein said first semiconductor chip is stacked on said second semiconductor chip. 
     
     
       12. The method of  claim 11  wherein said second semiconductor chip further comprises conductive vias within its substrate coupled to conductive balls and/or bumps on a bottom surface of said semiconductor chip package. 
     
     
       13. The method of  claim 8  further comprising performing analog-to-digital conversion within said semiconductor chip package to digitize analog signals generated by said depth pixels. 
     
     
       14. A computing system, comprising:
 a plurality of general purposeone or more processors; 
 a system memory; 
 a memory controller coupled between the system memory and the general purpose one or more processors; and  
 a semiconductor chip package comprising an image sensor, a light source driver circuit and a timing circuit integrated in a same semiconductor chip package, said image sensor comprising visible light pixels and depth pixels, said depth pixels to sense light generated with a light source drive signal, said light source driver circuit comprising an output to provide said light source drive signal, said image sensor comprising an input to receive a first clock signal for said depth pixels, said timing circuit comprising a first output to provide said first clock signal, said light source driver circuit comprising an input to receive a second clock signal for said light source drive signal, and said timing circuit comprising an output to provide said second clock signal. 
 
     
     
       15. The computing system of  claim 14  wherein said semiconductor chip package further comprises configuration registers to program said timing circuit is to be programmed from configuration registers that reside within said semiconductor chip package. 
     
     
       16. The computing system of  claim 14  wherein said semiconductor chip package further comprises a first semiconductor chip and a second semiconductor chip, and wherein said image sensor is disposed on a the first semiconductor chip and at least one of said light source driver circuit and said timing circuit are disposed on a the second semiconductor chip. 
     
     
       17. The computing system of  claim 16  wherein said first semiconductor chip is stacked on said second semiconductor chip. 
     
     
       18. The computing system of  claim 17  wherein said second semiconductor chip further comprises conductive vias within its substrate coupled to conductive balls and/or bumps on a bottom surface of said semiconductor chip package. 
     
     
       19. The computing system of  claim 14  wherein said apparatus further comprises further comprising analog-to-digital conversion circuitry integrated within said semiconductor chip package, said analog-to-digital conversion circuitry to digitize analog signals generated by said depth pixels. 
     
     
       20. The computing system of  claim 14  wherein said timing circuit is to generate quadrature clock signals for said image sensor. 
     
     
       21. The computing system of claim 14, wherein said image sensor further comprises visible light pixels.  
     
     
       22. The apparatus of claim 1, wherein said image sensor further comprises visible light pixels.  
     
     
       23. The method of claim 8, further comprising:
 sensing visible light with visible light pixels of the image sensor.