USRE49814EActiveUtility
Transistor display panel, manufacturing method thereof, and display device including the same

Assignee: SAMSUNG DISPLAY CO LTDPriority: Apr 7, 2016Filed: Mar 31, 2021Granted: Jan 23, 2024
Est. expiryApr 7, 2036(~9.7 yrs left)· nominal 20-yr term from priority
H10D 86/441H10D 86/40H10D 86/481H10D 86/471H10D 86/451H10D 86/423H10D 86/60H10D 30/6755H10D 30/6723H10D 30/6704H10D 86/0231H01L 27/1288G02F 1/13624G02F 1/136209H01L 27/1225H01L 27/1248H01L 27/1251H01L 27/1255H01L 29/7869H01L 29/78606H01L 29/78633G02F 1/1368G02F 1/13439G02F 1/136231G02F 2201/123H10K 59/1213H10K 59/131H10K 59/123H10K 59/1216H10K 59/124H10K 59/1201
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Claims
Abstract

A transistor display panel including: a driving voltage line and a first electrode disposed on a substrate; a semiconductor overlapping the first electrode; and an electrode layer overlapping the semiconductor, the electrode layer including a drain electrode, a gate electrode, and a source electrode. The first electrode and the semiconductor are connected through the source electrode.
Claims

exact text as granted — not AI-modified
What is claimed is: 
     
       1. A transistor display panel comprising:
 a driving voltage line and a first electrode disposed on a substrate; 
 a semiconductor disposed on the substrate and overlapping the first electrode; and 
 an electrode layer overlapping the semiconductor, the electrode layer comprising a drain electrode, a gate electrode, and a source electrode; 
 wherein: 
 the semiconductor includes a source region, a drain region, and a channel region; 
 all areas of the source region, the drain region, and the channel region are disposed above and overlap the first electrode in a direction perpendicular to the substrate; 
 the first electrode and the semiconductor are connected through the source electrode; and 
 the first electrode is disposed between the substrate and the semiconductor; and 
 the first electrode and the driving voltage line are disposed in the same layer. 
 
     
     
       2. The transistor display panel of  claim 1 , wherein
 the drain region and the driving voltage line are connected through the drain electrode. 
 
     
     
       3. The transistor display panel of  claim 1 , wherein
 the source region and the first electrode are connected through the source electrode. 
 
     
     
       4. The transistor display panel of  claim 1 , wherein the drain electrode, the gate electrode, and the source electrode are disposed in the same layer. 
     
     
       5. The transistor display panel of  claim 1 , wherein the first electrode and the driving voltage line are disposed in the same layer. 
     
     
       6. A transistor display panel comprising:
 a driving voltage line and a first electrode disposed on a substrate; 
 a semiconductor disposed on the substrate and overlapping the first electrode; and 
 an electrode layer overlapping the semiconductor, the electrode layer comprising a drain electrode, a gate electrode, and a source electrode; 
 a first insulating layer covering the driving voltage line and the first electrode; and 
 a second insulating layer covering the semiconductor, 
 wherein: 
 the first electrode and the semiconductor are connected through the source electrode; 
 the first electrode is disposed between the substrate and the semiconductor; 
 the first insulating layer and the second insulating layer comprise a first contact hole connecting the first electrode and the source electrode and a second contact hole connecting the driving voltage line and the drain electrode; and 
 the second insulating layer comprises a third contact hole connecting the source region and the source electrode and a fourth contact hole connecting the drain region and the drain electrode; 
 the semiconductor includes a source region, a drain region, and a channel region; 
 all areas of the source region, the drain region, and the channel region are disposed above and overlap the first electrode in a direction perpendicular to the substrate; and 
 the first electrode and the driving voltage line are disposed in the same layer. 
 
     
     
       7. The transistor display panel of  claim 6 , wherein the second insulating layer is disposed on an entire surface of the substrate. 
     
     
       8. A display device comprising:
 a driving voltage line and a first electrode disposed on a substrate; 
 a semiconductor disposed on the substrate and overlapping the first electrode; 
 an electrode layer overlapping the semiconductor, the electrode layer comprising a drain electrode, a gate electrode, and a source electrode; and 
 a pixel electrode disposed on the electrode layer, 
 wherein: 
 the first electrode and the semiconductor are connected through the source electrode; and 
 each of the pixel electrode and the first electrode is connected with the semiconductor through the source electrode; and 
 the first electrode is disposed between the substrate and the semiconductor; 
 the semiconductor includes a source region, a drain region, and a channel region; 
 all areas of the source region, the drain region, and the channel region are disposed above and overlap the first electrode in a direction perpendicular to the substrate; and 
 the first electrode and the driving voltage line are disposed in the same layer. 
 
     
     
       9. The display device of  claim 8 , further comprising:
 a first capacitor electrode disposed on the substrate; and 
 a second capacitor electrode disposed on the first capacitor electrode, 
 wherein: 
 the first capacitor electrode is integrally connected with the first electrode; and 
 the second capacitor electrode is integrally connected with the gate electrode. 
 
     
     
       10. The display device of  claim 8 , wherein:
 the semiconductor comprises a drain region, a channel, and a source region; 
 the drain region and the driving voltage line are connected through the drain electrode; and 
 the source region and the first electrode are connected through the source electrode. 
 
     
     
       11. The display device of  claim 8 , further comprising;
 a first insulating layer covering the driving voltage line and the first electrode; and 
 a second insulating layer covering the semiconductor, 
 wherein: 
 the first insulating layer and the second insulating layer comprise a first contact hole connecting the first electrode and the source electrode and a second contact hole connecting the driving voltage line and the drain electrode; and 
 the second insulating layer comprises a third contact hole connecting the source region and the source electrode and a fourth contact hole connecting the drain region and the drain electrode. 
 
     
     
       12. A display device comprising:
 a driving voltage line and a first electrode disposed on a substrate;   a semiconductor disposed on the substrate and overlapping the first electrode; and   an electrode layer overlapping the semiconductor, the electrode layer comprising a drain electrode, a gate electrode, and a source electrode;   wherein:   the semiconductor includes a source region, a drain region, and a channel region;   the source region, the drain region, and the channel region are disposed above and overlap the first electrode in a direction perpendicular to the substrate;   the first electrode and the semiconductor are connected through the source electrode;   the first electrode is disposed between the substrate and the semiconductor; and   the first electrode and the driving voltage line are simultaneously formed by the same process and disposed in a same layer.   
     
     
       13. The display device of claim 12, wherein the drain region and the driving voltage line are connected through the drain electrode. 
     
     
       14. The display device of claim 12, wherein the source region and the first electrode are connected through the source electrode. 
     
     
       15. The display device of claim 12, wherein the drain electrode, the gate electrode, and the source electrode are simultaneously formed by a same process and disposed in a same layer. 
     
     
       16. The display device of claim 12, wherein the gate electrode, the source electrode, and the drain electrode are made of a same material. 
     
     
       17. The display device of claim 12, wherein the driving voltage line and the first electrode are made of a same material. 
     
     
       18. The display device of claim 12, wherein the semiconductor includes an oxide of at least one of zinc (Zn), indium (In), gallium (Ga), tin (Sn), titanium (Ti), or a combination of a metal including at least one of zinc (Zn), indium (In), gallium (Ga), tin (Sn), titanium (Ti), and an oxide thereof. 
     
     
       19. The display device of claim 12, wherein the semiconductor includes at least one of zinc oxide (ZnO), zinc-tin oxide (ZTO), zinc-indium oxide (ZIO), indium oxide (InO), titanium oxide (TiO), indium-gallium-zinc oxide (IGZO), and indium-zinc-tin oxide (IZTO). 
     
     
       20. The display device of claim 12, further comprising:
 a first insulating layer disposed on the driving voltage line and the first electrode; and   a second insulating layer disposed on the semiconductor,   wherein:   the first insulating layer and the second insulating layer comprise a first contact hole connecting the first electrode and the source electrode, and a second contact hole connecting the driving voltage line and the drain electrode; and   the second insulating layer comprises a third contact hole connecting the source region and the source electrode, and a fourth contact hole connecting the drain region and the drain electrode.   
     
     
       21. The display device of claim 20, wherein the first insulating layer is a double layer. 
     
     
       22. The display device of claim 20, wherein:
 the first insulating layer includes a lower layer and an upper layer; and   the lower layer includes SiN x  and the upper layer includes SiO x .   
     
     
       23. The display device of claim 20, wherein the second insulating layer comprises a silicon oxide layer. 
     
     
       24. The display device of claim 20, wherein:
 the second insulating layer is disposed between the semiconductor and the gate electrode; and   the second insulating layer disposed between the gate electrode and the semiconductor does not have a contact hole.   
     
     
       25. A display device comprising:
 a driving voltage line and a first electrode disposed on a substrate;   a semiconductor disposed on the substrate and overlapping the first electrode;   an electrode layer overlapping the semiconductor, the electrode layer comprising a drain electrode, a gate electrode, and a source electrode; and   a pixel electrode disposed on the electrode layer,   wherein:   the semiconductor includes a source region, a drain region, and a channel region;   the source region, the drain region, and the channel region are disposed above and overlap the first electrode in a direction perpendicular to the substrate;   the first electrode and the semiconductor are connected through the source electrode;   the first electrode is disposed between the substrate and the semiconductor;   each of the pixel electrode and the first electrode is connected with the semiconductor through the source electrode; and   the drain electrode, the gate electrode, and the source electrode are disposed on a same layer.   
     
     
       26. The display device of claim 25, wherein a first capacitor electrode and a second capacitor electrode form a first capacitor,
 wherein:   the first capacitor electrode is overlapped with the semiconductor; and   the second capacitor electrode is disposed on the electrode layer.   
     
     
       27. The display device of claim 25, wherein:
 the drain region and the driving voltage line are connected through the drain electrode; and   the source region and the first electrode are connected through the source electrode; and   the driving voltage line and the first electrode are disposed in a same layer.   
     
     
       28. The display device of claim 25, further comprising:
 a first insulating layer disposed on the driving voltage line and the first electrode; and   a second insulating layer disposed on the semiconductor,   wherein:   the first insulating layer and the second insulating layer comprise a first contact hole connecting the first electrode and the source electrode and a second contact hole connecting the driving voltage line and the drain electrode; and   the second insulating layer comprises a third contact hole connecting the source region and the source electrode and a fourth contact hole connecting the drain region and the drain electrode.   
     
     
       29. The display device of claim 25, further comprising a gate line disposed in a same layer with the electrode layer,
 wherein the gate line is partially overlapped with the first electrode in a direction perpendicular to the substrate.
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