Liquid crystal display device

Abstract

In the case that a first scanning line having a smaller number of pixels to be driven than that of a second scanning line in a display device having a heteromorphic display region, capacitance is added to an extended scanning line in which the first scanning line extends to an outside of the display region. A large difference in RC delay between scanning lines generated by the number of pixels to be driven can be compensated for by adding the capacitance, so that luminance unevenness can be prevented to contribute to improvement of display quality.

What is claimed is: 
     
       1. A liquid crystal display device comprising:
 an array substrate; and 
 a counter substrate opposed to the array substrate, the array substrate and the counter substrate being bonded to each other so as to enclose liquid crystal, 
 wherein 
 the array substrate includes a display region and a peripheral region, 
 a plurality of scanning lines and a plurality of signal lines that cross the scanning lines with an insulating film interposed therebetween extend from the display region to the peripheral region, 
 the scanning lines and the signal lines cross each other in the display region to define respective pixels, 
 the scanning lines include a plurality of first scanning lines and a plurality of second scanning lines, 
 each of the first scanning lines drives a smaller number of the pixels than a number of the pixels driven by any of the second scanning lines, 
 a first capacitance is added to a first one of the first scanning lines in the peripheral region, and a second capacitance is added to a second one of the first scanning lines in the peripheral region, and 
 the array substrate includes two opposing edge sides, each extending obliquely with respect to an extending direction of the first scanning lines to form a recessed region that increases in width in a direction away from the second scanning lines toward an outer edge of the array substrate, such that the first one of the first scanning lines closest to the second scanning lines is longer than the second one of the first scanning lines further away from the second scanning lines, and a value of the first capacitance is smaller than a value of the second capacitance. 
 
     
     
       2. The liquid crystal display device according to  claim 1 , wherein
 the display region includes the recessed region and a projection on a side identical to the recessed region, 
 the first scanning lines are disposed in the display region of the projection, and 
 the second scanning lines are disposed in the display region other than the projection. 
 
     
     
       3. The liquid crystal display device according to  claim 2 , wherein the value of the first capacitance increases with decreasing number of the pixels to be driven in the first one of the first scanning lines, and the value of the second capacitance increases with decreasing number of the pixels to be driven in the second one of the first scanning lines. 
     
     
       4. The display device according to  claim 2 , wherein
 one of the first scanning lines further includes an extended scanning line that is extended to an outside the display region, and 
 the extended scanning line is lengthened with decreasing number of the pixels to be driven in the one of the first scanning lines. 
 
     
     
       5. The liquid crystal display device according to  claim 2 , wherein
 one of the first scanning lines further includes an extended scanning line that is extended to an outside the display region, and 
 the extended scanning line is extended to at least one of a notch upper frame that is a vicinity of an edge side of the recessed region and a non-notched upper frame that is a vicinity of an edge side of the projection. 
 
     
     
       6. The liquid crystal display device according to  claim 2 , wherein
 one of the first scanning lines includes:
 an extended scanning line that is extended to an outside the display region; and 
 a conversion portion in which at least one of the extended scanning lines is converted into a different layer with an insulating film interposed therebetween, 
 
 the extended scanning line converted into the different layer includes a region overlapping another extended scanning line, which is not converted, with the insulating film interposed therebetween. 
 
     
     
       7. The liquid crystal display device according to  claim 1 , wherein
 the second scanning lines are not directly connected to the first scanning lines. 
 
     
     
       8. The liquid crystal display device according to  claim 1 , wherein
 the second scanning lines extend further into the display region than all of the first scanning lines in plan view. 
 
     
     
       9. An array substrate, comprising:
 a display region;   a peripheral region; and   a plurality of scanning lines and a plurality of signal lines extending from the display region to the peripheral region, wherein   the plurality of scanning lines and the plurality of signal lines cross each other in the display region to define respective pixels,   the plurality of scanning lines includes a plurality of first scanning lines and a plurality of second scanning lines,   each of the plurality of first scanning lines drives a smaller number of the pixels than a number of the pixels driven by any of the plurality of second scanning lines,   the plurality of first scanning lines includes a first one of the first scanning lines and a second one of the first scanning lines, and the plurality of second scanning lines includes a first one of the second scanning lines,   the shortest distance between the first one of the first scanning lines and the first one of the second scanning lines is less than the shortest distance between the second one of the first scanning lines and the first one of the second scanning lines,   a first capacitance is formed by the first one of the first scanning lines in the peripheral region, and a second capacitance is formed by the second one of the first scanning lines in the peripheral region, and   the array substrate includes two opposing edge sides, each extending obliquely with respect to an extending direction of the plurality of first scanning lines to form at least a recessed region relative to an outline of the array substrate that increases in width in a direction away from the plurality of second scanning lines toward an outer edge of the array substrate, such that the first one of the first scanning lines closest to the plurality of second scanning lines is longer than the second one of the first scanning lines farther away from the plurality of second scanning lines, and a value of the first capacitance is smaller than a value of the second capacitance.   
     
     
       10. The array substrate according to  claim 9 , wherein
 the display region includes a rectangle region and a projection region,   the plurality of first scanning lines are disposed in the projection region, and   the plurality of second scanning lines are disposed in the rectangle region.   
     
     
       11. The array substrate according to  claim 9 , wherein
 a number of the pixels driven by the first one of the first scanning lines is larger than a number of the pixels driven by the second one of the first scanning lines.   
     
     
       12. The array substrate according to  claim 9 , wherein
 the first capacitance is formed with the first one of the first scanning lines and a first capacitive electrode that is in the same layer as the plurality of signal lines, and   the second capacitance is formed with the second one of the first scanning lines and a second capacitive electrode that is in the same layer as the plurality of signal lines.   
     
     
       13. The array substrate according to  claim 9 , further comprising:
 a common electrode, wherein   the first capacitance is formed with the first one of the first scanning lines and a first capacitive electrode that is in the same layer as the common electrode, and   the second capacitance is formed with the second one of the first scanning lines and a second capacitive electrode that is in the same layer as the common electrode.   
     
     
       14. The array substrate according to  claim 9 , further comprising:
 a pixel electrode, wherein   the first capacitance is formed with the first one of the first scanning lines and a first capacitive electrode that is in the same layer as the pixel electrode, and   the second capacitance is formed with the second one of the first scanning lines and a second capacitive electrode that is in the same layer as the pixel electrode.   
     
     
       15. The array substrate according to  claim 9 , wherein
 the display region includes a rectangle region and a projection region, and   the plurality of first scanning lines in the peripheral region includes portions extending along an edge of the projection region.   
     
     
       16. The array substrate according to  claim 9 , wherein
 the first one of the first scanning lines is formed in a first layer,   the second one of the first scanning lines is formed in the first layer and in a second layer that is different from the first layer, with an insulating film interposed therebetween,   the second one of the first scanning lines includes a conversion portion at which the second one of the first scanning lines in the first layer is converted into the second one of the first scanning lines in the second layer, and   the second one of the first scanning lines in the second layer at least partially overlaps with the first one of the first scanning lines.   
     
     
       17. The array substrate according to  claim 9 , wherein
 the display region is narrower in width in a direction away from the plurality of second scanning lines toward an outer edge of the array substrate.   
     
     
       18. The array substrate according to  claim 17 , wherein
 the first one of the first scanning lines in the display region is longer than the second one of the first scanning lines in the display region, and   the first one of the first scanning lines in the peripheral region is shorter than the second one of the first scanning lines in the peripheral region.   
     
     
       19. The array substrate according to  claim 9 , wherein
 the outline of the array substrate is rectangular.