USRE50736EActiveUtility

Display panel and method for electrically-isolating light emitting diode in display panel

65
Assignee: LG DISPLAY CO LTDPriority: Oct 24, 2018Filed: Dec 2, 2022Granted: Jan 6, 2026
Est. expiryOct 24, 2038(~12.3 yrs left)· nominal 20-yr term from priority
Inventors:LEE SHIN-BOK
H10W 20/493G09G 2310/0275G09G 2310/0267G09G 2300/0426G09G 3/3208G09G 2300/0465G09G 2330/08G09G 2300/0443G09G 2330/10G09G 2300/0809G09G 2300/0814G09G 3/006G09G 3/32G09G 3/3225G09F 9/33H01L 23/5256
65
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Cited by
19
References
36
Claims

Abstract

The present disclosure relates to a display panel and a method for electrical-isolation of a light-emitting diode in the display panel. In one embodiment, a display panel includes an element region contained in each sub-pixel, wherein two or more light-emitting diodes are arranged in the element region; and two or more e-fuses respectively connected to the two or more light-emitting diodes, wherein at least one of the two or more e-fuses has blown; and two or more e-fuse transistors respectively connected to the two or more e-fuses.

Claims

exact text as granted — not AI-modified
The invention claimed is: 
     
         1 . A display panel, comprising:
 sub-pixels including driving transistors for driving light-emitting diodes;   scan signal lines and light-emission control signal lines connected to the sub-pixels respectively and extending in a first direction of the display panel;   data lines connected to the sub-pixels respectively and extending in a second direction of the display panel, the second direction being transverse to the first direction;   element regions, wherein each a first sub-pixel of the sub-pixel has each a first element region wherein of the element regions, the first element region including at least two light-emitting diodes are arranged in each element region; structured to emit light of a same first color, and one of the at least two light-emitting diodes being electrically connected to emit light of the first color    a plurality of e-fuses, wherein at least two e-fuses are arranged in each element region and are connected to the at least two light-emitting diodes respectively, wherein at least one of the at least two e-fuses has blown; and   a plurality of e-fuse transistors, wherein at least two e-fuse transistors are connected to the at least two e-fuses respectively,   wherein a gate node of each e-fuse transistor is connected to one of the scan signal line or the light-emission control signal line or optionally an e-fuse scan signal line extending in the first direction; and   wherein all of source nodes of the two or more e-fuse transistors are connected to a signal line extending in the second direction,   wherein the first element region has a spare region, and wherein the spare region is free of a light-emitting diode.   
     
     
         2 . The display panel of  claim 1 , wherein the first element region includes a first driving circuit,  wherein the at least two light-emitting diodes are placed in each the first element region,   wherein a first light-emitting diode of the at least two light-emitting diodes is electrically connected to a first e-fuse transistor and a first e-fuse the first driving circuit, and    wherein a second light-emitting diode of the at least two light-emitting diodes is electrically connected to a second e-fuse transistor and a second e-fuse, disconnected from the first driving circuit    wherein a gate node of the first e-fuse transistor is electrically connected to the scan signal line, and   wherein a gate node of the second e-fuse transistor is electrically connected to the light-emission control signal line.   
     
     
         3 . The display panel of  claim 2 , wherein a fusing transistor is placed in each sub-pixel,
 wherein an e-fuse control signal line extends in the first direction that is connected to a gate node of the fusing transistor,   wherein a source node of the fusing transistor is connected to the data line, and   wherein a drain node of the fusing transistor is connected to source nodes of the first and second e-fuse transistors.   
     
     
         4 . The display panel of  claim 2 , wherein either the first e-fuse or the second e-fuse is blown. 
     
     
         5 . The display panel of  claim 1 , wherein a non-blowing e-fuse contains a first portion of the e-fuse having a narrower width than a second portion adjacent to the first portion. 
     
     
         6 . The display panel of  claim 1 , wherein each element region has a spare region in which one light-emitting diode is to be disposed. 
     
     
         7 . The display panel of  claim 6 , wherein the spare region is currently free of a light-emitting diode, wherein either the first e-fuse or the second e-fuse has blown. 
     
     
         8 . The display panel of  claim 7 , wherein a fusing transistor is placed in each sub-pixel,
 wherein an e-fuse control signal line extending in the first direction is connected to a gate node of the fusing transistor,   wherein a source node of the fusing transistor is connected to the data line, and   wherein a drain node of the fusing transistor is connected to source nodes of the first and second e-fuse transistors.   
     
     
         9 . The display panel of  claim 6 , wherein two light-emitting diodes is placed in each element region, wherein the two light-emitting diodes includes first and second light-emitting diodes, wherein both of a first e-fuse connected to the first light-emitting diode and a second e-fuse connected to the second light-emitting diode have blown, wherein a light-emitting diode is disposed in the spare region. 
     
     
         10 . The display panel of  claim 6 , wherein a non-blowing e-fuse contains a first portion of the e-fuse having a narrower dimension than a second portion adjacent to the first portion. 
     
     
         11 . A display panel, comprising:
 sub-pixels including driving transistors for driving light-emitting diodes;   scan signal lines and light-emission control signal lines connected to the sub-pixels respectively and extending in a first direction of the display panel;   data lines connected to the sub-pixels respectively and extending in a second direction of the display panel, the second direction being transverse to the first direction;   element regions, wherein each sub-pixel has each element region, wherein N light-emitting diodes are arranged in each element region;   a plurality of e-fuses, wherein N e-fuses are arranged in each element region and are connected to the N light-emitting diodes respectively, wherein N−1 of the e-fuses have blown; and   a plurality of e-fuse transistors, wherein N e-fuse transistors are connected to the N e-fuses respectively,   wherein a gate node of each e-fuse transistor is connected to one of the scan signal line or the light-emission control signal line or optionally an e-fuse scan signal line extending in the first direction;   wherein all of source nodes of the two or more e-fuse transistors are connected to the a signal line extending in the second direction; and   wherein N is a natural number greater than 1.   
     
     
         12 . The display panel of  claim 11 , wherein N is three, wherein the three light-emitting diodes include first, second, and third light-emitting diodes,
 wherein the first light-emitting diode is electrically connected to a first e-fuse transistor and a first e-fuse,   wherein the second light-emitting diode is electrically connected to a second e-fuse transistor and a second e-fuse,   wherein the third light-emitting diode is electrically connected to a third e-fuse transistor and a third e-fuse,   wherein a gate node of the first e-fuse transistor is electrically connected to the scan signal line,   wherein a gate node of the second e-fuse transistor is electrically connected to the light-emission control signal line, and   wherein a gate node of the third e-fuse transistor is electrically connected to the e-fuse scan signal line.   
     
     
         13 . The display panel of  claim 11 , wherein a non-blowing e-fuse contains a first portion of the e-fuse that has narrower dimension than a second portion adjacent to the first portion. 
     
     
         14 . A method for electrically-isolating a light-emitting diode in a display panel, the method comprising:
 reading, by a timing controller, a readout information about a light-emitting diode to be electrically-isolated among a plurality of light-emitting diodes in each sub-pixel;   applying, by the timing controller, a signal to either a first scan signal line, a first light-emission control signal line, or an e-fuse scan signal line based on the readout information to turn on an e-fuse transistor corresponding to the light-emission diode to be electrically-isolated; and   applying, by the timing controller, a signal for blowing an e-fuse connected to the e-fuse transistor to a signal line connected to a source node of the e-fuse transistor, thereby to blow the e-fuse.   
     
     
         15 . The method of  claim 14 , wherein the method further comprises:
 when a first group of light-emitting diodes to be electrically-isolated in sub-pixels connected to the first scan signal line, and a second group of light-emitting diodes to be electrically-isolated in sub-pixels connected to a second scan signal line are disposed in sub-pixels connected to a same data line, simultaneously electrically-isolating, by the timing controller, the first and second groups of light-emitting diodes.   
     
     
       16. The display panel of  claim 1 , wherein a second sub-pixel of the sub-pixels has a second element region of the element regions, the second element region including at least two light-emitting diodes, and each of the at least two light-emitting diodes of the second element region being connected to emit light of a same second color.  
     
     
       17. A display panel, comprising:
 a subpixel including:
 a first region including a first light-emitting element; 
 a second region adjacent to the first region within the same subpixel, the second region including a second light-emitting element; 
 a driving circuit configured to drive at least one of the first light-emitting element and the second light-emitting element, 
 wherein the first light-emitting element and the second light-emitting element are each configured to emit light of a same color, 
 wherein the first region has a spare region, and wherein the spare region is free of a light-emitting diode.  
   
     
     
       18. The display panel of  claim 17 ,
 wherein the first light-emitting element and the second light-emitting element are both micro LED chips or both OLEDs.    
     
     
       19. The display panel of  claim 17 ,
 wherein the first light-emitting element and the second light-emitting element are connected in parallel to the driving circuit.    
     
     
       20. The display panel of  claim 17 ,
 wherein the first region and the second region are disposed in a first direction with respect to each other, and   wherein the first light-emitting element and the second light-emitting element are disposed on a same line along the first direction with respect to each other.    
     
     
       21. The display panel of  claim 17 ,
 wherein a first color subpixel, a second color subpixel, and a third color subpixel are disposed adjacent one another in a first direction;   wherein the first color subpixel, the second color subpixel, and the third color subpixel each includes the first region and the second region disposed with respect to one another in a second direction that crosses the first direction, respectively;   wherein the first and second light-emitting elements are configured to emit a same first color are disposed in the first color subpixel;   wherein the first and second light-emitting elements are configured to emit a same second color are disposed in the second color subpixel; and   wherein the first and second light-emitting elements are configured to emit a same third color are disposed in the third color subpixel.    
     
     
       22. The display panel of  claim 17 , comprising a plurality of power lines, a plurality of scan lines, a reference voltage line, a data line, and a light emitting line in the first region.  
     
     
       23. The display panel of  claim 22 ,
 wherein the first light-emitting element and the second light-emitting element are disposed between the light emitting line and a first scan line of the plurality of scan lines.    
     
     
       24. The display panel of  claim 22 ,
 wherein the first light-emitting element and the driving circuit are disposed between the plurality of power lines.    
     
     
       25. The display panel of  claim 22 , wherein the plurality of power lines include:
 a first power line to which a first power source is supplied; and   a second power line to which a second power source is supplied.    
     
     
       26. The display panel of  claim 25 ,
 wherein the first power source is a high-potential driving voltage,   wherein the second power source is a low-potential driving voltage, and   wherein a voltage value of the high-potential driving voltage is greater than a voltage value of the low-potential driving voltage.    
     
     
       27. The display panel of  claim 22 , wherein the plurality of scan lines and the light emitting line are disposed parallel to each other in a first direction.  
     
     
       28. The display panel of  claim 17 , wherein the first region further includes the driving circuit.  
     
     
       29. The display panel of  claim 17 , further comprising:
 a spare region disposed adjacent to at least one of the first light-emitting element and the second light-emitting element.    
     
     
       30. The display panel of  claim 29 , further comprising a third light-emitting element disposed in the spare region.  
     
     
       31. The display panel of  claim 30 , wherein the third light-emitting element is configured to emit light of the same color as the first and second light-emitting elements.  
     
     
       32. The display panel of  claim 31 ;
 wherein a first color subpixel, a second color subpixel, and a third color subpixel are disposed adjacent to each other in the first direction;   wherein the first color subpixel, the second color subpixel, and the third color subpixel each includes the first region and the second region in the second direction, respectively;   wherein the first and second light-emitting elements configured to emit light of a first color are disposed in the first color region;   wherein the first and second light-emitting elements configured to emit light of a second color are disposed in the second color region;   wherein the first and second light-emitting elements configured to emit light of a third color are disposed in the third color region;   wherein the first subpixel includes a first spare region disposed adjacent to at least one of the first and second light-emitting elements of the first subpixel, the second subpixel includes a second spare region disposed adjacent to at least one of the first and second light-emitting elements of the second subpixel, and the third subpixel includes a third spare region disposed adjacent to at least one of the first and second light emitting elements of the third subpixel.    
     
     
       33. The display panel of  claim 32 , comprising:
 a third light-emitting element configured to emit the first color disposed in the first spare region;   a third light-emitting element configured to emit the second color disposed in the second spare region; and   a third light-emitting element configured to emit the third color disposed in the third spare region.    
     
     
       34. The display panel of  claim 22 ,
 wherein the driving circuit includes:   a first transistor having a gate electrode connected to one of the plurality of scan lines and a first electrode connected to the data line;   a driving transistor having a first electrode connected to a first power line of the plurality of power lines and a gate electrode connected to a second electrode of the first transistor;   a capacitor connected between the second electrode of the first transistor and the gate electrode of the driving transistor;   a second transistor having a gate electrode connected to one of the plurality of scan lines, a first electrode connected to the gate electrode of the driving transistor, and a second electrode connected to a second electrode of the driving transistor;   a third transistor having a first electrode connected to the second electrode of the first transistor and a first electrode of the capacitor; a second electrode connected to a reference voltage line; and a gate electrode connected to the light emitting line; and   a fourth transistor having a first electrode connected to the second electrode of the driving transistor; a second electrode connected to a first electrode of the first light-emitting element; and a gate electrode connected to the light emitting line.    
     
     
       35. The display panel of  claim 34 , comprising:
 a second light-emitting element and a third light emitting element, first electrodes of the second light-emitting element and the third light-emitting element respectively connected in parallel to the second electrode of the fourth transistor;   a first e-fuse connected between a second power line of the plurality of power lines and a second electrode of the first light-emitting element; a second e-fuse connected between a second electrode of the second light-emitting element and the second power line; and a third e-fuse connected between a second electrode of the third light-emitting element and the second power line; and   a first e-fuse transistor connected to the first e-fuse; a second e-fuse transistor connected to the second e-fuse; and a third e-fuse transistor connected to the third e-fuse.    
     
     
       36. The display panel of  claim 1 , wherein a second element region of the element regions has a second spare region,
 wherein the second element region includes a second driving circuit,   wherein at least two light-emitting diodes are placed in the second element region,   wherein the at least two light-emitting diodes include a first and a second light-emitting diodes,   wherein both the first and second light-emitting diodes of the second element region are disconnected from the second driving circuit, and   wherein the at least two light-emitting diodes include a third light-emitting diode disposed in the second spare region.

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