Assignee
DAMODARAN RAGURAM
US·11 granted patents·2 pending applications·11 citations·filing 2006–2012
Top patents by PatentIndex Score
13 records- 0193US8732416B2Requester based transaction status reporting in a system with multi-level memoryDAMODARAN RAGURAM·Filed 2011·Granted May 20, 2014·7 cites·13 claims
- 0283US8656105B2Optimizing tag forwarding in a two level cache system from level one to lever two controllers for cache coherence protocol for direct memory access transfersDAMODARAN RAGURAM·Filed 2011·Granted Feb 18, 2014·2 cites·12 claims
- 0377US9183084B2Memory attribute sharing between differing cache levels of multilevel cacheDAMODARAN RAGURAM·Filed 2011·Granted Nov 10, 2015·1 cites·6 claims
- 0461US9189331B2Programmable address-based write-through cache controlDAMODARAN RAGURAM·Filed 2011·Granted Nov 17, 2015·0 cites·3 claims
- 0561US9003122B2Level one data cache line lock and enhanced snoop protocol during cache victims and writebacks to maintain level one data cache and level two cache coherenceDAMODARAN RAGURAM·Filed 2011·Granted Apr 7, 2015·0 cites·2 claims
- 0660US8904110B2Distributed user controlled multilevel block and global cache coherence with accurate completion statusDAMODARAN RAGURAM·Filed 2011·Granted Dec 2, 2014·0 cites·13 claims
- 0759US9075743B2Managing bandwidth allocation in a processing node using distributed arbitrationDAMODARAN RAGURAM·Filed 2011·Granted Jul 7, 2015·0 cites·12 claims
- 0854US8970267B2Asynchronous clock dividers to reduce on-chip variations of clock timingDAMODARAN RAGURAM·Filed 2010·Granted Mar 3, 2015·1 cites·4 claims
- 0942US8862836B2Multi-port register file with an input pipelined architecture with asynchronous reads and localized feedbackDAMODARAN RAGURAM·Filed 2011·Granted Oct 14, 2014·0 cites·19 claims
- 1041US2007033471A1Hardware Configuration of pBISTDAMODARAN RAGURAM·Filed 2006·Application pending·0 cites
- 1140US8904249B2At speed testing of high performance memories with a multi-port BIS engineDAMODARAN RAGURAM·Filed 2012·Granted Dec 2, 2014·0 cites·4 claims
- 1235US8862835B2Multi-port register file with an input pipelined architecture and asynchronous read data forwardingDAMODARAN RAGURAM·Filed 2011·Granted Oct 14, 2014·0 cites·18 claims
- 1334US2006282719A1Unique Addressable Memory Data PathDAMODARAN RAGURAM·Filed 2006·Application pending·0 cites
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