Assignee
GEHRING ANDREAS
DE2 patents
Top patents by PatentIndex Score
US8652913B2Feb 18, 2014
Method for forming silicon/germanium containing drain/source regions in transistors with reduced silicon/germanium loss
GEHRING ANDREAS0 citations47
US8129236B2Mar 6, 2012
Method for creating tensile strain by applying stress memorization techniques at close proximity to the gate electrode
GEHRING ANDREAS1 citations47